Abstract: A semiconductor device of an embodiment includes a semiconductor layer formed of a III-V group nitride semiconductor, a first silicon nitride film formed on the semiconductor layer, a gate electrode formed on the first silicon nitride film, a source electrode and a drain electrode formed on the semiconductor layer such that the gate electrode is interposed between the source electrode and the drain electrode, and a second silicon nitride film formed between the source electrode and the gate electrode and between the drain electrode and the gate electrode and having an oxygen atom density lower than that of the first silicon nitride film.

Abstract: An enhancement-mode GaN transistor. The enhancement-mode GaN transistor includes a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate III-V compound containing acceptor type dopant elements, and a gate metal, where the gate III-V compound and the gate metal are formed with a single photo mask process to be self-aligned and the bottom of the gate metal and the top of the gate compound have the same dimension. The enhancement mode GaN transistor may also have a field plate made of Ohmic metal, where a drain Ohmic metal, a source Ohmic metal, and the field plate are formed by a single photo mask process.

Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating film, a first interconnection, a second interconnection, a barrier metal layer, a first metal pillar, a second metal pillar, and a resin. The semiconductor layer has a first major surface, a second major surface formed on an opposite side to the first major surface, and a light emitting layer. The first electrode is provided on the second major surface of the semiconductor layer. The second electrode is provided on the second major surface of the semiconductor layer and includes a silver layer. The insulating film is provided on the second major surface side of the semiconductor layer. The barrier metal layer is provided between the second electrode and the insulating film and between the second electrode and the second interconnection to cover the second electrode.

Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a crystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.

Abstract: It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. A GaN-based stacked layer 15 includes n?-type GaN drift layer 4/p-type GaN barrier layer 6/n+-type GaN contact layer 7. An opening 28 extends from a top layer and reaches the n?-type GaN drift layer 4. The semiconductor device includes a regrown layer 27 located so as to cover a wall surface and a bottom portion of the opening, the regrown layer 27 including an electron drift layer 22 and an electron source layer 26, a source electrode S located around the opening, a gate electrode G located on the regrown layer in the opening, and a bottom insulating layer 37 located in the bottom portion of the opening.

Abstract: Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.

Abstract: According to one embodiment, a semiconductor device includes a first, a second, a third, a fourth, and a fifth semiconductor region, an insulating film, a control electrode, and a first and a second electrode. The first, the second, the third, the fourth and the fifth semiconductor region include silicon carbide. The first semiconductor region has a first impurity concentration, and has a first portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The fourth semiconductor region is provided between the first portion and the second semiconductor region. The fourth semiconductor region is provided between the first portion and the third semiconductor region. The fifth semiconductor region includes a first region provided between the first portion and the second semiconductor region, and has a second impurity concentration higher than the first impurity concentration.

Abstract: A semiconductor device of an embodiment includes: a substrate formed of a single-crystal first semiconductor; a gate insulating film on the substrate; a gate electrode including a layered structure of a semiconductor layer formed of a polycrystalline second semiconductor and a metal semiconductor compound layer formed of a first metal semiconductor compound that is a reaction product of a metal and the second semiconductor; and electrodes formed of a second metal semiconductor compound that is a reaction product of the metal and the first semiconductor, and formed on the substrate with the gate electrode interposed therebetween, and an aggregation temperature of the first metal semiconductor compound on the polycrystalline second semiconductor is lower than an aggregation temperature of the second metal semiconductor compound on the single-crystal first semiconductor, and a cluster-state high carbon concentration region is included in an interface between the semiconductor layer and the metal semiconductor co

Abstract: The present invention includes an n+ type substrate, a drift epitaxial layer formed on the n+ type substrate and having a lower concentration of impurity than the n+ type substrate, a Schottky electrode formed on the drift epitaxial layer, and a PI formed as an insulating film by covering at least an end of the Schottky electrode and an end and a side surface of the drift epitaxial layer.

Abstract: According to one embodiment, an SiC semiconductor device comprises a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a defect reduction layer formed on a surface portion of the 4H—SiC region, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film. The defect reduction layer has the C defect density that is defined as follows and is set to Cdef<1015 cm?3 by introduction of carbon.

Abstract: A smoothing method for semiconductor material and semiconductor wafers produced by the method are disclosed. Semiconductor wafers with reduced atomic steps, as well with reduced scratches and subsurface defects can be produced. Such wafers feature an improved growth surface that can provide for the growth of an epilayer with reduced macroscopic defects and defect densities. A method of smoothing the surface of a wafer according to example embodiments of the invention includes planarizing the surface of a semiconductor wafer, and then oxidizing the wafer to achieve a specified thickness of oxide on the surface of the wafer. The oxide can then be stripped from the surface of the semiconductor wafer.

Abstract: A MOSFET having a high mobility may be obtained by introducing nitrogen to the channel region or the interface between the gate dielectric film and the SiC substrate of the SiC MOSFET, but there is a problem that a normally-on MOSFET is obtained. For realizing both a high mobility and normally-off, and for providing a SiC MOSFET having further high reliability, nitrogen is introduced to the channel region of the SiC substrate or the interface between the gate dielectric film and the SiC substrate, and furthermore a metal oxide film having a thickness of 10%, or less of the total thickness of the gate dielectric film is inserted in the gate dielectric film.

Abstract: There is provided a silicon carbide substrate composed of silicon carbide, including encapsulated regions inside, which form incoherent boundaries between the silicon carbide and the encapsulated regions, wherein propagation of stacking faults in the silicon carbide is blocked.

Abstract: Method for coating micromechanical components of a micromechanical system, in particular a watch movement, comprising: providing a substrate (4) component to be coated; providing said component with a first diamond coating (2) doped with boron; providing said component with a second diamond coating (3); wherein: said second diamond coating (3) is provided by CVD in a reaction chamber; during CVD deposition, during the last portion of the growth process, a controlled increase of the carbon content within the reaction chamber is provided, thereby providing an increase of the sp2/sp3 carbon (6) bonds up to an sp2 content substantially between 1% and 45%. Corresponding micromechanical components are also provided.

Abstract: This disclosure discloses a method of making a light-emitting device. The method comprises: providing a light-emitting wafer having an orientation flat portion and comprises a substrate and a light-emitting stack formed on the substrate; forming a first line along a direction which is neither parallel nor perpendicular to the orientation flat portion; forming a second line intersecting with the first scribe line; and separating the light-emitting wafer along the first and second lines to form a plurality of light-emitting chips.

Abstract: Disclosed is a light-emitting element including a semiconductor substrate, an island structure formed on the semiconductor substrate and including at least a current confining layer and p-type and n-type semiconductor layers, a light-emitting thyristor formed in the island structure and having a pnpn structure, and a shift thyristor formed in the island structure and having a pnpn structure, wherein a groove portion having a depth such that the groove portion reaches at least the current confining layer is formed between a formation region of the shift thyristor of the island structure and a formation region of the light-emitting thyristor, and an oxidized region that is selectively oxidized from a side surface of the island structure and a side surface of the groove portion is formed in the current confining layer.

Abstract: Provided is a light-emitting element including a semiconductor substrate, an island structure formed on the semiconductor substrate and including at least a current confining layer and p-type and n-type semiconductor layers, a light-emitting thyristor formed in the island structure and having a pnpn structure, and a shift thyristor formed in the island structure and having a pnpn structure, wherein the island structure includes a first side surface having a first depth such that the first side surface does not reach the current confining layer in a formation region of the shift thyristor and a second side surface having a second depth such that the second side surface reaches at least the current confining layer in a formation region of the light-emitting thyristor, and an oxidized region selectively oxidized from the second side surface is formed in the current confining layer in the formation region of the light-emitting thyristor.

Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.

Abstract: A semiconductor light emitting device (LED) includes a first light emitting cell having a first plurality of electrodes. A second light emitting cell includes a second plurality of electrodes. The first and second light emitting cells are disposed on the substrate and are physically separated from each other. A first interconnection unit electrically connects the first plurality of electrodes to the second plurality of the electrodes.

Abstract: A method and a system for forming one or more integrated light guides comprising one or more light sources and one or more light transmissive materials are disclosed. At least one of the one or more light transmissive materials is capable of transmitting light emitted by at least one of the one or more light sources. The method includes disposing the one or more light sources on one or more sides of a substrate to form an arrangement of the one or more light sources. Additionally, the method includes molding the one or more light transmissive materials onto one or more parts of one or more sides of the arrangement of the one or more light sources to form the one or more integrated light guides.

Abstract: A light-emitting diode device is disclosed, which comprises a substrate including a first surface; a plurality of light-emitting diode units formed on the first surface, each of the light-emitting diode units including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; and a plurality of conductive connecting structures, spatially separated from each other, wherein one end of one of the plurality of conductive connecting structure is arranged on the second semiconductor layer, directly contacted with the second semiconductor layer, and electrically connected with each other through the second semiconductor layer; wherein another end of the one of the conductive connecting structures is arranged on another light-emitting diode unit, and directly contacted with one of the semiconductor layers of the another light-emitting diode unit.

Abstract: The present invention relates to a light emitting device. The light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, a light emitting device comprises a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane.

Abstract: A light source may comprise a thermally conductive frame comprising a base and a faceted portion extending from the base. The faceted portion may comprise a plurality of facets spaced circumferentially thereabout. Additionally, a hollow passageway may extend through the base and axially through the faceted portion. A plurality of LED chips may be arranged on the plurality of facets to provide an emission of light in an arc of 360 degrees.

Abstract: An LED module A1 includes LED chips 3R, 3G, 3B, and a module substrate 1 on which the LED chips 3R, 3G, 3B are mounted. A wire 4R is connected to the LED chip 3R, and the LED chips 3G and 3B are arranged to face each other across the wire 4R. With this arrangement, the LED module A1 is reduced in size, and red light, green light and blue light are properly mixed.

Abstract: A method of combining LEDs in a packaging unit includes determining a color locus of a multiplicity of LEDs, classifying the LEDs into a plurality of different color locus ranges, each LED classified into a color locus range comprising the determined color locus of the respective LED, arranging the LEDs in the packaging unit such that the packaging unit contains a plurality of successive sequences respectively of a plurality of LEDs, wherein each sequence respectively has exactly one LED from each of the color locus ranges, and the LEDs of the different color locus ranges are respectively arranged in the same order within the sequences.

Abstract: The present invention relates to a package structure for light-emitting diodes (LEDs). The package structure includes a substrate, a heat-dissipating structure disposed on the substrate, and a plurality of LED chips uniformly disposed on the heat-dissipating structure. The heat-dissipating structure has a central portion and at least one peripheral portion surrounding thereof. The central portion is capable of dissipating more heat than the peripheral portion. Thus, the temperature difference between the LED chips disposed on the central portion and the LED chips disposed on the peripheral portion can be reduced.

Abstract: According to one embodiment, a semiconductor light emitting device includes a silicon substrate, a buffer layer, a foundation semiconductor layer, a first semiconductor layer, a light emitting unit and a second semiconductor layer. The buffer layer is provided on a part of a major surface of the silicon substrate. The foundation semiconductor layer is crystal-grown from an upper surface of the buffer layer, covers a non-formed region of the major surface where the buffer layer is not provided, and is spaced apart from the non-formed region. The first semiconductor layer is provided on the foundation semiconductor layer and has a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and has a second conductivity type.

Abstract: A nitride-based semiconductor light-emitting element disclosed in the present application includes: an active layer having a growing plane which is an m-plane and which is made of a GaN-based semiconductor; and at least one radiation surface at which light from the active layer is to be radiated. The radiation surface has a plurality of protrusions on the m-plane. A base of each of the plurality of protrusions is a region inside a closed curve, and a shape of the base has a major axis and a minor axis. An angle between the major axis and an extending direction of an a-axis of a crystal is not more than 45°.

Abstract: A light emitting diode packaging structure provided in the invention includes a base, a plurality of lead frames, a LED chip, a thermal conductive film and an encapsulating member. The base includes a reflective recess and a plurality of outer surfaces surrounding the reflective recess. The lead frames are respectively disposed on the base, and exposed from the reflective recess. The LED chip is disposed on one of the lead frames in the reflective recess The thermal conductive film is with a light shielding property, and covers all inner surfaces of the reflective recess and at least one of the outer surfaces of the base. The encapsulating member is disposed in the reflective recess to cover the thermal conductive film and the LED chip.

Abstract: A semiconductor light-emitting device includes first and second lead frames that are arranged with a separation on a common plane, a semiconductor light-emitting element that is electrically connected to the first and second lead frames, and a resin body that covers the first and second lead frames and the semiconductor light-emitting element, and includes fluorescent materials that absorb light emitted from the semiconductor light-emitting element and emit light with a wavelength longer than the wavelength of the light absorbed. The resin body has a shape that becomes smaller in cross-section with increasing distance from the common plane.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a bonding pad, a narrow wire electrode and a first insulating layer. The light emitting layer is provided between the first semiconductor layer and the second semiconductor layer and is in contact with the first semiconductor layer. The narrow wire electrode includes a first portion and a second portion. The first portion is provided on a surface of the first semiconductor layer not in contact with the light emitting layer and is in ohmic contact with the first semiconductor layer. The second portion is provided on the surface and located between the first portion and the bonding pad. The narrow wire electrode is electrically connected to the bonding pad. The first insulating layer is provided between the second portion and the first semiconductor layer.

Abstract: An LED module comprises an LED chip and a lens matching with the LED chip. The lens comprises a light-guiding portion and a rough portion protruded from the light-guiding portion. A cavity is defined in a bottom of the light-guiding portion. The LED chip is received in the cavity. The light-guiding portion comprises a top surface. Part of light emitted from the LED chip is reflected to an interior of the lens by the top surface of the light-guiding portion, and traveling to the rough portion then being reflected or refracted by the rough portion, and finally traveling out of the lens through the top surface of the light-guiding portion.

Abstract: An LED package includes a substrate, an LED chip mounted on the substrate. The LED chip has a side surface and an upper surface. A fluorescent layer is evenly distributed over the LED chip. An encapsulant covers the LED chip and the fluorescent layer. A method of manufacturing the LED package is also provided.

Abstract: Described is a material composition comprising a crystalline sapphire material doped with two or more dopants, wherein when a primary radiation comprising blue light is propagated through the crystalline material at least a portion of the primary radiation is converted into a first secondary radiation and a second secondary radiation that is emitted from the crystalline material, wherein the first secondary radiation comprises green light and the second secondary radiation comprises red light, and wherein the primary radiation, first secondary radiation and second secondary radiation when combined produce white light. Also described are LED devices employing the material composition as a light transmissive substrate.

Abstract: An encapsulating sheet includes a transparent layer in which a concave portion that is dented from the surface inwardly is formed and a phosphor encapsulating layer which fills the concave portion. The transparent layer is formed from a transparent composition containing a first silicone resin composition and the phosphor encapsulating layer is formed from a phosphor encapsulating composition containing a phosphor and a second silicone resin composition.

Abstract: A phosphor encapsulating sheet, for encapsulating a light emitting diode element, includes a phosphor layer, an encapsulating layer formed at one side in a thickness direction of the phosphor layer, and an adhesive layer formed at the other side in the thickness direction of the phosphor layer for being adhered to a cover layer.

Abstract: Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device (LED) comprises an LED chip, a barrier over the LED chip, and an encapsulating material containing a phosphor, wherein the encapsulating material is disposed inside the barrier over the LED chip.

Abstract: A light emitting device includes an active layer; at least a portion of the active layer constitutes a gain region. The gain region is continuous from a first end surface and a second end surface. The gain region includes a first portion extending from the first end surface to a first reflective surface in a direction tilted with respect to a normal to the first side surface as viewed two-dimensionally; a second portion extending from the second end surface to the second reflective surface in a direction tilted with respect to a normal to the first side surface as viewed two-dimensionally; and a third portion extending from the first reflective surface to the second reflective surface in a direction tilted with respect to a normal to the first reflective surface as viewed two-dimensionally.

Abstract: Provided is an LED package. It is easy to control luminance according to the luminance and an angle applicable. Since heat is efficiently emitted, the LED package is easily applicable to a high luminance LED. The manufacturing process is convenient and the cost is reduced. The LED package includes a substrate, an electrode, an LED, and a heatsink hole. The electrode is formed on the substrate. The LED is mounted in a side of the substrate and is electrically connected to the electrode. The heatsink hole is formed to pass through the substrate, for emitting out heat generated from the LED.

Abstract: A light emitting element having a light emitting layer, an electro-conductive reflection film that reflects light emitted from the light emitting layer and a substrate in this order, wherein the electro-conductive reflection film contains metal nanoparticles.

Abstract: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.

Abstract: Etched trenches in a bond material for die singulation, and associated systems and methods are disclosed. A method for solid state transducer device singulation in accordance with one embodiment includes forming a plurality of trenches by etching through a metallic bond material forming a bond between a carrier substrate and a plurality of the dies and singulating the carrier substrate along the trenches to separate the dies. In particular embodiments, the trenches extend into the carrier substrate. In further particular embodiments, the dies are at least partially encapsulated in a dielectric material.

Abstract: A light-emitting diode (LED) wafer picker that may increase a suction force and may perform stable adsorption without a concern for contact with a top surface of an LED wafer is provided. An LED wafer picker may include a main body to hold, in an adsorbed state, an LED wafer disposed below the main body, when air drawn in from a top of the LED wafer picker is discharged along a streamlined discharge surface to both sides of the LED wafer picker, a guide member to enable the air to flow along the discharge surface, the guide member being disposed below the discharge surface, a single central hole formed in a central portion of the guide member, excluding a portion facing the discharge surface, and a support portion to support the LED wafer, the support portion extending downward from the guide member. Accordingly, it is possible to easily perform adsorption of an LED wafer that is relatively far from the LED wafer picker.

Abstract: A light emitting device capable of performing signal electric current write-in operations at high speed and without dispersion in the characteristics of TFTs structuring pixels influencing the brightness of light emitting elements is provided. The gate length L of a transistor in which an electric current flows during write-in of a signal electric current is made shorter than the gate length L of a transistor in which electric current supplied to EL elements flows during light emission, and high speed write-in is thus performed by having a larger electric current flow than the electric current flowing in conventional EL elements. A converter and driver transistor (108) is used for signal write-in.

Abstract: Light emitting diode systems are disclosed.

Abstract: A method for manufacturing a display device provided with gate wiring lines (112) disposed on a substrate to supply signals to TFTs, and a plurality of source wiring lines (111) disposed above the gate wiring lines, the method for manufacturing a display device including: a step of forming a first conductive pattern (31) that includes the gate wiring lines (112) by etching a gate metal layer with a first resist pattern as a mask; and a step of forming a second resist pattern (12) at a portion located between the source wirings (111) so as to expose a portion of an edge of an upper surface of the first conductive pattern (31) and so as to cover other parts thereof, at the aforementioned portion of the edge of the upper surface, the first conductive pattern (31) is etched off from the upper surface through an intermediate point along the direction of thickness.

Abstract: A novel electrical circuit protection design with dielectrically-isolated diode configuration and architecture is disclosed. In one embodiment of the invention, a plurality of diodes connected in series is monolithically integrated in a single piece of semiconductor substrates by utilizing dielectrically-isolated trenching and silicon-on-insulator substrates, which enable formation of “silicon islands” to insulate a diode structure electrically from adjacent structures. In one embodiment of the invention, the plurality of diodes connected in series includes at least one Zener diode, which provides a clamping voltage approximately equal to its breakdown voltage value in case of a voltage spike or a power surge event.

Abstract: One embodiment of the disclosure provides an electrostatic discharge protection circuit. The electrostatic discharge protection circuit includes a p-type field effect transistor, a capacitance device and an n-type field effect transistor. The p-type field effect transistor has a source coupled to an input/output terminal, a gate coupled to a first node and a drain coupled to a second node. The capacitance device has a first terminal coupled to a first rail and a second terminal coupled to the first node. The n-type field effect transistor has a source coupled to the first rail, a gate coupled to the second node and a drain coupled to the first node.

Abstract: A method for manufacturing a vertical trench IGBT includes: forming a body layer of a second conductivity type on a semiconductor substrate of a first conductivity type; forming a trench passing through the body layer; forming a trench gate in the trench via a gate insulating film; forming a polysilicon film containing an impurity of a first conductivity type on the body layer; diffusing the impurity from the polysilicon film into the body layer to form an emitter layer of a first conductivity type on the body layer; and forming a collector layer of a second conductivity type on a lower surface of the semiconductor substrate.

Abstract: A field stop structure is disclosed. The field stop structure is divided into a three-dimensional structure by a plurality of trenches formed on a back side of a silicon substrate and hence obtains a greater formation depth in the substrate and can achieve a higher ion activation efficiency. Moreover, a first electrode region of a fast recovered diode (FRD) is formed in the trenches, thereby enabling the integration of a FRD with an insulated gate bipolar transistor (IGBT) device. Methods for forming field stop structure and reverse conducting IGBT semiconductor device are also disclosed.