Abstract: Disclosed herein is a device that includes: an interlayer insulation film having a through hole; and a phase change storage element provided in the through hole. The phase change storage element includes: an outer electrode being a conductive film of cylindrical shape and being formed along an inner wall of the through hole; a buffer insulation film being an insulation film of cylindrical shape and being formed along an inner wall of the outer electrode, an upper end of the buffer insulation film being recessed in part to form a recess; a phase change film filling an interior of the recess; and an inner electrode being a conductive film formed along an inner wall of the buffer insulation film including a surface of the phase change film.

Abstract: The present invention, in one embodiment, provides a method of producing a PN junction the method including at least the steps of providing a Si-containing substrate; forming an insulating layer on the Si-containing substrate; forming a via through the insulating layer to expose at least a portion of the Si-containing substrate; forming a seed layer of the exposed portion of the Si containing substrate; forming amorphous Si on at least the seed layer; converting at least a portion of the amorphous Si to provide crystalline Si; and forming a first dopant region abutting a second dopant region in the crystalline Si.

Abstract: Optimized electrodes for ReRAM memory cells and methods for forming the same are discloses. One aspect comprises forming a first electrode, forming a state change element in contact with the first electrode, treating the state change element, and forming a second electrode. Treating the state change element increases the barrier height at the interface between the second electrode and the state change element. Another aspect comprises forming a first electrode in a manner to deliberately establish a certain degree of amorphization in the first electrode, forming a state change element in contact with the first electrode. The degree of amorphization of the first electrode is either at least as great as the degree of amorphization of the state change element or no more than 5 percent less than the degree of amorphization of the state change element.

Abstract: Semiconductor structures including a zirconium oxide material and methods of forming the same are described herein. As an example, a semiconductor structure can include a zirconium oxide material, a perovskite structure material, and a noble metal material formed between the zirconium oxide material and the perovskite structure material.

Abstract: Resistive memory cells having a plurality of heaters and methods of operating and forming the same are described herein. As an example, a resistive memory cell may include a resistance variable material located between a first electrode and a second electrode, a first heater coupled to a first portion of the resistance variable material, a second heater coupled to a second portion of the resistance variable material, a third heater coupled to a third portion of resistance variable material, and a conductive material coupled to the first, second, and third heaters.

Abstract: In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. A bulk GaN layer is grown on the transitional layer by HVPE under the substantially 2D growth mode. A polycrystalline GaN layer is grown on the bulk GaN layer to form a GaN/substrate bi-layer. The GaN/substrate bi-layer may be cooled from the growth temperature to an ambient temperature, wherein GaN material cracks laterally and separates from the substrate, forming a free-standing article.

Abstract: A Vertical Field Effect Transistor (VFET) formed on a substrate, with a conductive bottom electrode formed thereon. A bottom dielectric spacer layer and a gate dielectric layer surrounded by a gate electrode are formed thereabove. Thereabove is an upper spacer layer. A pore extends therethrough between the electrodes. A columnar Vertical Semiconductor Nanowire (VSN) fills the pore and between the top and bottom electrodes. An FET channel is formed in a central region of the VSN between doped source and drain regions at opposite ends of the VSN. The gate dielectric structure, that is formed on an exterior surface of the VSN above the bottom dielectric spacer layer, separates the VSN from the gate electrode.

Abstract: An apparatus comprises at least one transistor. The at least one transistor comprises a substrate, a graphene layer formed on the substrate, and first and second source/drain regions spaced apart relative to one another on the substrate. The graphene layer comprises at least a first portion and a second portion, the first portion being in contact with the first source/drain region and the second portion being in contact with the second source/drain region. One or more cuts are formed in at least one of the first and second portions of the graphene layer. The apparatus allows for lowered contact resistance in graphene/metal contacts.

Abstract: Disclosed herein is a graphene device having a structure in which a physical gap is provided so that the off-state current of the graphene device can be significantly reduced without having to form a band gap in graphene, and thus the on/off current ratio of the graphene device can be significantly increased while the high electron mobility of graphene is maintained.

Abstract: The present invention relates to an opto-electronic device comprising a first layer and a second layer on a substrate, characterized in that the first layer comprises an electrode material containing fluorine-containing groups and the second layer comprises a polymer containing fluorine-containing groups, where an adhesive fluorine-fluorine interaction exists between some of the fluorine-containing groups of the first layer and of the second layer. The invention furthermore relates to the use of the opto-electronic device and to a process for the production of the opto-electronic device according to the invention.

Abstract: The present invention provides a stacked organic light emitting diode that comprises a first electrode; a second electrode; and at least two light emitting units that are located between the first electrode and the second electrode. The light emitting unit satisfies the following energy relation equation, and includes an n-type organic layer and a p-type organic layer that form NP conjunction, and also includes an n-type doped organic layer that is located between the light emitting units: EpH?EnL?1 eV wherein EnL is a LUMO (lowest unoccupied molecular orbital) energy level of the n-type organic layer and EpH is a HOMO (highest occupied molecular orbital) energy level of the p-type organic layer.

Abstract: An organic light emitting device having a light emitting unit that includes an anode layer, a second wire, an insulating layer, first and second organic light emitting layers and a cathode layer is provided. The anode layer includes first and second sub-electrodes and a first wire connecting the first and second sub-electrodes that are arranged in a first direction. The second wire is disposed between the first and second sub-electrodes. The insulating layer is disposed on the first and second sub-electrodes and the second wire, and has a plurality of openings to expose the first sub-electrode, the second sub-electrode and the second wire. The first and second organic light emitting layers are disposed in two openings. The cathode layer is disposed on the first and second organic light emitting layers, and the cathode layer fills another opening to electrically connect to the second wire through the another opening.

Abstract: An embodiment relates to an electronic component that may consist of an organic LED or organic solar cell, that comprises at least one substrate, one active layer provided between a first and a second electrode and having an active layer protected from dioxygen and the water vapor of the air by the second electrode that encapsulates the active layer.

Abstract: An organic light-emitting diode, organic solar cell or switching element comprising at least one substituted carbazole derivative of the general formula (I), (II) or (III) in which X is NR4, O, S or PR4; Y is NR5, O, S or PR5; where at least one of the symbols X and Y is NR4 or NR5; substituted carbazole derivatives of the formula (I), (II) or (III); a light-emitting layer comprising at least one substituted carbazole derivative of the general formula (I), (II) or (III) and at least one emitter material; the use of substituted carbazole derivatives of the general formula (I), (II) or (III) as matrix material, hole/exciton blocker material and/or electron/exciton blocker material and/or hole injection material and/or electron injection material and/or hole conductor material and/or electron conductor material in an organic light-emitting diode, an organic solar cell or in a switching element, and a device selected from the group consisting of stationary visual display units, mobile visual display units,

Abstract: Organic electroluminescent devices and components containing the organic electroluminescent devices are provided herein. The organic electroluminescent devices include a substrate, a first light emitting unit, a second light emitting unit, a first electrode, and a second electrode. The light emitting units are positioned between the first and second electrode. The light emitting units have light emitting regions containing various emitter materials.

Abstract: The present disclosure relates to OLED and PV devices including transparent electrodes that are formed of conductive nanostructures and methods of improving light out-coupling in OLED and input-coupling in PV devices.

Abstract: A photoelectric conversion device comprising a transparent electrically conductive film, a photoelectric conversion film and an electrically conductive film in this order, wherein the photoelectric conversion film comprises a photoelectric conversion layer, and an electron blocking layer, wherein the electron blocking layer contains a compound represented by the specific formula.

Abstract: Provided is a semiconductor device for high power application including a novel semiconductor material with high productivity. Alternatively, provided is a semiconductor device having a novel structure in which the novel semiconductor material is used. Provided is a vertical transistor including a channel formation region formed using an oxide semiconductor which has a wider band gap than a silicon semiconductor and is an intrinsic semiconductor or a substantially intrinsic semiconductor with impurities that serve as electron donors (donors) in the oxide semiconductor removed. The thickness of the oxide semiconductor is greater than or equal to 1 micrometer, preferably greater than 3 micrometer, more preferably greater than or equal to 10 micrometer.

Abstract: A device housing is provided. The device housing includes a substrate, a silicon dioxide film formed on the substrate, and a zinc oxide film formed on the silicon dioxide film. The silicon dioxide film has micrometer sized structures. The zinc oxide film has nanometer sized structures. A method for making the device housing is also described there.

Abstract: One object is to provide a transistor including an oxide semiconductor film which is used for the pixel portion of a display device and has high reliability. A display device has a first gate electrode; a first gate insulating film over the first gate electrode; an oxide semiconductor film over the first gate insulating film; a source electrode and a drain electrode over the oxide semiconductor film; a second gate insulating film over the source electrode, the drain electrode and the oxide semiconductor film; a second gate electrode over the second gate insulating film; an organic resin film having flatness over the second gate insulating film; a pixel electrode over the organic resin film having flatness, wherein the concentration of hydrogen atoms contained in the oxide semiconductor film and measured by secondary ion mass spectrometry is less than 1×1016 cm?3.

Abstract: A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.

Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on the number of write operations. The semiconductor device includes a first memory cell including a first transistor and a second transistor, a second memory cell including a third transistor and a fourth transistor, and a driver circuit. The first transistor and the second transistor overlap at least partly with each other. The third transistor and the fourth transistor overlap at least partly with each other. The second memory cell is provided over the first memory cell. The first transistor includes a first semiconductor material. The second transistor, the third transistor, and the fourth transistor include a second semiconductor material.

Abstract: A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

Abstract: An electrostatic discharge device and an organic electro-luminescence display device having the same are provided. The organic electro-luminescence display device includes an electrostatic discharge device including a metal pattern having an island shape on a substrate, an insulating layer on the metal pattern, a semiconductor pattern on the insulating layer, the semiconductor pattern corresponding to the metal pattern, a first electrode overlapping one end of the semiconductor pattern, and a second electrode overlapping the other end of the semiconductor pattern, and spaced from the first electrode, thereby preventing a current leakage, a signal distortion and a signal cross-talk to improve the reliability.

Abstract: A TFT array substrate including: a thin-film transistor including an active layer, gate, source and drain electrodes, a first insulation layer between the active layer and the gate electrode, and a second insulation layer between the gate and the source and drain electrodes; a pixel electrode on the first and second insulation layers, and connected to one of the source and drain electrodes; a capacitor including a first electrode on the same layer as the gate electrode, a second electrode formed of the same material as the pixel electrode, a first protection layer on the second electrode, and a second protection layer on the first protection layer; a third insulation layer between the second insulation layer and the pixel electrode, and between the first electrode and the second electrode; and a fourth insulation layer covering the source and drain electrodes and the second protection layer, and exposing the pixel electrode.

Abstract: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).

Abstract: A three-dimensional (3D) high density memory array includes multiple layers of segmented bit lines (i.e., sense lines) with segment switch devices within the memory array that connect the segments to global bit lines. The segment switch devices reside on one or more layers of the integrated circuit, preferably residing on each bit line layer. The global bit lines reside preferably on one layer below the memory array, but may reside on more than one layer. The bit line segments preferably share vertical connections to an associated global bit line. In certain EEPROM embodiments, the array includes multiple layers of segmented bit lines with segment connection switches on multiple layers and shared vertical connections to a global bit line layer. Such memory arrays may be realized with much less write-disturb effects for half selected memory cells, and may be realized with a much smaller block of cells to be erased.

Abstract: An asymmetric hetero-structure FET and method of manufacture is provided. The structure includes a semiconductor substrate and an epitaxially grown semiconductor layer on the semiconductor substrate. The epitaxially grown semiconductor layer includes an alloy having a band structure and thickness that confines inversion carriers in a channel region, and a thicker portion extending deeper into the semiconductor structure at a doped edge to avoid confinement of the inversion carriers at the doped edge.

Abstract: A high-performance semiconductor device capable of suppressing a leak current with little electric field concentration, reducing an invalid region in a PN junction region, securing a sufficient area for a Schottky junction region, and achieving efficient and easy manufacturing, in which, in one surface of a semiconductor substrate (1) having a first conduction type made of SiC, a PN junction region (7a) and a Schottky junction region (7b) are provided, in the PN junction region (7a), a convex portion (2a) which has a trapezoidal shape in sectional view and includes a second conduction type layer (2) provided on the semiconductor substrate (1) and a contact layer (3) which is in ohmic contact with the second conduction type layer (2) of the convex portion (2a) are provided, and Schottky electrode (4) covers the side surface of the convex portion (2a) and the contact layer (3), and is provided continuously over the PN junction region (7a) and the Schottky junction region (7b).

Abstract: According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall.

Abstract: A white LED lighting device driven by a pulse current is provided, which consists of blue, violet or ultraviolet LED chips, blue afterglow luminescence materials A and yellow luminescence materials B. Wherein the weight ratio of the blue afterglow luminescence materials A to the yellow luminescence materials B is 10-70 wt %:30-90 wt %. The white LED lighting device drives the LED chips with a pulse current having a frequency of not less than 50 Hz. Because of using the afterglow luminescence materials, the light can be sustained when an excitation light source disappears, thereby eliminating the influence of LED light output fluctuation caused by current variation on the illumination. At the same time, the pulse current can keep the LED chips being at an intermittent work state, so as to overcome the problem of chip heating.

Abstract: Apparatuses and systems for photon detection can include a first optical sensing structure structured to absorb light at a first optical wavelength; and a second optical sensing structure engaged with the first optical sensing structure to allow optical communication between the first and the second optical sensing structures. The second optical sensing structure can be structured to absorb light at a second optical wavelength longer than the first optical wavelength and to emit light at the first optical wavelength which is absorbed by the first optical sensing structure. Apparatuses and systems can include a bandgap grading region.

Abstract: Disclosed are a light emitting device and a light emitting device package having the same. The light emitting device includes a plurality of light emitting cells including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; a first electrode layer connected to the first conductive semiconductor layer of a first light emitting cell of the plural light emitting cells; a plurality of second electrode layers under the light emitting cells, a portion of the second electrode layers being connected to the first conductive semiconductor layer of an adjacent light emitting cells; a third electrode layer disposed under a last light emitting cell of the plural light emitting cells; a first electrode connected to the first electrode layer; a second electrode connected to the third electrode layer; an insulating layer around the first to third electrode layers; and a support member under the insulating layer.

Abstract: A substrate including phosphor is remotely illuminated by an LED. Optical radiation that emerges through the substrate is measured. Portions of the substrate, such as raised features on the substrate, are then selectively removed responsive to the measuring, so as to obtain a desired optical radiation. In removing portions of the substrate, holes may be drilled through the substrate to provide a separate path for light from the LED that does not pass through the phosphor. Alternatively, a separate LED may be provided outside the dome.

Abstract: Disclosed herein is a display panel including a mounting substrate in which one or more light-emitting devices each including one or more light-emitting elements are mounted on a circuit substrate; and a transparent substrate disposed to face the light-emitting device side of the mounting substrate, wherein the transparent substrate has a transparent base material and a resin layer formed on the mounting substrate side of the transparent base material, and the resin layer is in contact with the light-emitting device and has, formed on an upper surface or a side surface of the light-emitting device, an inclined part which spreads from the light-emitting device side toward the transparent base material side.

Abstract: A display substrate for a display device includes a substrate, a switching device, a gate line, a data line, a pixel electrode, a plurality of common electrodes. The switching device includes an active pattern, a gate insulation layer, a gate electrode, a source electrode and a drain electrode. The gate line is electrically connected to the source electrode, and the data line is electrically coupled to the gate electrode. The pixel electrode is electrically connected to the drain electrode, and the common electrodes are disposed on the pixel electrode. A coupling capacitance among the common electrodes and the data line can be prevented and/or reduced to prevent a signal delay of the data line. Further, an aperture ratio of the display substrate can be improved by changing a layout of the data line and the gate line.

Abstract: A flexible layered structure is disclosed having a flexible top conductive layer, a flexible bottom heat sink layer and a flexible dielectric middle layer. The combination has a longitudinal axis and a plurality of defined positions spaced along the longitudinal axis. The defined positions can be used for aligning a circuit and/or for the placement of LED lights. The flexible layered structure can be easily bent to form a LED substrate for shining light in more than one direction while efficiently removing heat arising from the LEDs.

Abstract: Provided are a method of fabricating a light-emitting apparatus with improved light extraction efficiency and a light-emitting apparatus fabricated using the method. The method includes: preparing a monocrystalline substrate; forming an intermediate structure on the substrate, the intermediate structure comprising a light-emitting structure which comprises a first conductive pattern of a first conductivity type, a light-emitting pattern, and a second conductive pattern of a second conductivity type stacked sequentially, a first electrode which is electrically connected to the first conductive pattern, and a second electrode which is electrically connected to the second conductive pattern; forming a polycrystalline region, which extends in a horizontal direction, by irradiating a laser beam to the substrate in the horizontal direction such that the laser beam is focused on a beam-focusing point within the substrate; and cutting the substrate in the horizontal direction along the polycrystalline region.

Abstract: A method for producing a light emitting diode arrangement. A plurality of LED modules (110, 120, 130) are provided, which in each case comprise at least one radiation emitting semiconductor component (1000) on a carrier body (1300). At least one separately fabricated connection carrier (200) is provided. The LED modules are arranged in such a way that they are adjacent to one another in pairs. A mechanically stable and electrically conductive connection between the carrier bodies of two LED modules is produced by means of the connection carrier. Furthermore, a light emitting diode arrangement is disclosed.

Abstract: A light emitting diode (LED) device having a low index of refraction spacer layer separating the LED chip and a functional layer. The LED chip has a textured light emission surface to increase light extraction from the chip. The spacer layer has an index of refraction that is lower than both the LED chip and the functional layer. Most of the light generated in the LED chip passes easily into the spacer layer due to the textured surface of the chip. At the interface of the spacer layer and the functional layer the light sees a step-up in index of refraction which facilitates transmission. A portion of the light that has passed into the functional layer will be reflected or scattered back toward the spacer layer where some of it will experience total internal reflection. Total internal reflection at this interface may increase extraction efficiency by reducing the amount of light that re-enters the spacer layer and, ultimately, the LED chip where it may be absorbed.

Abstract: Disclosed is a light emitting device including a conductive substrate; a reflective layer on the conductive substrate; an etching protective layer on a peripheral portion of a top surface of the conductive substrate; and a light emitting structure, which is formed on the reflective layer and the etching protective layer such that the etching protective layer is partially exposed and includes a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer between the first and second conductive semiconductor layers, wherein the etching protective layer includes a first refractive layer having a first refractive index and a second refractive layer having a second refractive index greater than the first refractive index.

Abstract: A light emitting device according to the embodiment includes a conductive support member; a light emitting structure on the conductive support member including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second semiconductor layers; and a protective device on the light emitting structure.

Abstract: A semiconductor light emitting element includes: a light emitting layer and a p-type semiconductor layer laminated on an n-type semiconductor layer; a transparent conductive layer laminated on the p-type semiconductor layer; a transparent insulating layer laminated on the transparent conductive layer and the exposed n-type semiconductor layer, the transparent insulating layer having plural tapered through-holes formed therein; a p-electrode formed on the transparent conductive layer with the transparent insulating layer interposed therebetween, the p-electrode being connected to the transparent conductive layer via the through-holes provided for the transparent insulating layer; and an n-electrode formed on the n-type semiconductor layer with the transparent insulating layer interposed therebetween, the n-electrode being connected to the n-type semiconductor layer via the through-holes provided for the transparent insulating layer.

Abstract: A chip package having a lead frame and a molded portion. The lead frame includes a thermal pad and at least one electrode. The molded portion partially encapsulates the at least one electrode such that it is exposed on a top surface but not on a bottom surface. A bottom surface of the thermal pad is exposed for direct securement to an external heat sink. The molded portion is disposed between the at least one electrode and the heat sink to prevent a short circuit.

Abstract: Disclosed is a semiconductor light emitting element (1), which includes: an n-type semiconductor layer (140); a light emitting layer (150), which is laminated on one surface of the n-type semiconductor layer (140) such that a part of the surface is exposed, and which emits light when a current is carried therein; a p-type semiconductor layer (160) laminated on the light emitting layer (150); a multilayer reflection film (180), which is configured by alternately laminating low refractive index layers (180a) and high refractive index layers (180b) that have a refractive index higher than that of the low refractive index layers (180a) and also have transparency with respect to light emitted from the light emitting layer (150), and which is laminated on the exposed portion of the n-type semiconductor layer (140), the exposed portion being on one side of the n-type semiconductor layer; an n-conductor portion (400), which is formed by penetrating the multilayer reflection film (180), and which has one end thereof c

Abstract: A semiconductor light emitting device includes: a semiconductor lamination including a first semiconductor layer of a first conductivity type, an active layer formed on the first semiconductor layer, and a second semiconductor layer of a second conductivity type formed on the active layer; a rhodium (Rh) layer formed on one surface of the semiconductor lamination; a light reflecting layer containing Ag, formed on the Rh layer and having an area smaller than the Rh layer; and a cap layer covering the light reflecting layer. Migration of Ag is suppressed.

Abstract: According to one embodiment, a light emitting device includes a semiconductor light emitting element, a mounting member, a first wavelength conversion layer, and a first transparent layer. The semiconductor light emitting element emits a first light. The semiconductor light emitting element is placed on the mounting member. The first wavelength conversion layer is provided between the semiconductor light emitting element and the mounting member in contact with the mounting member. The first wavelength conversion layer absorbs the first light and emits a second light having a wavelength longer than a wavelength of the first light. The first transparent layer is provided between the semiconductor light emitting element and the first wavelength conversion layer in contact with the semiconductor light emitting element and the first wavelength conversion layer. The first transparent layer is transparent to the first light and the second light.

Abstract: A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures.

Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are apart from each other. The LED chip is provided above the first and second lead frames, the LED chip includes a semiconductor layer which contains at least indium, gallium and aluminum, one terminal of the LED chip is connected to the first lead frame, and another terminal of the LED chip is connected to the second lead frame. The resin body covers the LED chip and an entire upper surface, a part of a lower surface, and parts of edge surfaces of each of the first and second lead frames, and the resin body exposes a rest of the lower surface and a rest of the edge surfaces. And, an appearance of the resin body is a part of an appearance of the LED package.

Abstract: The light emitting device package includes a light emitting structure including a first conductive semiconductor layer, an active layer partially formed under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer, an insulating layer disposed on lateral surfaces of the active layer and the second conductive semiconductor layer, an electrode disposed under the first conductive semiconductor layer and electrically insulated from the active layer and the second conductive semiconductor layer by the insulating layer, and a metallic support layer disposed under the second conductive semiconductor layer, the insulating layer, and the electrode and including a first conductive region electrically connected to the electrode, a second conductive region electrically connected to the second conductive semiconductor layer, and an insulating region disposed between the first and second conductive regions and insulating the first conductive region from the second condu