Abstract: A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers.

Abstract: A resistive random access memory array may be formed on the same substrate with a fuse array. The random access memory and the fuse array may use the same active material. For example, both the fuse array and the memory array may use a chalcogenide material as the active switching material. The main array may use a pattern of perpendicular sets of trench isolations and the fuse array may only use one set of parallel trench isolations. As a result, the fuse array may have a conductive line extending continuously between adjacent trench isolations. In some embodiments, this continuous line may reduce the resistance of the conductive path through the fuses.

Abstract: A graphene lattice comprising an ordered array of graphene nanoribbons is provided in which each graphene nanoribbon in the ordered array has a width that is less than 10 nm. The graphene lattice including the ordered array of graphene nanoribbons is formed by utilizing a layer of porous anodized alumina as a template which includes dense alumina portions and adjacent amorphous alumina portions. The amorphous alumina portions are removed and the remaining dense alumina portions which have an ordered lattice arrangement are employed as an etch mask. After removing the amorphous alumina portions, each dense alumina portion has a width which is also less than 10 nm.

Abstract: The present invention discloses a semiconductor device, comprising: a substrate, a gate stack structure on the substrate, source and drain regions in the substrate on both sides of the gate stack structure, and a channel region between the source and drain regions in the substrate, characterized in that the source region in the source and drain regions comprises GeSn alloy, and a tunnel dielectric layer is optionally comprised between the GeSn alloy of the source region and the channel region. In accordance with the semiconductor device and method for manufacturing the same of the present invention, GeSn alloy having a narrow band gap is formed by implanting precursors and performing a laser rapid annealing, the on-state current of TFET is effectively enhanced, accordingly it has an important application prospect in a high performance low power consumption application.

Abstract: A method for fabricating light emitting diode (LED) dice includes the step of forming a light emitting diode (LED) die having a multiple quantum well (MQW) layer configured to emit electromagnetic radiation, and a confinement layer on the multiple quantum well (MQW) layer having a wire bond pad. The method also includes the steps of forming a dam on the wire bond pad configured to protect a wire bond area on the wire bond pad, forming an adhesive layer on the confinement layer and the wire bond pad with the dam protecting the wire bond area, and forming a wavelength conversion layer on the adhesive layer. A light emitting diode (LED) die includes the dam on the wire bond pad, the adhesive layer on the confinement layer and the wavelength conversion layer on the adhesive layer configured to convert the electromagnetic radiation to a second spectral region.

Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.

Abstract: A light-emitting device disclosed herein comprises a substrate, an active layer formed on the substrate and including a first quantum well, a second quantum well and a barrier layer disposed between the first quantum well and the second quantum well. The barrier layer includes a first region adjacent to the first quantum well, a third region adjacent to the second quantum well and a second region disposed between the first region and the third region and comprising Sb.

Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.

Abstract: According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×1018 cm?3 or more and less than 1×1021 cm?3. The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.

Abstract: A nitride semiconductor light-emitting element uses a non-polar plane as its growing plane. A GaN/InGaN multi-quantum well active layer includes an Si-doped layer which is arranged in an InyGa1-yN (where 0<y<1) well layer, between the InyGa1-yN (where 0<y<1) well layer and a GaN barrier layer, or in a region of the GaN barrier layer that is located closer to the InyGa1-yN (where 0<y<1) well layer. A concentration of Si at one interface of the GaN barrier layer on a growing direction side is either zero or lower than a concentration of Si in the Si-doped layer.

Abstract: Provided is a silicon-wafer-based germanium semiconductor photodetector configured to be able to provide properties of high gain, high sensitivity, and high speed, at a relatively low voltage. A germanium-based carrier multiplication layer (e.g., a single germanium layer or a germanium and silicon superlattice layer) may be provided on a silicon wafer, and a germanium charge layer may be provided thereon, a germanium absorption layer may be provided on the charge layer, and a polysilicon second contact layer may be provided on the absorption layer. The absorption layer may be configured to include germanium quantum dots or wires.

Abstract: A nanowire FET device includes a SOI wafer having a SOI layer over a BOX, and a plurality of nanowires and pads patterned in the SOI layer, wherein the nanowires are suspended over the BOX; an interfacial oxide surrounding each of the nanowires; and at least one gate stack surrounding each of the nanowires, the gate stack having (i) a conformal gate dielectric present on the interfacial oxide (ii) a conformal first gate material on the conformal gate dielectric (iii) a work function setting material on the conformal first gate material, and (iv) a second gate material on the work function setting material. A volume of the conformal first gate material and/or a volume of the work function setting material in the gate stack are/is proportional to a pitch of the nanowires.

Abstract: Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of silicon carbide (SiC) fins or nanowires. The SiC fins or nanowires are first provided and then graphene nanoribbons or carbon nanotubes are formed on the exposed surfaces of the fin or the nanowires by annealing. In embodiments in which closed carbon nanotubes are formed, the nanowires are suspended prior to annealing. The location, orientation and chirality of the graphene nanoribbons and the carbon nanotubes that are provided are determined by the corresponding silicon carbide fins and nanowires from which they are formed.

Abstract: A transparent electrode is provided for an organic light emitting diode (OLED) device. The electrode may be made according to a method including: sputter-depositing a first layer of or including indium tin oxide (ITO) on a substrate; sputter-depositing a thin second metallic or substantially metallic layer on the glass substrate over the first layer to form an electrode structure, and heat treating the electrode structure at temperature(s) of at least about 400 degrees C. in order to thermally activate at least the first layer of or including ITO. The electrode structure may then be provided in an OLED device on the light-emitting side of the organic light emitting semiconductor layer.

Abstract: The present invention discloses a protein transistor device, wherein an antibody molecule (antibody-antigen) is bonded to at least two gold nanoparticles in a high reproducible self-assembly way to form molecular junctions, and wherein the two gold nanoparticles are respectively joined to a drain and a source. The protein transistor device can be controlled to regulate current via applying a bias to the gate. The conformational change of the protein molecule will cause the variation of the charge transport characteristics of the protein transistor device. The protein transistor device can be further controlled by different optical fields via conjugating a quantum dot to the molecular junctions. Therefore, the present invention has diversified applications.

Abstract: An organic light emitting diode module is provided and includes a substrate, a first electrode located on the substrate, a pair of second electrodes located on the substrate, a light emitting element located on the substrate, a first copper foil electrically connected to the first electrode, a pair of second copper foils respectively electrically connected to the second electrodes, and a cross connection conductor electrically connected to the second copper foils. The second electrodes are in an arrangement opposite to one another. The light emitting element includes a first electrode layer electrically connected to the first electrode, a second electrode layer located between the second electrodes and electrically connected to the second electrodes, and an organic light emitting layer located between the first and second electrode layers.

Abstract: A display apparatus including an organic light emitting display including a terminal portion, a battery disposed on a surface of the organic light emitting display, and a flexible printed circuit board (PCB) bent to cover the organic light emitting display and the battery, a side of the flexible PCB being connected to the terminal portion and another side of the flexible PCB extending outside and attached to the battery.

Abstract: An organic light emitting display device includes an organic light emitting display panel including first to third pixels that emit light of different colors, a wavelength of a color light emitted from the third pixel being shorter than wavelengths of color lights emitted from the first and second pixels, a window on an upper portion of the display panel, and a light shielding pattern on the window, the light shielding pattern being adjacent to an outline of the third pixel.

Abstract: Disclosed are an organic light emitting diode display and a manufacturing method thereof, and, more particularly, an organic light emitting diode display which includes an encapsulation layer including an inorganic layer containing carbon at a level of about 0.2 wt % to about 6.2 wt % and an organic layer and a manufacturing method thereof.

Abstract: An organic light-emitting display apparatus includes a substrate comprising pixels, each of which comprises a first sub-pixel, a second sub-pixel, and a third sub-pixel, and a plurality of pixel electrodes independently formed for respective sub-pixels; a first common layer commonly formed on the pixels; first lines covering first sub-pixels arranged in a first direction, wherein the first lines comprise a first organic light-emitting layer; a plurality of second lines covering second sub-pixels arranged in the first direction, wherein the second lines comprise a second organic light-emitting layer differing from the first organic light-emitting layer; a second common layer commonly formed on the plurality of pixels, wherein the second common layer comprises a third organic light-emitting layer differing from the first organic light-emitting layer and the second organic light-emitting layer; a third common layer commonly formed on the pixels; and an opposite electrode commonly formed on the pixels.

Abstract: A sputtering target and an organic light-emitting display device including a black matrix deposited thereby. The sputtering target is used in a sputtering process for depositing a black matrix in an organic light-emitting display device. The sputtering target has a cermet structure in which a metal and a metal oxide are mixed.

Abstract: A sputtering target that can form a black matrix having high-resistance and low-reflection characteristics and an organic light-emitting display device including the black matrix deposited thereby. The sputtering target that is used in a sputtering process for depositing a black matrix contains one selected from the group consisting of Mo—Si—O, W—Si—O and Mo—W—Si—O, the content of the Mo or W being at least 0.5 times the content of the Si.

Abstract: A biscarbazole derivative having a specific group, which is represented by formula (1): and an organic electroluminescence device in which a plurality of organic thin-film layers including a light emitting layer are disposed between a cathode and an anode, and at least one of the organic thin-film layers include the biscarbazole derivative. The organic electroluminescence device exhibits high emission efficiency and has a long lifetime. In formula (1), each of A1 and A2 independently represents a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 ring carbon atoms; each of Y1 to Y16 independently represents C(R) or a nitrogen atom; each of R groups independently represents a hydrogen atom, etc.; and each of L1 and L2 independently represents a single bond, etc.; provided that at least one of A1, A2 and R represents a substituted or unsubstituted fluoranthenyl group, etc.

Abstract: An optoelectronic component includes: a wet-chemically processed hole injection layer; and an additional layer doped with a dopant and adjacent to the wet-chemically processed hole injection layer, the dopant comprising a copper complex having at least one ligand with the chemical structure according to formula I in which E1 and E2 are each independently one of the following elements: sulfur, oxygen or selenium, and R is selected from the group of: hydrogen or substituted or unsubstituted, branched, linear or cyclic hydrocarbons.

Abstract: The present invention provides an electrode composite that has a reaction interface with a large area and can constitute a photoelectric element having high electron transport properties between the reaction interface and the electrode. The electrode composite of the present invention includes a first electrode and a conductive particle layer stacked on the first electrode. The conductive particle layer includes conductive particles containing acicular particles. The conductive particle layer has a three-dimensional porous network structure that is formed by the interconnection of the conductive particles. The three-dimensional network structure is joined to the first electrode. The conductive particle layer contains pores having a pore size of 50 nm or more in a total volume of 50% or more based on the volume of all pores in the conductive particle layer.

Abstract: An organic compound having excellent electron transport property and hole blocking property as a material for a highly efficient organic EL device, and also provide a highly efficient organic EL device using the compound. This invention relates to a compound having a triazole ring structure to which a substituted pyridyl group is bonded, represented by the following general formula (1), and to an organic electroluminescence device comprising the compound: wherein Ar1 and Ar2, R1, R2, R3, R4, R5, R6, R7, R8, R9 and R10, and m are as defined in the specification.

Abstract: The present invention relates to a substrate for an organic electrode device, a manufacturing method thereof, and an organic electronic device. An exemplary substrate of the invention, if an organic light emitting element is formed on an upper part of the substrate, can obtain luminance with high emission and uniformity by efficiently controlling the surface resistance of an electrode even when the device is configured into larger sizes.

Abstract: A compound for an organic optoelectronic device is represented by the following Chemical Formula 1:

Abstract: An organic LED element includes a transparent substrate, a light scattering layer, a first electrode, an organic light emitting layer, and a second electrode. The light scattering layer includes a base material made of glass, and scattering substances dispersed in the base material. The light scattering layer has a refractive index [N?] greater than a refractive index [N?] of the transparent substrate. First and second layers made of a material other than molten glass are arranged between the light scattering layer and the first electrode. A refractive index N1 of the first layer is greater than [N?], and a refractive index N2 of the second layer is greater than each of [N?], [N?], and N1.

Abstract: There are provided an electrode foil which has all the functions of a supporting base material, an electrode and a reflective layer and also has a superior thermal conductivity; and an organic device using the same. The electrode foil comprises a metal foil, wherein the electrode foil has at least one outermost surface which is an ultra-smooth surface having an arithmetic average roughness Ra of 10.0 nm or less as measured in accordance with JIS B 0601-2001.

Abstract: The present invention provides an organic light emitting device comprising a first electrode, a second electrode, and one or more organic material layers disposed between the first electrode and the second electrode, and having an excellent life-span property by changing a dipole moment of a compound comprised in the organic material layers.

Abstract: An organic light-emitting element having a high light extraction efficiency and a high light emission efficiency is provided, by an organic light-emitting element (10) including: an anode layer (12) formed on a substrate (11); a dielectric layer (13) formed on the anode layer (12); plural first recessed sections (16) formed by penetrating at least the dielectric layer (13); plural second recessed sections (17) formed on the upper surface of the dielectric layer (13) without penetrating the dielectric layer (13); an organic compound layer (14) including a light emitting layer formed to cover at least the upper surface of the dielectric layer (13), the inner surface of the first recessed sections (16) and the inner surface of the second recessed sections (17); and a cathode layer (15) formed on the organic compound layer (14).

Abstract: For an organic semiconductor component and production thereof, an organic semiconductor layer is formed from complexes disposed on a boundary between a first layer and a second layer. The organic semiconductor layer is thereby orientated. The first layer is formed of a salt providing the central cations for the complexes. The second layer is formed of molecules that are the ligands of the complexes. Complex formation takes place when the second layer is deposited on the first layer.

Abstract: Disclosed is a thin film transistor that includes a gate electrode, a semiconductor overlapping with the gate electrode, a source electrode that is electrically connected to the semiconductor, a drain electrode that is electrically connected to the semiconductor and faces the source electrode, and a stacked gate insulating layer that is positioned between the gate electrode and semiconductor. The stacked gate insulating layer includes an aluminum oxide layer. A method of manufacturing the same and a display device including the thin film transistor are also disclosed.

Abstract: Provided is an oxide electronic device, including: an oxide substrate; an oxide thin film layer formed on the oxide substrate and containing an oxide that is heterogeneous with respect to the oxide substrate; and a ferroelectric layer formed on the oxide thin film layer and controlling electric conductivity of two-dimensional electron gas (2DEG) generated at an interface between the oxide substrate and the oxide thin film layer. Provided also is a method for manufacturing an oxide electronic device, including: depositing, on an oxide substrate, an oxide that is heterogeneous with respect to the oxide substrate to form an oxide thin film layer; and forming a ferroelectric layer on the oxide thin film layer, wherein the ferroelectric layer controls electric conductivity of 2DEG generated at an interface between the oxide substrate and the oxide thin film layer.

Abstract: There is provided a semiconductor device including a first conductive layer, an insulating layer, a second conductive layer, a channel layer, a passivation layer and a third conductive layer. The insulating layer covers the first conductive layer. The second conductive layer is formed on the insulating layer and has an inner opening. The channel layer is formed on the inner opening of the second conductive layer to fully cover the inner opening. The passivation layer is formed upon the channel layer to cover the channel layer and has a contact hole inside the inner opening of the second conductive layer. The third conductive layer is formed in the contact hole.

Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.

Abstract: An optically transparent memory device comprises first and second electrodes, wherein the electrodes are formed from conductive material(s) that is transparent. The memory device also provides a resistive memory layer coupled to the first and second electrodes. The resistive memory layer is formed from a resistive memory material providing resistive switching that is transparent. Additionally, the optically transparent memory device may be incorporated into a variety of electronics.

Abstract: A thin film transistor TFT, including a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, the active layer corresponding to the gate electrode and including a channel region, source and drain electrodes contacting the active layer, the source and drain electrodes being separate from each other, and an ohmic contact layer between the active layer and at least one of the source and drain electrodes, the ohmic contact layer including an oxide semiconductor material.

Abstract: A semiconductor device having a novel structure or a method for manufacturing the semiconductor device is provided. For example, the reliability of a transistor which is driven at high voltage or large current is improved. For improvement of the reliability of the transistor, a buffer layer is provided between a drain electrode layer (or a source electrode layer) and an oxide semiconductor layer such that the end portion of the buffer layer is beyond the side surface of the drain electrode layer (or the source electrode layer) when seen in a cross section, whereby the buffer layer can relieve the concentration of electric field. The buffer layer is a single layer or a stacked layer including a plurality of layers, and includes, for example, an In—Ga—Zn—O film containing nitrogen, an In—Sn—O film containing nitrogen, an In—Sn—O film containing SiOx, or the like.

Abstract: A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.

Abstract: A test circuit includes a phase difference detection unit and a determination unit. The phase difference detection unit detects a phase difference between a first signal received through a first pad and a second signal received through a second pad. The determination unit compares the detected phase difference with a preset amount of delay and outputs a result signal.

Abstract: A method of forming a semiconductor device includes forming a mandrel on top of a substrate; forming a first spacer adjacent to the mandrel on top of the substrate; forming a cut mask over the first spacer and the mandrel, such that the first spacer is partially exposed by the cut mask; partially removing the partially exposed first spacer; and etching the substrate to form a fin structure corresponding to the partially removed first spacer in the substrate.

Abstract: [Problem] To provide a substrate bonding technique having a wide range of application. [Solution] A silicon thin film is formed on a bonding surface, and the interface with the substrate is surface-treated using energetic particles/metal particles.

Abstract: A method of manufacturing an electronic device comprises: providing a layer of semiconductor material comprising a first portion, a second portion, and a third portion, the third portion connecting the first portion to the second portion and providing a semiconductive channel for electrical current flow between the first and second portions; providing a gate terminal arranged with respect to said third portion such that a voltage may be applied to the gate terminal to control an electrical conductivity of said channel; and processing at least one of the first and second portions so as to have an electrical conductivity greater than an electrical conductivity of the channel when no voltage is applied to the gate terminal. In certain embodiments, the processing comprises exposing at least one of the first and second portions to electromagnetic radiation. The first and second portions may be laser annealed to increase their conductivities.

Abstract: A thin-film semiconductor device having two thin-film transistors, wherein each of the two thin-film transistors includes: a gate electrode; a gate insulating film; a semiconductor layer; a channel protection layer; an intrinsic semiconductor layer; a contact layer in contact with a portion of sides of the channel region; a source electrode on the contact layer; and a drain electrode opposite to the source electrode on the contact layer, wherein the contact layer of one of the two thin-film transistors has a conductivity type different from a conductivity type of the contact layer of the other of the two thin-film transistors.

Abstract: In a flat panel display (FPD) and a method of manufacturing the same, the FPD includes a substrate, a semiconductor layer formed on the substrate, a wiring line formed on the substrate so as to be separated from the semiconductor layer, an insulating layer formed on the semiconductor layer and the wiring line, a gate electrode formed on the insulating layer formed on the semiconductor layer and extended to a top of the wiring line, and a source electrode and a drain electrode coupled to a source region and a drain region, respectively, of the semiconductor layer. Capacitance is formed by the gate electrode and the wiring line.

Abstract: A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.

Abstract: A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/?m (1×10?18 A/?m) or less. Therefore, the drive capability of the semiconductor device can be improved.

Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).