Abstract: A radio frequency (RF) switch including a common port, a first port, a second port, a first RF pathway extending between the common port and the first port, a second RF pathway extending between the common port and the second port, a first shunt path extending between the first RF pathway and ground, a second shunt path extending between the second RF pathway and ground, and a respective semiconductor switching element disposed in each of the first RF pathway, the second RF pathway, the first shunt path and the second shunt path configured to control whether the given RF pathway or shunt path is enabled or disabled at a given time, wherein a selected combination of conductivity types and control signals for the respective semiconductor switching elements are employed.

Abstract: An approach for providing a latch-up robust PNP-triggered SCR-based device is disclosed. Embodiments include providing a silicon control rectifier (SCR) region; providing a PNP region having a first n-well region proximate the SCR region, a first N+ region and a first P+ region in the first n-well region, and a second P+ region between the SCR region and the first n-well region; coupling the first N+ region and the first P+ region to a power rail; and coupling the second P+ region to a ground rail.

Abstract: Apparatus and methods disclosed herein implement a MOS resistor using the current channel of a MOS transistor. The MOS resistance R(DS) is dependent upon MOS transistor geometry and nominal gate voltage. MOS resistor terminal-to-gate voltages are averaged and applied to the MOS transistor gate such as to maintain the MOS resistor terminal voltage to current ratio, resulting in a substantially constant R(DS). R(DS) is also compensated for temperature and process variations by adjusting gate voltages via negative feedback methods.

Abstract: In one exemplary embodiment of the invention, a method includes: providing an inversion mode varactor having a substrate, a backgate layer overlying the substrate, an insulating layer overlying the backgate layer, a semiconductor layer overlying the insulating layer and at least one metal-oxide semiconductor field effect transistor (MOSFET) device disposed upon the semiconductor layer, where the semiconductor layer includes a source region and a drain region, where the at least one MOSFET device includes a gate stack defining a channel between the source region and the drain region, where the gate stack has a gate dielectric layer overlying the semiconductor layer and a conductive layer overlying the gate dielectric layer; and applying a bias voltage to the backgate layer to form an inversion region in the semiconductor layer at an interface between the semiconductor layer and the insulating layer.

Abstract: A semiconductor integrated circuit includes a user circuit and a power supply noise suppression circuit. The user circuit includes a plurality of circuit modules each containing an operation ratio control circuit. The power supply noise suppression circuit judges an amount of current fluctuation occurring in the user circuit by monitoring an operation ratio of each of the plurality of circuit modules, and controls, via each of the operation ratio control circuits, the operation ratio of a corresponding one of the circuit modules in accordance with a result of the judgment of the amount of current fluctuation.

Abstract: A power amplifier circuit, comprising: an input for receiving an input signal to be amplified; a power supply; an amplifier, coupled to the input and the power supply; and a cascode device coupled between the power supply and the amplifier. The circuit is characterized by: a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (CTAT).

Abstract: A digital, radio frequency (RF) power amplifier includes first and second RF digital to analog converters (RF DACs) and a combiner to combine output signals of the first and second RF DACs. In at least one embodiment, the digital RF power amplifier may be operated in any of a number of different operating modes by appropriately generating amplitude and phase input signals for the first and second RF DACs. A mode of operation may be selected for the digital RF power amplifier based, at least in part, on a desired average output power level of the power amplifier.

Abstract: An amplification circuit including: an input for receiving an input voltage; an output for exhibiting an output voltage; a primary amplifier configured to receive the input voltage from the input, receive a primary control voltage, first amplify the input voltage by a primary gain dependent on the control voltage, the output voltage corresponding to the first amplified input voltage, and supply the output voltage to the output; and a secondary amplifier configured to receive the input voltage from the input, second amplify the input voltage by a secondary gain, the primary control voltage corresponding to the second amplified input voltage, and supply the primary control voltage to the primary amplifier. The secondary amplifier has in operation an input admittance of at least 1 millisiemens.

Abstract: A power amplifier circuit, comprising: a final stage, comprising first and second amplifying elements for amplifying an input signal; and a driver stage, for providing the input signal to the final stage. The circuit is characterized by a first capacitor coupled between an input of the first amplifying element and an output of the second amplifying element; and a second capacitor coupled between an input of the second amplifying element and an output of the first amplifying element.

Abstract: Disclosed are systems, circuits and methods related to controlling of a radio-frequency (RF) power amplifier (PA). In some embodiments, a PA control circuit can include a first circuit configured to generate a replica base current from a base current provided to the PA, with the replica base current being representative of a collector current of the PA scaled by a beta parameter. The PA control circuit can further include a second circuit configured to generate a beta-tracking reference current from a temperature-compensated voltage and a base resistance associated with the PA. The PA control circuit can further include a current steering circuit configured to receive the replica base current and the beta-tracking reference current and generate a proportional current to a clamping node of a base driver. In some embodiments, the replica base current can be obtained by a current-mode comparison of a finger-sensed current with a ramp current.

Abstract: A power amplifier comprises a common source amplification stage and a first common gate amplification stage. The common source amplification stage includes a common source transistor for receiving a radio frequency (RF) input signal via a gate. The first common gate amplification stage is connected in cascode between a variable supply voltage source and the common source amplification stage, and amplifies an output of the common source amplification stage. The first common gate amplification stage includes a first common gate transistor, and a first gate bias controller configured to generate a first divided voltage based on a variable supply voltage of the variable supply voltage source, and to supply a first gate bias voltage generated by buffering the first divided voltage to a gate of the first common gate transistor.

Abstract: A method of forming a circuit includes forming a transimpedance amplifier having a first input node and a second input node. The method also includes forming a feedback circuit having a first transistor having a drain terminal connected to the first input node, a source terminal, and a gate terminal, a second transistor having a drain terminal connected to the second input node, a source terminal, and a gate terminal, and a third transistor having a drain terminal connected to the source terminal of the first transistor and the source terminal of the second terminal.

Abstract: A LINC power amplifier selects, based on an amplitude of an input signal, partial signals used for combination, and determines, based on the amplitude and a phase of the input signal, an amplitude and a phase of the selected partial signals so that a range of output power that the LINC power amplifier operates a given efficiency is expanded, inputs the selected partial signals to corresponding power amplifiers, and combines signals obtained by amplification of the selected partial signals by the corresponding power amplifiers.

Abstract: A Lange coupler having a first plurality of lines on a first level and a second plurality of lines on a second level. At least one line on the first level is cross-coupled to a respective line on the second level via electromagnetic waves traveling through the first and second plurality of lines. The first and second plurality of lines may be made of metal, and the first level may be higher than the second level. A substrate may be provided into which the first and second plurality of lines are etched so as to define an on-chip Lange coupler.

Abstract: A low noise amplifier (LNA) includes a bank of selectable first transistors and a bank of selectable second transistors complementary to the first transistors. The LNA also includes a plurality of switches to select one or more of the first transistors and to select one or more of the second transistors, the selected first transistors positioned in series with respect to the selected second transistors. The LNA also includes switching logic to control the plurality of switches, to simultaneously vary selection of the first transistors and the second transistors during calibration to substantially match output second-order distortion of the selected first transistors with that of the selected second transistors, to create high second-order intercept points.

Abstract: An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency.

Abstract: A ring oscillator timer circuit can include a plurality of electrical components arranged in a cascaded combination of delay stages connected in a closed loop chain. The timer circuit can begin oscillation a programmable number of gate delays after receiving a start signal. In some examples, the number of gate delays can be programmed to fractional values. In further examples, the ring oscillator timer circuit can include a counter having an input electrically coupled to an output of a reset component.

Abstract: One or more techniques and systems for a divider-less phase locked loop (PLL) and associated phase detector (PD) are provided herein. In some embodiments, a pulse phase detector (pulsePD) signal, a voltage controlled oscillator positive differential (VCOP) signal, and a voltage controlled oscillator negative differential (VCON) signal are received. An up signal and a down signal for a first charge pump (CP) and an up signal and a down signal for a second CP are generated based on the pulsePD signal, the VCOP signal, and the VCON signal. For example, CP signals are generated to control the first CP and the second CP, respectively. In some embodiments, CP signals are generated such that the CPs facilitate adjustment of a zero crossing phase of the VCON and VCOP signals with respect to the pulsePD signal. In this manner, a divider-less PLL is provided, thus mitigating PLL power consumption.

Abstract: An integrated circuit device has an LC tank circuit for frequency determination, and a switched capacitor circuit for tuning the resonant frequency of the LC tank. The switched capacitor circuit has plural sets of parallel branches, each set comprising a first branch and a second branch, the first and second branches each connecting between a first node and a second node, each branch containing a respective capacitor in series with a switch, the switched capacitor circuit being configured such that, in use, the switch of the first branch is on when the switch of the second branch is off and vice versa.

Abstract: To determine the level of frequency drift of a crystal oscillator as a result of a change in the its temperature, the temperature of the crystal oscillator is sensed and used together with previously stored data that includes a multitude of drift values of the frequency of the crystal oscillator each associated with a temperature of the crystal oscillator. Optionally, upon initialization of a GPS receiver in which the crystal oscillator is disposed, an initial temperature of the crystal oscillator is measured and a PLL is set to an initial frequency in association with the initial temperature. When acquisition fails in a region, the ppm region is changed. The temperature of the crystal oscillator is periodically measured and compared with the initial temperature, and the acquisition process is reset if there is a significant change in temperature. The GPS processor enters the tracking phase when acquisition is successful.

Abstract: A ferrite element for a switchable circulator comprises a first segment extending in a first direction from a center portion of the ferrite element; a second segment extending in a second direction from the center portion of the ferrite element; and a third segment extending in a third direction from the center portion of the ferrite element. Each of the first segment, the second segment, and the third segment include a first channel located at a first distance from a center point of the ferrite element. The first distance defines a first resonant section of the ferrite element. Each of the first segment, the second segment, and the third segment also include a second channel located at a second distance from the center point. The second distance defines a second resonant section of the ferrite element.

Abstract: A ferrite element for a circulator comprises a first segment extending in a first direction from a center portion of the ferrite element; a second segment extending in a second direction from the center portion of the ferrite element; and a third segment extending in a third direction from the center portion of the ferrite element. Each of the first segment, the second segment, and the third segment has a respective width and include a channel located at a respective distance from a center point of the ferrite element. At least one of the respective width of each segment or the respective distance from the center point for the channel in each segment is different for each respective segment such that the first segment operates over a first frequency sub-band, the second segment operates over a second frequency sub-band, and the third segment operates over a third frequency sub-band.

Abstract: Systems and methods for a waveguide circulator with tapered matching component are provided. In certain embodiments, a waveguide structure comprises a plurality of waveguide arms; an internal cavity; a plurality of tapered matching components, wherein each tapered matching component in the plurality of tapered matching components has a narrow taper end that is connected to the internal cavity and a wide taper end that is connected to a waveguide arm in the plurality of waveguide arms, wherein the narrow taper end is narrower than the wide taper end; and a ferrite element having ferrite element segments disposed in the internal cavity, wherein a segment extends through the narrow taper end and the narrow taper end of the tapered matching component is narrower than the wide taper end such that a magnitude of impedance difference between each waveguide arm and the internal cavity containing the ferrite element is reduced.

Abstract: A device comprises a waveguide structure that includes multiple arms extending from the structure, wherein the arms connect to the structure; a switching element disposed in the structure and having multiple segments, each segment being associated with a waveguide arm, wherein the switching element has an E-plane aperture extending through the switching element, wherein the E-plane aperture is aligned perpendicularly to the H-plane; and an E-plane magnetizing winding inserted through the E-plane aperture such that current applied to the E-plane magnetizing winding establishes a magnetic field in the switching element that is aligned with the H-plane.

Abstract: Signals sent between a first device and a second device are split. A first user adjustable input signal equalization and gain compensates for losses to signals from the first device before the compensated signals are forwarded to the second device, a first analytic instrument and a second analytic instrument. A second user adjustable input signal equalization and gain compensates for losses to signals from the second device before the first compensated signals are forwarded to the first device, the first analytic instrument and the second analytic instrument.

Abstract: The invention relates to an amplifier module, comprising at least one amplifier (PA), an antenna port (ANT), a transmission port (TX), a reception port (RX), and a circuit arrangement having at least three 90 DEG hybrids (HYB1, HYB2, HBY3), which each divide a respective input signal into two output signals, wherein the two output signals have a relative phase shift of 90 DEG from each other, wherein the antenna port (ANT), the transmission port (TX), and the reception port (RX) are each connected to at least one 90 DEG hybrid (HYB1, HYB2, HBY3).

Abstract: An electromagnetic resonance coupler including: a transmitting resonator provided on a transmission substrate and having an open loop shape having an opening, first wiring provided on the transmission substrate and connected to a first connection point on the transmitting resonator, a receiving resonator provided on the reception substrate, second wiring provided on the reception substrate and connected to a second connection point on the receiving resonator, and third wiring provided on the reception substrate and connected to a third connection point on the receiving resonator. When viewed in a direction perpendicular to a main surface of the transmission substrate, the transmission substrate and the reception substrate are provided facing each other so that the transmitting resonator and the receiving resonator are symmetric about a point and have matching contours.

Abstract: A combiner/divider circuit may include a plurality of planar transmission lines that each may have a planar signal conductor and at least a planar signal-return conductor. Ends of different ones of the signal conductors of the plurality of transmission lines may interconnect with the signal conductor of a first transmission line may be connected to the signal conductors of second and third transmission lines. Signal-return conductors of the first, fourth, and fifth transmission lines may be connected along their lengths. Vias may connect signal-return conductors of the second and third transmission lines with respective signal conductors of the fourth and fifth transmission lines. The positions of the fourth and fifth striplines relative to the first strip line may reverse in a transition region spaced from the connection region.

Abstract: An acoustic wave filter includes: at least a parallel resonator, wherein at least one of the parallel resonator includes a piezoelectric substance, an IDT located on the piezoelectric substance, and reflectors located on the piezoelectric substance so as to sandwich the IDT, and a distance between a first electrode finger that is an electrode finger closest to the reflector among electrode fingers of the IDT and a second electrode finger that is an electrode finger closest to the IDT among electrode fingers of the reflector is less than 0.25(?IDT+?ref) where a period of the electrode fingers of the IDT is ?IDT and a period of the electrode fingers of the reflector is ?ref.

Abstract: A multimode elastic wave device includes a pair of reflectors, and a first interdigital transducer (IDT) electrode through a fifth IDT electrode arranged between the pair of reflectors. In this configuration, each of the average of electrode-finger pitches in the first IDT electrode and the average of electrode-finger pitches in the fifth IDT electrode is smaller than both of the average of electrode-finger pitches in the second IDT electrode and the average of electrode-finger pitches in the fourth IDT electrode.

Abstract: The present invention relates to a waveguide E-plane filter component (1) comprising a first and second main part (2: 4) with a corresponding first and second waveguide section part (3, 5). The main parts (2, 4) are arranged to be mounted to each other, such that an open side (8) of the first waveguide section part (3) is arranged to face an open side (9) of the second waveguide section part (5). The E-plane filter component (1) further comprises at least one electrically conducting foil (10, 11) that is arranged to be placed between the main part (2, 4), Said foil (10, 11) have a longitudinal extension (L) and comprises a filter part (12) that is arranged to run between the waveguide section parts (3, 5), and is divided into a first filter part (13) and a second filter part (14) by an imaginary symmetry line (15) running along the longitudinal extension (L) in the middle of the filter part (12).

Abstract: A circuit substrate has three wiring layers, wherein a signal line is formed in a first wiring layer; a ground plane is formed in a second wiring layer; a resonant line is formed in a third wiring layer. A circumferential slit is formed in the ground plane, wherein an island electrode separated from the ground plane is formed inside the slit. The left end of the resonant line is connected to the island electrode through an interlayer-connecting via, while the right end of the resonant line is connected to the ground plane through an interlayer-connecting via. A transmission line (or a microstrip line) is formed using the signal line and the ground plane, and therefore a complex resonator is formed to embrace the transmission line. This achieves band elimination with regard to a signal component of a resonance frequency among signals propagating through the microstrip line.

Abstract: Provided is a wiring board including: a board; a differential transmission line constituted by two wirings disposed on the board in parallel; an insulation resin layer which is formed on part of a face of the board. A stepped portion constituted by a lateral face of the insulation resin layer is formed at a boundary between the face of the board and a top face of the insulation resin layer. The two wirings extend from the face of the board to the top face of the insulation resin layer so as to traverse the stepped portion. The extending direction of the wirings traversing the stepped portion and the direction of a periphery are perpendicular to each other in a plan view of the board, the periphery being defined by a boundary between the top face of the insulation resin layer and the lateral face of the insulation resin layer.

Abstract: A resonance coupler includes transmission-side resonant wiring provided on a transmission substrate and connected to a transmission ground between a connection point of first transmission wiring to the transmission-side resonant wiring and a connection point of second transmission wiring to the transmission-side resonant wiring, and reception-side resonant wiring provided on a reception substrate and connected to a reception ground between a connection point of first reception wiring to the reception-side resonant wiring and a connection point of second reception wiring to reception-side resonant wiring. When viewed in a direction perpendicular to a main surface of the transmission substrate, the transmission substrate and the reception substrate are provided facing each other so that the transmission-side resonant wiring and the reception-side resonant wiring are symmetric about a point and have matching contours.

Abstract: A reed switch includes an envelope, a first fixed terminal piece, a second fixed terminal piece, a third fixed terminal piece, a movable reed piece, a first spring member, a second spring member, and a third spring member. The movable reed piece has a base end portion, a distal end portion, and a movable contact portion. A distal end portion of the second spring member is farther from the first spring member than a base end portion of the second spring member in a state where the movable contact portion is spaced apart from a distal end portion of the first spring member and the distal end portion of the second spring member.

Abstract: A magnetic holding device uses an array of switchable magnets. A carrier holds the array of switchable magnets to form a working surface. Each switchable magnet has a coil of wire surrounding a magnetizable core element. The array is arranged in groups of magnets. A circuit is coupled to the coils to selectively magnetize and demagnetize each group of switchable magnets to selectively independently place each group into one of these states: an ON state that configures the selected group to have a first magnetic polarity at the working surface, an ON state that configures the selected group to have an opposite magnetic polarity at the working surface, and an OFF state that configures the magnets in the selected group to have no magnetism at the working surface. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: A magnetic material suitable for a coil component has multiple metal grains constituted by Fe—Si-M soft magnetic alloy (where M is a metal element that oxidizes more easily than Fe) and oxide film formed on the surface of the metal grains, wherein such magnetic material includes a grain compact having bonding parts where adjacent metal grains are bonded together via the oxide film formed on their surface, and bonding parts where metal grains are directly bonded together in areas where oxide film does not exist. The magnetic material is capable of improving both insulation resistance and magnetic permeability.

Abstract: A coil (60). The coil (60) comprises a conductor formed in the shape of winding layers (68). The conductor comprises an insulating coating (96) surrounding a conductive core (94). The coil further comprises paper strips (80) disposed proximate one or more of the winding layers (68) to provide strain relief against mechanical forces exerted on the coil (60) and to provide electrical insulation between winding layers (68). In an embodiment where the coil (60) further comprises a core (70) the paper strips (80) are beneficially disposed at corners (70A, 70B, 70C, and 70D) of the core (70) and further between winding layers (68) at the corners (70A, 70B, 70C, 70D).

Abstract: A method of producing an inductor with high inductance includes forming a removable polymer layer on a temporary carrier; forming a structure including a first coil, a second coil, and a dielectric layer on the removable polymer layer; forming a first magnetic glue layer on the removable polymer layer and the structure; removing the temporary carrier; and forming a second magnetic glue layer below the structure and the first magnetic glue layer.

Abstract: A high leakage inductance transformer core device, and method of forming same, that has a core made of tape wound material, at least one set of concentric primary and secondary windings, and at least one flux shunt between the primary and secondary windings which is also made of tape wound material. The transformer core and flux shunts are arranged so that the transformer has a low external magnetic field, and substantially no excess core losses due to principal core flux flowing from one part of the core structure to another through the broad surface of the core tape.

Abstract: In order to be able to industrially produce a transposed conductor having jointly transposed partial conductors located next to one another, the invention proposes that the rounding of at least one edge (15) of a single conductor (11) of a single conductor group (12) that limits a contact surface (14) between two single conductors (11) located next to one another is embodied with a smaller radius (r2) than the radii (r1) of the roundings of the outer edges (13) of the single conductor group (12).

Abstract: The present invention relates to an inductor and a method of manufacturing an inductor and provides an inductor which can minimize the area required for mounting, reduce parasitic capacitance generated between a circuit pattern of a substrate and a coil pattern of the inductor, and be efficiently manufactured by providing both of a first external electrode portion and a second external electrode portion on one of six surfaces of the inductor while including a coil pattern portion; an insulating portion; the first external electrode portion; and the second external electrode portion.

Abstract: The present invention concerns a composite iron-based powder mix suitable for soft magnetic applications such as inductor cores. The present invention also concerns a method for producing a soft magnetic component and the component produced by the method.

Abstract: A thermal protector for opening and closing an electric circuit, includes: a movable plate having a movable contact point mounted on a one end portion thereof and having a terminal mounted on an opposite end portion thereof; a bypass member joined to the movable plate at the end portions of the movable plate on which the movable contact point and the terminal are mounted; and a thermal responsive element for moving the movable contact point of the movable plate by a snap action thereof to open and close the electric circuit, wherein the bypass member is formed of a first metal material having a higher conductivity than a second metal material of which the movable plate is formed, and the movable plate and the bypass member are joined together and are subjected to heat treatment so that the first metal material of the bypass member is softened while the second metal material of the movable plate is precipitation-hardened.

Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

Abstract: An over-current protection device comprises a PTC material layer, a first electrode layer and a second electrode layer. The PTC material layer has opposite first and second surfaces and opposite first and second lateral surfaces. The first electrode layer is in physical contact with the first surface of the PTC material layer and extends to the first lateral surface. The second electrode layer is in physical contact with the first surface of the PTC material layer and extends to the second lateral surface. The second electrode layer is insulated from the first electrode layer by a first separation. The first electrode layer and the second electrode layer are substantially laterally symmetrical, and serve as interfaces for current flowing in and out of the device when the over-current protection device is in use.

Abstract: There are provided a chip resistor and a method of manufacturing the same. The chip resistor includes a ceramic substrate; an adhesion portion formed on a surface of the ceramic substrate; and a resistor formed on the adhesion portion, wherein the adhesion portion includes at least one of copper (Cu), nickel (Ni), and copper-nickel (Cu—Ni).

Abstract: A security device includes a shield having at least one first and second conductive wire, first and second logic units, and a detecting unit. The first logic unit is configured to receive a first pattern signal, transmit data based on the first pattern signal through the at least one first conducting wire, and output a detection pattern signal based on data received through the at least one second conducting wire. The second logic unit is configured to perform a logical operation on the data received through the at least one first conducting wire, and transmit a result of the logical operation through the at least one second conducting wire. The detecting unit is configured to provide the first pattern signal to the first logic unit, receive the detection pattern signal from the first logic unit, and detect an unauthorized access attempt.

Abstract: Methods, devices, and systems are provided for optimizing the dissemination of information in various types of systems such as an access control system. More specifically, there are provided herein various mechanisms to provide a modified agent path such that an agent following the modified agent path, may update at least one non-networked reader. The update of the at least one non-networked reader not occurring if the agent follows an unmodified agent path.

Abstract: An electronic system including a mobile device that communicates with a reader device. In one embodiment, the mobile device may be configured as a mobile phone and the reader device may be configured as an electronic reader associated with an electronic lock. One or more devices in the system may determine the position of the mobile device in relation to the reader device, and cause an electronic lock or another type of access control device to perform a selected function based at least in part on the position of the mobile device in relation to the reader device.