Abstract: An active damping switching system can include an active damper apparatus having a stabilization resistor, a stabilization switch coupled to the stabilization resistor, an active damper controller coupled to the stabilization switch, a current sensor coupled to the active damper controller. The system can further include a direct current power source coupled to the active damper apparatus, a constant power load and an input filter disposed between the constant power load and the active damper apparatus.

Abstract: A zero voltage switching (ZVS) technique for use in isolated and non-isolated switching power converters and regulators, e.g. based upon buck, boost, buck-boost, and double-clamped topologies is disclosed. During a reverse energy phase of the converter operating cycle, energy is transferred in reverse from the load or the clamp capacitor to the inductor, allowing the current in the inductor to increase in magnitude with a reverse polarity, building up reverse energy. The reverse energy may be used for charging and discharging parasitic and other circuit capacitances for ZVS. The reverse energy phase is adjusted based upon circuit operating conditions, so that the amount of energy stored in the inductor L at the end of the reverse energy phase is approximately equal to, but preferably no greater than, that required to turn the switches ON at substantially zero voltage. Thus full ZVS may be achieved under a wide variety of operating conditions without incurring unnecessary losses.

Abstract: In accordance with the invention there is also provided a voltage combiner comprising: a transformer having a first and second winding each having a first and second tap; and an inductor connected between the first and second taps of the second winding, wherein: the first tap of the first winding is adapted for connection to a first voltage, the first tap of the second winding is adapted for connection to a second voltage, and the second tap of the second winding is adapted to provide an output being the first and second voltages combined, and further wherein: the inductor is adapted to provide a bypass path for the current associated with the second voltage.

Abstract: The invention relates to an on-load tap changer comprising semiconductor switching elements for uninterrupted switching between winding taps of a tapped transformer. According to the invention, contact bars are provided which extend in the direction of the path of the fixed tap contacts and can be contacted using contact bridges that can be jointly moved by a contact slide in such a way that direct electrical connections to the charge diverter and electrical connections to the inputs and the output of the semiconductor switching elements can be established.

Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

Abstract: A DC-DC converter transforms a DC input voltage to generate a DC output voltage by complementary switching control of a main switching transistor and a synchronous rectifying transistor. The DC-DC converter includes a soft-start circuit configured to generate a soft-start voltage rising from an initial voltage at start-up of the DC-DC converter; and a control circuit configured to control switching of the main switching transistor and the synchronous rectifying transistor based on the soft-start voltage to perform soft start of the DC-DC converter. The control circuit brings both of the main switching transistor and the synchronous rectifying transistor to an off state while the soft-start voltage is lower than the DC output voltage.

Abstract: A switching power supply unit of a non-insulated, synchronous rectification type converts a voltage input to an input terminal into a predetermined voltage and outputs the voltage. The unit includes an inductor, a plurality of output switching elements, a plurality of rectifying switching elements, a switching element control circuit, a switching regulator integrated circuit, and a plurality of buffer circuits. The output switching elements, the rectifying switching elements, the switching element control circuit and the buffer circuits are integrated on the switching regulator integrated circuit.

Abstract: A power conversion circuit and method of formation is provided, which in one embodiment includes a transistor, a driver circuit having an output connected to a control electrode of the transistor and having a bootstrap port configured to be connected to a first terminal of a capacitor; a switch circuit having a first port connected to a current carrying electrode of the transistor and having a ground port connected to a ground, a capacitor port configured to be connected to a second of the capacitor, a first switch configuration in which the capacitor port is connected to the first port, and a second switch configuration in which the capacitor port is connected to the ground port.

Abstract: A controller for regulating an output of a power supply includes a logic block and an oscillator. The logic block generates the drive signal to control switching of a power switch in response to a clock signal. The clock signal has a frequency that decreases responsive to a time period of the drive signal, where a decrease in the time period of the drive signal represents an increase in an input voltage of the power supply. The oscillator is coupled to generate the clock signal in response to a waveform having an amplitude swing. The oscillator alters the waveform in response to the time period of the drive signal.

Abstract: An apparatus and method are provided for controlling circuit resistance values used for detection of a device in an inline powered system. The system comprises a source device, either a current source or a voltage source, associated with an inline power device. The system also comprises a resistance control circuit comprising a transistor having an emitter, a base and a collector, and a first resistor coupled between the emitter and the collector. In response to the resistance control circuit receiving a relatively low current from the source device, the transistor is configured to be in an off state so that current from the source device flows through the first resistor have a value selected in order to maintain a sufficient resistance during an inline power device detection mode.

Abstract: Provided is a voltage regulator including a phase compensation circuit capable of obtaining an accurate output voltage. The phase compensation circuit includes: a first constant current circuit connected to a gate of an output transistor; a first transistor having a drain connected to the gate of the output transistor; and a second transistor having a drain connected to a gate of the first transistor, a second constant current circuit, and a resistor and having a gate connected to the resistor and any one terminal of a first capacitor, the first capacitor having the other terminal connected to an output terminal of the voltage regulator. This configuration prevents a current from flowing from an output terminal of the differential amplifier circuit to the drain of the first transistor, to thereby reduce an offset voltage to be generated in input transistors of the differential amplifier circuit, thus obtaining an accurate output voltage.

Abstract: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.

Abstract: A geometry sensor includes: a detection surface including a plurality of polymer sensor elements and configured to detect an external object, the polymer sensor elements being arranged side-by-side along one or more directions and each generating a voltage according to a deformation; and a detecting section detecting a surface geometry of a region in the external object that is in contact with the detection surface, based on the voltage obtained from each of the polymer sensor elements in the detection surface.

Abstract: A test apparatus for a broadband telecommunication network. The apparatus includes a DC power source having a first electrical terminal and a second electrical terminal and a DC feeding bridge having a pair of inputs coupled to the first and second electrical terminals of the DC power source. The first electrical circuit having at least one circuit section having a transformer-coupled impedance formed by at least one transformer connected in parallel to a first impedance, and a pair of outputs that are adapted for establishing electrical contact with a device under test (DUT) configured to be disposed on a pair of transmission lines of the broadband telecommunication network.

Abstract: An electric field sensor comprises an insulating substrate, a plurality of non-contacting electrodes disposed on the substrate, and a plurality of conductors coupled to the electrodes, and extending transversely through the substrate. The electrodes comprise a first electrode portion, and a second electrode portion interlaced with the first electrode portion. The conductors comprise a first conductor portion and a second conductor portion. The first portion of the conductors are coupled to the first electrode portion. The second portion of the conductors are coupled to the second electrode portion.

Abstract: A voltage measurement circuit is operative to measure a high voltage AC signal and includes a capacitive divider circuit and a compensator circuit. The capacitive divider circuit includes first and second inputs, across which, in use, is received a high voltage AC signal and also includes second and third capacitors. First and second plates of each of the first, second and third capacitors are defined by conductive layers of a printed circuit board and the dielectric of each of the first, second and third capacitors being defined by a non-conducting part of the printed circuit board. A compensator circuit has a configurable transfer function and includes an input connected across the first and second plates of the third capacitor and an output. The compensator circuit is operative to change a voltage received at its input in accordance with the transfer function and to provide the changed voltage at its output.

Abstract: Embodiments relate to omnipolar magnetic field switches. In one embodiment, omnipolar behavior is generated in a Hall effect switch by extracting the modulus of the electric signal generated by the Hall transducer and feeding it to a single high-precision comparator, without any sampling or additional processing steps. The modulus extraction and threshold evaluation can be done in parallel.

Abstract: An angle detection system of the present invention includes: a stator 200 which includes a plurality of salient pole portions which are formed on a flat sheet made of a magnetic material and are raised by bending, each salient pole portion constituting a winding magnetic core on which a winding member for excitation and a winding member for detection are mounted; and a rotor 300 which is made of a magnetic material and is configured to be rotatable relative to the stator such that gap permeance between the rotor and each salient pole portion is changed due to the rotation thereof about a rotational axis thereof. According to the angle detection device of the present invention, it is possible to provide the angle detection device which can largely reduce the number of parts and can realize the reduction of cost and the enhancement of reliability.

Abstract: A sensor circuit is configured and operated in the presence of interference. In connection with various example embodiments, a stray magnetic field is sensed with current sensors that also respectively sense current-induced magnetic fields generated by current flowing in opposing directions through different portions of a conductor. The current-induced magnetic fields and the stray magnetic field are coplanar, and the current sensors are arranged such that a portion of the output from each current sensor corresponding to the stray magnetic field is canceled when the sensor outputs are combined.

Abstract: Methods and apparatus for detecting an electromagnetic wave are provided. A device for use in an electromagnetic wave detector includes a first device layer having a first contact, a second device layer having a second contact, and a tunnel barrier layer and a resonating magnetic layer formed between the first and second device layers. The resonating magnetic layer produces a spin current responsive to an electromagnetic wave that extends into the first and second device layers. A charge differential present between the first and second contacts is dependent on the spin current.

Abstract: A ring-shaped first ring-shaped magnetic core, a first excitation coil wound on the first ring-shaped magnetic core, two detection coils wound on the first ring-shaped magnetic core in such a manner that respective input axes of the detection coils are orthogonal to each other, two signal detection/feedback units that detect outputs of the detection coils and feed output signals back to the detection coils, and a first excitation circuit that supplies an excitation current to the first excitation coil are provided, a second ring-shaped magnetic core, a compensation coil wound on the second ring-shaped magnetic core, and a compensation signal generation unit that generates, from an output of a detection coil, a compensation current to be applied to the compensation coil, are further provided, and the second ring-shaped magnetic core and the compensation coil are disposed in positions and directions so that a compensation magnetic field created by the compensation coil cancels interference between magnetic fiel

Abstract: A microfluidic cell comprising: a microfluidic channel (32) for receiving a fluid sample; and a sensor (30) located adjacent the microfluidic channel; wherein the sensor comprises a diamond material comprising one or more quantum spin defects (34). In use, a fluid sample is loaded into the microfluidic cell and the fluid is analyzed via magnetic resonance using the quantum spin defects.

Abstract: An apparatus and method for estimating a parameter of interest of an earth formation. An apparatus includes an elongated support member; a primary transmitter on the elongated support member; and a receiver toroid on the elongated support member, the receiver toroid being positioned transversely on the elongated support member and including a single coil antenna. Methods include positioning a logging tool in a borehole in the earth formation; using a transverse receiver toroid on an elongated support member on the logging tool, wherein the transverse receiver toroid includes a single coil antenna; and producing a signal responsive to an electrical signal produced by a primary transmitter.

Abstract: The present disclosure relates to methods and systems for detecting electric potential difference in water. A first electrode comprising a first electrode body is configured to be in electrical contact with the water when the device is disposed in the water. A second electrode comprising a second electrode body is configured to be in electrical contact with the water when the device is disposed in the water. An electrical connection exists amongst the first electrode, the second electrode, and a voltage measuring device. At least one of the first electrode body and the second electrode body is formed at least partially of a carbon aerogel material.

Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.

Abstract: The present invention relates to a device for system components of a high-voltage impulse test system, preferably for quality assurance of power transformers. According to the invention, a common base frame having only one main electrode common to the system components is proposed for the spatial collection of the system components.

Abstract: An apparatus for detecting deterioration of a lightning arrester includes: a high-frequency power supply; a pair of detecting terminals 12 connected to the high-frequency power supply via a resistance for measurement and touched to the terminals of the arrester; a voltage detecting circuit for obtaining a terminal voltage of the resistance for measurement when the detecting terminals touch the terminals of the arrester; and a determining circuit for comparing the detected voltage with a reference value to determine whether the detected voltage is good or bad. A voltage having a frequency sufficiently higher than the operation frequency of a power line is generated by the high-frequency power supply and applied to the arrester, and change in electrical characteristics due to deterioration of zinc oxide elements is detected as change in current including capacitive current, and then it is determined whether the detected change is good or bad.

Abstract: A wireless sensor having a primary passive electrical resonant circuit that has an intrinsic electrical property that is variable in response to a characteristic of a patient and a secondary passive electrical resonant circuit. In one aspect, the primary passive resonant circuit can be positioned into a tuned position in response to the actuation of the secondary passive electrical resonant circuit. In a further aspect, in the tuned position, the primary passive electrical resonant circuit, in response to an energizing signal produced by an ex-vivo source of RF energy, is configured to generate a sensor signal characterized by a resonant frequency that is indicative of the characteristic.

Abstract: A system and method for providing electromagnetic imaging through electroquasistatic sensing contains an electromagnetic sensor for imaging a sample. The electromagnetic sensor contains drive/sense electronics and a pixelated sensor array having an array of capacitive sensor electrodes that source electric fields that interact with the sample, and wherein the electrodes are individually drivable by the drive/sense electronics in a coordinated manner to establish a desired temporal and spatial pattern in which electrical properties of the electrodes are used to generate an image. Other components of the system include a precision motion controller, sensor head and associated electronics, and a computer for performing data acquisition and signal inversion.

Abstract: A surface-conforming obscured feature detector includes a plurality of sensor plates, each having a capacitance that varies based on the dielectric constant of the materials that compose the surrounding objects and the proximity of those objects. A sensing circuit is coupled to the sensor plates 32 to measure the capacitances of the sensor plates. A controller is coupled to the sensing circuit to analyze the capacitances measured by the sensing circuit. One or a plurality of indicators are coupled to the controller, and are selectively activated to identify the location of an obscured feature behind a surface.

Abstract: This invention concerns a method and devices for calibrating a partial discharge measuring device and for locating faults on cables. In the method, calibration signals, which can include a band-limited white noise, are used with a periodically repeated signal course. By averaging over a predetermined period duration (T) of the calibration signal, it is possible, in the case of a partial discharge measurement, to recalibrate the measuring device continuously during the measurement, and additionally on cables to determine the fault location with great precision.

Abstract: The probe pin includes a plunger formed of a sheet metal, and a coil spring unit formed of a metal wire and configured to hold the plunger thereon. In a developed state, the plunger includes first and second portions each of which has an upper contact strip, a wide portion, and a lower contact strip, and which are connected to each other via the wide portions formed in the first and second portions. The plunger is formed in a united manner by folding together the first and second portions along a boundary of the wide portions formed therein to thereby bring at least the wide portions into tight contact with each other.

Abstract: An apparatus includes a plurality of die areas having integrated circuit (IC) die each having circuit elements for performing a circuit function, and scribe line areas between the die areas. At least one test module is formed in the scribe line areas. The test module includes a reference layout that includes at least one active reference MOS transistor that has a reference spacing value for each of a plurality of context dependent effect parameters, and a plurality of variant layouts. Each variant layout provides at least one active variant MOS transistor that provides a variation with respect to the reference spacing values for at least one of the plurality of context dependent effect parameters.

Abstract: An integrated circuit includes switching circuits for selectively connecting the bond pads to functional core logic and isolating the bond pads from second conductors, and the switch circuits for selectively connecting the bond pads to the second conductors to provide bi-directional connections between the bond pads on opposite sides of the substrate and isolating the bond pads from the functional core logic.

Abstract: The present disclosure relates to assessing coverage of a connection joint, such as a solder joint, between a device and a printed circuit board (PCB). In accordance with various embodiments, a PCB includes a conductive thermal pad adapted to be electrically and mechanically connected to an exposed pad of a component by an intervening connection joint to establish a thermal path to dissipate thermal energy from the component. An isolated test via that extends through the conductive thermal pad in non-contacting relation thereto, the test via adapted to mechanically and electrically contact said intervening connection joint. A coverage characteristic of the intervening connection joint can be determined in relation to application of an electrical signal to the test via.

Abstract: A method for the design and manufacturing of a 3D semiconductor device including a first circuit stratum and a second circuit stratum, the method including: applying a synthesis tool with at least first and second technology libraries; and performing a synthesis that utilizes the at least first and second technology libraries, where the first and second technology libraries correspond to two different processes, where the first technology library targets the first circuit stratum and the second technology library targets the second circuit stratum, and where the performing a synthesis results in a netlist, the netlist includes first cells of the first technology library and second cells of the second technology library.

Abstract: Systems, pipeline stages, and computer readable media for advanced asynchronous pipeline circuits are disclosed. According to one aspect, the subject matter described herein includes a configurable system for constructing asynchronous application specific integrated data pipeline circuits. The system includes multiple modular circuit stages that are connectable with each other using transitional signaling and with other circuit elements to form multi-stage asynchronous application-specific integrated data pipeline circuits for asynchronously passing data through a series of stages based on a behavior implemented by each stage. The modular circuit stages each include sets of logic gates connected to each other for implementing the behaviors, the behaviors including at least one of conditional split, conditional select, conditional join, merge without arbitration, and stage arbitration.

Abstract: The embodiments described provide connection structures for dies in an integrated circuit die stack. Each die in the die stack includes a functional circuitry, a programmable array and a programmable array control unit. By triggering the programmable array control unit to program corresponding programmable array in each die of the die stack, signal routes are orchestrated to connect to corresponding functional circuitry in each die of the die stack to enable the entire die stack to meet functional goals. In addition, specific die(s) in the die stack may be bypassed by issuing control command to the programmable array control unit. Die(s) may be bypassed to meet functional goals and to improve yield, and reliability.

Abstract: A programmable analog device and an analog device that can retain data even when supply of a power supply potential is interrupted and consumes less power. In a semiconductor device, first to fourth transistors are used as switches in a unit cell including an analog element, and the output of the unit cell switches between a conducting state, a non-conducting state, and a conducting state through the analog element by controlling the potential of a first node where the first transistor and the second transistor are connected and the potential of a second node where the third transistor and the fourth transistor are connected.

Abstract: Apparatus and methods advantageously maintain transistors of open-drain differential pairs biased in the saturation region when “active,” rather in than the triode or linear region. The biasing techniques are effective over a broad range of process, voltage, and temperature (PVT) variations. By controlling a high voltage level used to drive the gate of a transistor of the differential pair, the biasing of the transistor in the saturation region is maintained. In one embodiment, the low voltage level used to cut off the transistor of the differential pair is also controlled. These techniques advantageously permit differential drivers to exhibit relatively large output swings, relatively high edge rates, relatively high return loss, and relatively good efficiency.

Abstract: An interface device for connection between two electronic components of an electronic circuit, includes: an input terminal, an output terminal and a reference terminal, an input voltage between the reference and input terminals, an output voltage between the reference and output terminals, an input impedance, and an output voltage gain, at least one resistance connected to at least one terminal among the input and output terminals, at least one analog switch positioned between the output and reference terminals, the switch having a closed or an open state, and control elements for each switch, at least one parameter among the input impedance and the output voltage gain of the device having distinct values as a function of whether the analog switch is closed or open, each analog switch including at least one N-type field effect controllable transistor and one P-type field effect controllable transistor connected in series.

Abstract: In one embodiment, a method includes generating a first signal based on a clock signal and generating a second signal based on a programmable delayed clock signal. The method then generates a reset signal based on the first signal and the second signal. The clock signal is delayed using an inverter chain to generate a delayed version of the clock signal. An output signal is generated based on the delayed version of the clock signal and the reset signal. When a pulse width of the output signal is greater than a data duration determined from the clock signal, the pulse width of the output signal is reset to the pulse width of the data duration.

Abstract: Logic circuits using neuristors is described. In an example, a circuit includes a plurality of neuristors each producing an output voltage spike in response to a super-threshold input voltage. A plurality of impedances couple the plurality of neuristors to form at least one input and an output, the output selectively providing an output voltage spike based on a logical operation of at least one input voltage at the at least one input.

Abstract: A clock phase shift detector circuit may include a phase detector that receives a first and a second clock signal, whereby the phase detector generates a phase signal based on a phase difference between the first and the second clock signal. A first integrator is coupled to the phase detector, receives the phase signal, and generates an integrated phase signal. A second integrator receives the first clock signal and generates an integrated first clock signal. A comparator is coupled to the first and the second integrator, whereby the comparator receives the integrated phase signal and the integrated first clock signal. The comparator may then generate a control signal that detects a change between the phase difference of the first and the second clock signal and an optimized phase difference based on an amplitude comparison between the integrated phase signal and the integrated first clock signal.

Abstract: An I/O circuit for use with an industrial controller provides a zero-crossing detector circuit with low power dissipation through the use of a zero-crossing circuit that activates a light emitting diode of a photo coupler only for a very brief period of time at the zero-crossing (as opposed to at all times other than the zero-crossing). The circuit is coupled with a power supply circuit that uses a reactive element for voltage dropping as opposed to a resistive voltage drop element further reducing power consumption possible with the low power consumption of the photo coupler.

Abstract: The present document relates to a method and system for determining the voltage level of an input signal compared to a reference voltage, providing a plurality of level indications regarding an input voltage with respect to a reference voltage. The multi-level comparator comprises an input stage converting the input voltage into a first current and converting the reference voltage into a second current; and a plurality of comparator stages, each comprising a first current amplification unit amplifying the first current with a first gain, a second current amplification unit amplifying the second current with a second gain, and an output port providing an indication whether the first comparator current is smaller or larger than the second comparator current; wherein respective ratios of the first gain and the second gain of the plurality of comparator stages are different.

Abstract: A semiconductor device (11) having a switching function of being turned on or off according to a voltage (Vge) of a driving signal supplied to a gate thereof is driven by generating a feedback voltage (VFE) based on a time change (dI/dt) of a collector current (Ic) of the semiconductor device (11) and applying the feedback voltage (VFE) as part of the voltage (Vge) of the driving signal when the semiconductor device (11) is switched from on to off.

Abstract: A control circuit arrangement for pulse-width modulated DC/DC converters includes a phase generator for a complementary driver which provides respective gate signals to a first and second driver transistor in response to a control signal. A clock control circuit receives a clock signal and a pulse-width modulated signal and provides the control signal in response to a signal edge of the pulse-width modulated signal and the clock signal applied thereto. A mode selection input terminal receives a mode selection signal to select a first mode or a second mode of operation. The phase generator provides in the first mode each of the gate signals the control signal and the respective other gate signal. In the second mode of operation, it provides each gate signal in response to the control signal.

Abstract: The transistor suffers the variation caused in threshold voltage or mobility due to gathering of the factors of the variation in gate insulator film resulting from a difference in manufacture process or substrate used and of the variation in channel-region crystal state. The present invention provides an electric circuit having an arrangement such that both electrodes of a capacitance element can hold a gate-to-source voltage of a particular transistor. The invention provides an electric circuit having a function capable of setting a potential difference at between the both electrodes of the capacitance element by the use of a constant-current source.

Abstract: A driver comprises, an input block for receiving one or more data signals and one or more control signals; a data control block for processing the data signals and the control signals to determine one or more modified control signals, wherein the modified control signal is determined as a function of one or more de-emphasis signals, one or more pre-emphasis signals, and the control signals; and a driver block for receiving the modified control signals and generating one or more output data signals.