Abstract: A driving circuit has output terminal connected to an ultrasonic transducer and provides an output voltage. The driving circuit includes an output transistor coupled between a voltage reference and the output terminal, a high voltage comparator coupled to said output terminal and to a threshold voltage reference), a start-up circuit controlled by a setting signal; and a switching ON/OFF circuit having an input coupled to the start-up circuit an input coupled to the comparator, and an output coupled to a control terminal of the output transistor. The start-up circuit provides an ON signal to the switching on/off circuit and the comparator provides an OFF signal to the switching on/off circuit which switches off the output transistor. The high voltage comparator generates the switching off signal in response to the output voltage reaching a desired supply voltage value which depends on the value of the first threshold voltage reference.

Abstract: A circuit for detecting a voltage change is described. The circuit includes a supply insensitive pulse generator that generates a pulse signal. The circuit also includes a time-to-digital converter coupled to the supply insensitive pulse generator. The time-to-digital converter generates a digital signal based on the pulse signal and a voltage. The circuit also includes a controller coupled to the time-to-digital converter that detects a voltage change based on the digital signal.

Abstract: The present invention discloses a noise filtering fractional-n frequency synthesizer and an operating method thereof. The noise filtering fractional-n frequency synthesizer comprises a filter, a frequency calibration loop, a phase calibration loop and a digitally controlled delay line. The filter receives a first frequency division signal and generates a filtered signal. The frequency calibration loop is coupled to the filter and generates a first control signal. The phase calibration loop is coupled to the filter and the frequency calibration loop, and generates a second control signal. The digitally controlled delay line is coupled to the phase calibration loop and receives the second control signal. Thus, quantization noise of the fractional-n frequency synthesizer can be reduced, and phase noise of the fractional-n frequency synthesizer can be improved. In addition, the system remains locked after the filter outputs the signal.

Abstract: There is provided a clock generator for generating a modulation waveform which is high in the effect of suppressing a spectrum and making a circuit scale smaller than a modulation system using the Hershey-kiss waveform. More specifically, a modulation waveform generation unit generates a tangent waveform or a tangent+triangular waveform as an SSCG modulation waveform and provides an oscillator with a signal in which the SSCG modulation waveform is combined with the output of a low pass filter of a PLL loop.

Abstract: In a phase locked loop, a first frequency divider divides the frequency of an input signal. A low-pass filter receives a frequency-divided signal output from the first frequency divider and having an average phase difference calculated by a calculation unit, cuts off high-frequency components of the received signal, and outputs a resultant signal. A voltage controlled oscillator varies the frequency of a signal to be output based on the signal output from the low-pass filter. A second frequency divider divides the frequency of the signal output from the voltage controlled oscillator. The calculation unit calculates a phase difference between signals individually output from the first frequency divider and the second frequency divider for each phase in one cycle of the signal output from the first frequency divider, and calculates an average phase difference based on the calculated phase differences.

Abstract: Designs of devices having digital phase locked loop (DPLL) circuits that include multiple digital feedback loops to generate high frequency clock signals by a digitally controlled oscillator (DCO). A time-to-digital converter (TDC) module is provided in such a DPLL circuit to receive an input reference clock signal and a first feedback clock signal from a first digital feedback loop and produces a digital TDC output indicative of a first phase error caused by a difference in time between the input reference clock signal and the first feedback clock signal. A second digital feedback loop is provided to generate a second digital feedback signal indicative of a second phase error caused by a difference in frequency between a desired clock signal and a generated clock signal generated by the DCO. The first and second digital feedback loops are coupled to the DCO to generate the high frequency clock signals.

Abstract: A circuit includes a duty cycle calibration circuit, a duty cycle detection circuit, and a feedback control circuit. The duty cycle calibration circuit is operable to generate a first clock signal based on a second clock signal using an inverter and a first transistor. The first transistor is coupled in parallel with a second transistor in the inverter. The duty cycle detection circuit is operable to generate a voltage signal that varies based on changes in a duty cycle of the first clock signal. The feedback control circuit is operable to generate a control signal based on the voltage signal. The duty cycle calibration circuit is operable to control the duty cycle of the first clock signal based on the control signal controlling a current through the first transistor.

Abstract: A method and circuits for implementing power saving self powering down latch operation, and a design structure on which the subject circuit resides are provided. A master slave latch includes a virtual power supply connection. At least one connection control device is coupled between the virtual power supply connection and a voltage supply rail. A driver gate applies a power down signal driving the at least one connection control device to control the at least one connection control device during a self power down mode. The driver gate combines a self power down input signal and a latch data output signal to generate the power down signal.

Abstract: A delay circuit for an RFID tag includes a power supply input and a power supply output and one or more delay circuits in cascade connection between the power supply input and the power supply output. A first delay circuit includes a passive circuit, a second delay circuit includes a ramp circuit, and a third delay circuit includes a current mirror circuit.

Abstract: A wide range level shift system receives an input signal with a first voltage level and a second voltage level. The wide range level shift system transforms the input signal to an output signal with a third voltage level and a fourth voltage level, wherein the first voltage level is smaller than the second voltage level, the second voltage level is smaller than the third voltage level, and the fourth voltage level is smaller than the first voltage level. The wide range level shift system reduces the number of transistors required, the layout area of the transistors, and the power consumption.

Abstract: A high speed level shifter is provided for converting a low input voltage into a wide-range high output voltage. By utilizing two switching units to improve the latching speed of the latching unit of the level shifter, the duty cycle of the input signal is nearly equal to the duty cycle of the output signal.

Abstract: Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.

Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vp) and a latch circuit comprising a p-channel transistor and an n-channel transistor (208-214). A semiconductor controlled rectifier (206) in the circuit includes at least one terminal of the p-channel transistor. A fuse (200) is coupled between the voltage supply terminal and the semiconductor controlled rectifier. The fuse is programmed in response to the semiconductor controlled rectifier.

Abstract: An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a variable resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a variable resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can be used, such as changes in temperature.

Abstract: A bias circuit for generating an output bias current includes a first transistor, a passive component, a second transistor, and a bias current generator. The first transistor has a first node coupled to a first reference voltage, a second node, and a control node. The passive component is coupled between the first reference voltage and the control node of the first transistor. The second transistor has a first node coupled to the control node of the first transistor, a control node coupled to the second node of the first transistor, and a second node for providing the output bias current according to a current passing through the passive component. The bias current generator is coupled to the second node of the first transistor, and implemented for providing the first transistor with a bias current.

Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.

Abstract: When a time difference is amplified by a time difference amplifier, slew rates of internal output voltages are changed according to a phase combination of digital input signals so that a time gain is determined by a ratio between the slew rates and the slew rates can be controlled from an outside. After a voltage is charged to the level of a power supply voltage in first and second charging capacitors, the charged voltage of the first charging capacitor is decreased with a first slew rate when a first digital input signal transitions, and both charged voltages of the first and second charging capacitors are decreased with a second slew rate when a second digital input signal transitions so that both first and second digital input signals are changed from initial phases, while being compared with a reference voltage to generate first and second digital output signals.

Abstract: A radio-frequency power amplifier with envelope tracking, comprising: a power RF amplifying device for amplifying a RF signal; and a switching DC/DC converter, comprising a switching device and a rectifying device, for providing said power RF amplifying device with a DC power supply at a voltage level proportional to an envelope of said RF signal; wherein said switching device is a RF power transistor; characterized in that said rectifying device, and preferably also said power RF amplifying device, is also a transistor of a same technology, connected as a two-terminal device. Preferably, said power RF amplifying device is also a transistor of said same technology. A low-pass filter can also be provided for reducing the bandwidth of the envelope signal on which the PWM signal driving the DC/DC converter depends.

Abstract: A high power amplifier architecture is disclosure. One example configuration includes a first plurality of distributed amplification stages operatively coupled in a first string. A conductive trace associated with the first string provides a stepped structure, such that the associated inductance successively decreases from input to output of the first string. A second plurality of distributed amplification stages is operatively coupled in a second string, and a conductive trace associated therewith provides a stepped structure, such that the associated inductance successively decreases from input to output of the second string. In one example case, each of the first and second strings comprises gallium nitride transistor amplification stages formed on silicon carbide. The module may further include a heat spreader material that thermally and electrically couples to the amplification stages. The conductive trace associated with one string can be shared with another string.

Abstract: The present invention relates to a device for neutralization of a signal obtained by transposition to a high frequency of a useful signal supplied by a unit of equipment, the said equipment having a spurious capacitance Cparasite that varies over time. The device comprises a neutralization capacitance Cneut and means with adjustable gain G, together with means for feedback controlling the gain G in such a manner that, continuously, G×Cneut=Cparasite.

Abstract: The invention relates to a device for neutralizing a signal obtained by modulating, on to a high frequency carrier, a useful signal delivered by a system comprising a parasitic capacitance Cp that varies over time, the device comprising a neutralizing capacitance Cn, means for providing an adjustable gain G, said means being equipped with a JFET field-effect transistor (J1) equipped with a gate first electrode and drain and source second electrodes, and a control loop for providing gain G so that G×Cn permanently equals Cp by controlling the voltage on the gate first electrode of the transistor (J1). The neutralizing capacitance Cn comprises a first capacitor Cneutro1 and a second capacitor Cneutro2 placed in parallel at the output of said means for providing gain G.

Abstract: An apparatus for controlling an amplifier in a communication system includes a first shifter, a generating unit, a second shifter, and a switching bias unit. The first shifter is configured to level-shift a switching voltage of an amplifier to a first voltage. The generating unit is configured to invert the first voltage and output a second voltage. The second shifter is configured to level-shift the second voltage to a third voltage. The switching bias unit is configured to receive the third voltage and output a bias voltage for a gate switching operation of the amplifier to the amplifier.

Abstract: An integrated circuit device includes at least one controllable oscillator including a first control port and at least one further control port, at least one frequency control module including an output arranged to provide a frequency control signal. The at least one controllable oscillator further includes at least one compensation module including an output arranged to provide at least one compensation signal. The at least one compensation module includes an integrator component arranged to receive at an input thereof a signal that is representative of a difference between the indication of the frequency control signal and a reference signal, and to output an integrated difference signal. The at least one compensation module is arranged to generate the at least one compensation signal based at least partly on the integrated difference signal output by the integrator component.

Abstract: A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.

Abstract: Apparatus and methods for wave reversing in a travelling wave oscillator are disclosed. The travelling wave oscillator includes a differential transmission line and regeneration elements connected along the differential transmission line. The differential transmission line can be used to propagate a wave traveling in either a counterclockwise or a clockwise direction. Each of the regeneration elements includes a first gain portion operable to degenerate a wave travelling in the counterclockwise direction and to regenerate a wave travelling the clockwise direction, and a second gain portion operable to degenerate a wave travelling in a clockwise direction and to regenerate a wave travelling in a counterclockwise direction.

Abstract: An electronic component package sealing member that can be used as a first sealing member in an electronic component package in which an electrode of an electronic component element is hermetically sealed with the first sealing member and a second sealing member arranged so as to oppose each other, includes: a through hole that passes through a substrate of the electronic component package sealing member; an internal electrode that is formed on a face of the substrate opposing the second sealing member; an external electrode that is formed on a face of the substrate opposite the opposing face; and a through electrode that is formed on an inner side face of the through hole electrically connecting the internal electrode and the external electrode. In the electronic component package sealing member, at least one open face of the through hole is sealed with a resin material.

Abstract: An oscillator circuit includes a clock oscillator which outputs a main clock signal having an oscillating frequency switched between a high frequency and a low frequency in response to a frequency selection signal, and a frequency divider circuit which outputs a sub-clock signal having a divided frequency equivalent to a frequency division ratio of the oscillating frequency of the main clock signal, the frequency division ratio being switched in response to the frequency selection signal. The divided frequency of the sub-clock signal is predetermined for each of the high frequency and the low frequency to which the oscillating frequency is switched in response to the frequency selection signal.

Abstract: Provided is a piezoelectric oscillator to attain high-frequency performance and frequency stabilization with the use of reflection characteristics of a reflective element. A piezoelectric oscillator is configured such that: a resonant circuit is connected to a gate of a field effect transistor; an output terminal is connected to a drain and a power supply voltage V is applied to the drain; a piezoelectric resonator is connected to a source, as a reflective element; and a resonance frequency of the resonant circuit and an oscillation frequency of the piezoelectric resonator as a reflective element are set to substantially the same frequency, and further, the piezoelectric oscillator may be configured such that a first matching circuit is provided between the resonant circuit and the gate, a second matching circuit is provided between the drain and the output terminal, and a third matching circuit is provided between the source and the reflective element.

Abstract: A method of manufacturing a MEMS resonator formed from a first material having a first Young's modulus and a first temperature coefficient of the first Young's modulus, and a second material having a second Young's modulus and a second temperature coefficient of the second Young's modulus, a sign of the second temperature coefficient being opposite to a sign of the first temperature coefficient at least within operating conditions of the resonator. The method includes the steps of forming the resonator from the first material; applying the second material to the resonator; and controlling the quantity of the second material applied to the resonator by the geometry of the resonator.

Abstract: An ovenized micro-electro-mechanical system (MEMS) resonator including: a substantially thermally isolated mechanical resonator cavity; a mechanical oscillator coupled to the mechanical resonator cavity; and a heating element formed on the mechanical resonator cavity.

Abstract: An oscillation circuit includes a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other, an amplifier circuit (an inverting amplifier circuit) having an input terminal and an output terminal, and a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the MEMS vibrator and the output terminal to each other to thereby connect the one of the MEMS vibrators and the amplifier circuit (the inverting amplifier circuit) to each other.

Abstract: A temperature-compensated oscillator includes a temperature compensation circuit adapted to output a temperature compensation voltage, a voltage-controlled oscillation circuit on which temperature compensation is performed based on the temperature compensation voltage, a switch circuit adapted to perform ON/OFF control on power supply to the temperature compensation circuit, and a sample-and-hold circuit adapted to perform switching control between an ON state of outputting the temperature compensation voltage to the voltage-controlled oscillation circuit while being connected to the temperature compensation circuit and holding the temperature compensation voltage output from the temperature compensation circuit when the power is supplied to the temperature compensation circuit, and an OFF state of outputting the temperature compensation voltage held to the voltage-controlled oscillation circuit while cutting connection to the temperature compensation circuit when the power supply to the temperature compensat

Abstract: A radio transmitter includes a signal processing circuit splitting a basic modulating signal into first and second modulating signals and outputting the first and second modulating signals. A PLL decides a fundamental wave. A VCO forms a portion of the PLL and modulates the fundamental wave decided by the PLL in accordance with a voltage of the first modulating signal outputted from the signal processing circuit. A PLL circuit forms a portion of the PLL and varies a frequency division ratio to modulate the fundamental wave decided by the PLL in accordance with the second modulating signal outputted from the signal processing circuit.

Abstract: The present invention is directed to a circuit assembly that includes an integrated circulator assembly. The circuit assembly has a first substrate, which contains a continuous circuit trace that includes a circulator component from the circulator assembly and at least one electrical component from the circuit assembly. A second substrate is disposed beneath the first substrate and includes a cladding on one surface. The second substrate contains an aperture that accepts a ferrite element, which is axially aligned with the circulator component of the circuit trace. A conductive material is placed across the ferrite element so that it forms a continuous ground plane with the cladding, which is common to the entire circuit trace. The circulator assembly also contains a magnet bonded to the ferrite element. The circulator assembly may also include a yoke disposed below the magnet to shield the circulator from external magnetic fields.

Abstract: Integrated circuits with decoupling capacitor circuitry are provided. Decoupling capacitor circuitry may include multiple arrays of decoupling capacitors. Each decoupling capacitor array may have a corresponding decoupling capacitor monitoring circuit that is associated with that decoupling capacitor array. Each decoupling capacitor monitoring circuit may include a resistor and switching circuitry. Each decoupling capacitor monitoring circuit may be coupled to a comparator and control circuitry. During testing, the control circuitry may configure each decoupling capacitor array for leakage current testing one at a time. If a decoupling capacitor array is determined to exhibit excessive leakage currents, that decoupling capacitor array will be marked as defective and will be disabled from use. If the decoupling capacitor array is determined to exhibit tolerable leakage currents, that decoupling capacitor array will be enable for use to help reduce power supply noise.

Abstract: A multi-octave power amplifier and related method provides an impedance matching unit configured to match impedances of a pair of balanced radio frequency (RF) signals applied thereto and output a pair of impedance-matched balanced RF signals, a converting unit configured to convert the pair of the impedance-matched balanced RF signals to an unbalanced RF signal and a compensation unit configured to compensate at least one rolled-off frequency component of the unbalanced RF signal and output a compensated RF signal.

Abstract: Embodiments of the present invention are directed to providing an increased trace width when traversing a void in another layer in a printed circuit board or package design. By increasing the trace width or alternatively increasing the capacitance, the degradation due to the void can be reduced. This approach works for microstrip, stripline as well as other transmission lines that use a reference plane. The void can be the result of an antipad associated with a via, or any other disruption in an otherwise uniform reference plane.

Abstract: MEMS resonators containing a first material and a second material to tailor the resonator's temperature coefficient of frequency (TCF). The first material has a different Young's modulus temperature coefficient than the second material. In one embodiment, the first material has a negative Young's modulus temperature coefficient and the second material has a positive Young's modulus temperature coefficient. In one such embodiment, the first material is a semiconductor and the second material is a dielectric. In a further embodiment, the quantity and location of the second material in the resonator is tailored to meet the resonator TCF specifications for a particular application. In an embodiment, the second material is isolated to a region of the resonator proximate to a point of maximum stress within the resonator. In a particular embodiment, the resonator includes a first material with a trench containing the second material.

Abstract: An acoustic wave device includes an interdigital transducer (IDT) electrode and a separate electrode facing the IDT electrode. The IDT electrode includes first and second comb-shaped electrode facing each other. The first comb-shaped electrode includes a first bus bar, first interdigitated electrode fingers, and first dummy electrode fingers. The second comb-shaped electrode includes a second bus bar second interdigitated electrode fingers interdigitated with the first interdigitated electrode fingers, second dummy electrode fingers facing the first interdigitated electrode fingers, weighted parts, and a non-weighted part. The weighted parts have electrodes at spaces between the second interdigitated electrode fingers and the second dummy electrode fingers. In the non-weighted part, there is no electrode at a space out of the spaces which is closest to the separate electrode in the non-interdigitated region.

Abstract: In a metamaterial, a dielectric layer includes a host medium and dielectric bodies disposed in rows with predetermined intervals therebetween is sandwiched between a pair of conductive mesh plates each having holes, thereby forming a functional layer including dielectric resonators corresponding to the dielectric bodies. The metamaterial is configured by laminating the functional layers. The holes and the dielectric resonators are positioned coaxially and an electromagnetic wave is propagated in each of the functional layers in a propagation direction perpendicular to a multi-layered laminate surface such that the metamaterial function as a left-handed metamaterial in relation to the propagation direction perpendicular to the multi-layered surface.

Abstract: A substrate integrated waveguide (10) comprises a top conductive layer (14) and a bottom conductive layer (15) provided on either sides a substrate (11). At least one wall (12, 13) of conductive material is provided in the substrate (11) to define, together with the top and bottom layers (14, 15), the waveguide. The at least one wall (12, 13) comprise a multitude of thin conductive wires densely arranged close to each other in the substrate (11) and having respective short ends connected to the top and bottom layers (14, 15). The high number of wires per surface unit in the wall (12, 13) effectively prevent significant amount of power leakage through the wall (12, 13) during operation of the substrate integrated waveguide (10).

Abstract: Soft-start systems and methods for vehicle starters are provided. Embodiments provide a solenoid including: a first coil that receives power when an ignition switch is closed; a first plunger actuated when the first coil receives power; a first terminal configured to be abutted by a contact bar of the first plunger; a second coil that receives power when the contact bar of the first plunger abuts the first terminal; a second plunger actuated when the second coil receives power; and a second terminal configured to be abutted by a contact bar of the second plunger. Such a solenoid is configured to provide power at a first level to an attached motor when the contact bar of the first plunger abuts the first terminal and at a second level that is higher than the first level when the contact bar of the second plunger abuts the second terminal.

Abstract: A magnetic trigger mechanism with a yoke with armature opening. The armature is coaxially surrounded by a coil having an excitation coil, which is acted on by a force of a preloaded spring and which remains in a first end position due to magnetic holding force of a permanent magnet when there is no current flowing through the excitation coil. The permanent magnet is arranged at a first end of the armature and the second end position of the armature being achieved by a brief flow of current through the excitation coil together with the accompanying lowering of the magnetic holding force and the spring force. The first end of the armature is guided in the coil body, and the second end position, which faces the armature opening, is guided by a centering ring, the highly permeable centering ring rests against the yoke at the armature opening and can move.

Abstract: A laminate stack having individual soft magnetic sheets. The individual sheets are involutely curved in the laminate stack. Each individual sheet has a first long side, a second long side opposite the first long side, a first short side and a second short side opposite the first short side. The first long side has a recess, said recess being rectangular and equidistant from the first short side, the second short side and the second long side when the individual sheet is in its uncurved state.

Abstract: The present invention provides a transformer having assembled bobbins and a voltage transformation module having the transformer. The transformer includes a base, bobbins, secondary windings and two magnetic cores. The base is provided with a penetration hole. The bobbins are disposed in the base and each has an annular groove, a hollow portion corresponding to the penetration hole, and protrusions formed on a surface of the bobbin. The protrusions form a gap between the two adjacent bobbins when the two adjacent bobbins are assembled with each other. The secondary windings are disposed between the bobbins and each has a through-hole corresponding to the hollow portion. The two magnetic cores penetrate the penetration hole of the base, the hollow portions of the bobbins, and the through-holes of the secondary windings to assemble them together.

Abstract: A laminated inductor includes: a laminate constituted by multiple insulator layers; external electrodes formed on the outside of the laminate; and a coil conductor formed spirally inside the laminate, wherein the coil conductor has leaders that electrically connect to the external electrodes and a coil body other than the leaders, wherein the coil conductor has conductive patterns formed on the insulator layers, and via hole conductors that penetrate through the insulator layers and electrically connect the multiple conductor patterns, wherein all of the conductor patterns constituting the coil body are either a C-shaped pattern or line-shaped pattern, wherein the coil body has a partial structure where two or more C-shaped pattern layers are stacked together successively, and wherein the number of C-shaped patterns in the coil body is greater than that of line-shaped patterns.

Abstract: A circuit protection assembly employs a post arrangement that is easier to manufacture and has a built-in insulating fuse configuration. The circuit protection assembly is disposed between a source of power and a circuit to be protected. The circuit protection assembly includes comprises a mounting block having a bore extending therethrough and a recess cavity on a first surface of the mounting block. A post having a first end is disposed within the recess cavity and a body portion extends through the bore. A fuse having a centrally disposed aperture is configured to receive the body portion of the post. The post has a second end configured to receive a terminal for connection to a circuit to be protected.

Abstract: A semiconductor ceramic composition for use as a component of the body of NTC thermistors contains at least manganese and cobalt as main ingredients and both aluminum and titanium as additional ingredients for resistance adjustment by annealing. It becomes easier to adjust the resistance of the composition by annealing when the titanium content is equal to or lower than about 9.2 parts by weight on a TiO2 basis relative to 100 parts by weight of the main ingredients.

Abstract: Provided is a technology for controlling a contents player based on a grasping power information of a hand by measuring a change of the bundle shape of a tendons in an inside muscle of wrist, in which the device and method for controlling the contents player comprises a sensing unit that generates a grasping power information; a control state managing unit that manages a control state of the contents player; and a control order generating unit that generates a control order controlling the contents player based on the control state and the grasping power information, and transmits the control order, in which the control state can be changed or can be generates in response to the grasping power information, and the sensing unit can be existed in both hands, respectively.