Patents Issued in March 31, 2015
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Patent number: 8993978Abstract: A method for assessing an alpha particle emission potential of a metallic material. A metallic material is initially subjected to a secular equilibrium disruption process, such as melting and/or refining, to disrupt the secular equilibrium of the radioactive decay of one or more target parent isotopes in the material. A sample of the material is treated to diffuse target decay isotopes within the sample such that the measured alpha particle emission directly corresponds to the concentration or number of target decay isotope atoms within the entirety of the sample, enabling the concentration of target decay isotopes in the sample to be determined. The concentration of target parent isotopes in the material may then be determined from the concentration of target decay isotopes and time elapsed from the secular equilibrium disruption process, and may be used to determine a maximum alpha particle emission that the metallic material will exhibit.Type: GrantFiled: March 13, 2013Date of Patent: March 31, 2015Assignee: Honeywell International Inc.Inventor: Brett M. Clark
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Patent number: 8993979Abstract: A beam control assembly to shape a ribbon beam of ions for ion implantation includes a first bar, second bar, first coil of windings of electrical wire, second coil of windings of electrical wire, first electrical power supply, and second electrical power supply. The first coil is disposed on the first bar. The first coil is the only coil disposed on the first bar. The second bar is disposed opposite the first bar with a gap defined between the first and second bars. The ribbon beam travels between the gap. The second coil is disposed on the second bar. The second coil is the only coil disposed on the second bar. The first electrical power supply is connected to the first coil without being electrically connected to any other coil. The second electrical power supply is connected to the second coil without being electrically connected to any other coil.Type: GrantFiled: February 26, 2014Date of Patent: March 31, 2015Assignee: Advanced Ion Beam Technology, Inc.Inventor: Jiong Chen
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Patent number: 8993980Abstract: An ion beam scanner includes a first scanner stage having a first opening to transmit an ion beam, the first scanner stage to generate, responsive to a first oscillating deflection signal, a first oscillating deflecting field within the first opening; a second scanner stage disposed downstream of the first scanner stage and having a second opening to transmit the ion beam, the second scanner stage to generate, responsive to a second oscillating deflection signal, a second oscillating deflecting field within the second opening that is opposite in direction to the first oscillating deflecting field, and a scan controller to synchronize the first oscillating deflection signal and second oscillating deflection signal to generate a plurality of ion trajectories when the scanned ion beam exits the second stage that define a common focal point.Type: GrantFiled: January 24, 2014Date of Patent: March 31, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Kenneth H. Purser, Christopher Campbell, Frank Sinclair, Robert C. Lindberg, Joseph C. Olson
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Patent number: 8993981Abstract: Systems and methods for heating an apex of a tip of a charged particle source are disclosed. The charged particle source can be, for example, a gas ion source. The systems can include a detector configured to detect light generated by the tip apex, and a controller coupled with the charged particle source and the detector so that the controller can control heating of the tip apex based on the light detected by the detector.Type: GrantFiled: October 20, 2011Date of Patent: March 31, 2015Assignee: Carl Zeiss Microscopy, LLCInventors: John Notte, IV, Randall G. Percival, Milton Rahman, Louise Barriss, Russell Mello, Mark D. DiManna
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Patent number: 8993982Abstract: A switchable ion gun switchable between a cluster mode setting for producing an ion beam substantially comprising ionised gas clusters and an atomic mode setting for producing an ion beam substantially comprising ionised gas atoms, comprising: a source chamber having a first gas inlet; a gas expansion nozzle for producing gas clusters in the presence of gas atoms by expansion of a gas from the source chamber through the nozzle; an ionisation chamber for ionising the gas clusters and gas atoms; wherein the ionisation chamber has a second gas inlet for admitting gas directly into the ionisation chamber to form ionised gas atoms; and a variable mass selector for mass selecting the ionised gas clusters and ionised gas atoms to produce an ion beam variable between substantially comprising ionised gas clusters and substantially comprising ionised gas atoms.Type: GrantFiled: July 15, 2013Date of Patent: March 31, 2015Assignee: VG Systems LimitedInventor: Bryan Barnard
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Patent number: 8993983Abstract: Nail gel curing devices emitting ultraviolet light, as well as methods of their making and use are disclosed. The devices are useful for curing, inter alia, acrylic compositions, more particularly, acrylic nail gel compositions, and typically employ ultraviolet and/or visible light emitting diodes (“LED”) to cure such ultraviolet and/or visible light curable nail gel resins.Type: GrantFiled: May 13, 2010Date of Patent: March 31, 2015Assignee: Nail Alliance LLCInventors: Yu-Jen Li, Kuo-Chang Cheng, Ya-Wen Wu, Pei-Chen Yang
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Patent number: 8993984Abstract: A high energy UV fiber-coupled laser-induced fluorescence system is provided having a transmission component and a receiving component. The transmission component includes a laser source configured to produce high-energy UV pulses, a UV-enhanced fused-silica fiber coupled to the laser source, and optics coupled to the UV-enhanced fused-silica fiber for transmitting the high-energy UV pulses to a target area. The receiving component receives laser-induced florescence events from the target area and includes additional UV-enhanced fused-silica fiber coupled to optics and a receiving means.Type: GrantFiled: April 9, 2013Date of Patent: March 31, 2015Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: James R Gord, Sukesh Roy, Paul Hsu, Waruna Kulatilaka
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Patent number: 8993985Abstract: The present invention provides a drawing apparatus which performs drawing on a substrate with a plurality of charged particle beams, including an aperture array configured to include a plurality of apertures for shaping the respective charged particle beams, a deflection unit configured to include a plurality of first deflectors which are arranged on a side, with respect to the aperture array, of a charged particle source for radiating a charged particle beam and which deflect the respective charged particle beams, and to individually change irradiated positions of the respective charged particle beams on the aperture array by driving the respective first deflectors, and a controller configured to control deflection of the charged particle beams by the first deflectors to reduce a dispersion of intensities of the respective charged particle beams on the substrate.Type: GrantFiled: December 11, 2013Date of Patent: March 31, 2015Assignee: Canon Kabushiki KaishaInventors: Kentaro Sano, Go Tsuchiya
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Patent number: 8993986Abstract: An electron beam emitter comprises a housing enclosing a cathode capable of emitting electrons within the housing and a window for allowing the emitted electrons to exit the housing, wherein the housing has an opening adapted to be at least partly engaged with a high voltage connector assembly, the assembly being adapted to connect the cathode to a power supply, the electron beam emitter further comprising a cooling flange surrounding the opening and having an interior channel extending between an inlet port and an outlet port for receiving cooling fluid for cooling the high voltage connector assembly. The invention further relates to a method of cooling an electron beam device.Type: GrantFiled: June 27, 2012Date of Patent: March 31, 2015Assignee: Tetra Laval Holdings & Finance S.A.Inventor: Toni Waber
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Patent number: 8993987Abstract: A target supply device may include a receptacle for holding a liquid target material, a first electrode disposed within the receptacle, a nozzle portion provided in the receptacle, a second electrode provided with a first path and disposed facing the nozzle portion, a third electrode provided with a second path that, along with the first path, defines a trajectory of the liquid target material released from the nozzle portion, a first power source that applies a first potential that is higher than a common potential to the first electrode, a second power source that applies a second potential that is lower than the common potential to the third electrode, and a third power source that applies a third potential that is no greater than the first potential and is no less than the second potential to the second electrode.Type: GrantFiled: August 28, 2013Date of Patent: March 31, 2015Assignee: Gigaphoton Inc.Inventor: Hiroshi Umeda
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Patent number: 8993988Abstract: Devices and uses of said devices for transmitting UV light over a broad area and for a long distance to inactivate microbes and non-microbial sources. The device is activated by a variable or dynamic logic process that controls activation of the device, such that activation is automatic and only when there is either a predetermined target or an absence of an action or activity within an effective range of the device. The device comprises at least one ultraviolet light emitting source emitting ultraviolet light in a range from about 10 to 400 nanometers and a lens formed of an ultraviolet light transmissive material. The at least one ultraviolet light emitting source is embedded within the lens. The lens may be formed into a functional or ornamental shape and does not filter or refract significantly the ultraviolet light emitted from the at least one ultraviolet light emitting source.Type: GrantFiled: November 12, 2013Date of Patent: March 31, 2015Assignee: Violet Defense Technology, Inc.Inventors: Mark Nathan, Theresa Nathan
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Patent number: 8993989Abstract: Radiation shields and radiation shielding systems for attenuating ionizing radiation include two or more attenuating elements, such as layers. The two or more attenuating elements may include different attenuating materials. The two or more attenuating elements may be configured to attenuate ionizing radiation differently than one another. In some embodiments, different attenuating elements may be configured for use with different energies or ranges of energies of ionizing radiation. The concurrent use of two or more layers or other attenuating elements may optimize the ability of a radiation shield to attenuating ionizing radiation. Systems and methods for attenuating ionizing radiation are also disclosed.Type: GrantFiled: June 16, 2014Date of Patent: March 31, 2015Assignee: BLOXR Solutions, LLCInventors: Ashok C. Khandkar, Prataprai Chowdhary
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Patent number: 8993990Abstract: A detection device includes: a detection member that includes an emission member emitting a beam toward a direction of a transportation path and a beam receiving member receiving a reflected beam reflected from a medium; a transmissive member that is provided to allow a regular reflected beam of the beam reflected from the medium to be obliquely incident thereto, and through which the beam emitted from the emission member is transmitted; and a multiple-layered antireflective film that is provided on the transmissive member, the antireflective film being formed such that a maximum value of reflectivity of a first incident beam incident at the same angle as an incident angle of the regular reflected beam becomes smaller than a maximum value of reflectivity of a second incident beam incident in the direction perpendicular to the transmissive member within a visible light wavelength range.Type: GrantFiled: April 25, 2011Date of Patent: March 31, 2015Assignee: Fuji Xerox Co., Ltd.Inventors: Masao Ito, Izumi Iwasa
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Patent number: 8993991Abstract: Provided are semiconductor devices and methods of manufacturing the same. The semiconductor device includes a substrate including a first top surface, a second top surface lower in level than the first top surface, and a first perpendicular surface disposed between the first and second top surfaces, a first source/drain region formed under the first top surface, a first nanowire extended from the first perpendicular surface in one direction and being spaced apart from the second top surface, a second nanowire extended from a side surface of the first nanowire in the one direction, being spaced apart from the second top surface, and including a second source/drain region, a gate electrode on the first nanowire, and a dielectric layer between the first nanowire and the gate electrode.Type: GrantFiled: July 29, 2011Date of Patent: March 31, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Dongwoo Suh, Sung Bock Kim, Hojun Ryu
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Patent number: 8993992Abstract: A GaN based semiconductor light-emitting device is provided. The light-emitting device includes a first GaN based compound semiconductor layer of an n-conductivity type; an active layer; a second GaN based compound semiconductor layer; an underlying layer composed of a GaN based compound semiconductor, the underlying layer being disposed between the first GaN based compound semiconductor layer and the active layer; and a superlattice layer composed of a GaN based compound semiconductor doped with a p-type dopant, the superlattice layer being disposed between the active layer and the second GaN based compound semiconductor layer.Type: GrantFiled: April 29, 2009Date of Patent: March 31, 2015Assignee: Sony CorporationInventors: Goshi Biwa, Hiroyuki Okuyama
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Patent number: 8993993Abstract: Provided are a semiconductor light emitting device and a method for fabricating the same. The semiconductor light emitting device includes a light emitting structure and a pattern. The light emitting structure includes a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer. The pattern is formed on at least one light emitting surface among the surfaces of the light emitting structure. The pattern has a plurality of convex or concave parts that are similar in shape. The light emitting surface with the pattern formed thereon has a plurality of virtual reference regions that are equal in size and are arranged in a regular manner. The convex or concave part is disposed in the reference regions such that a part of the edge thereof is in contact with the outline of one of the plurality of virtual reference regions.Type: GrantFiled: May 10, 2011Date of Patent: March 31, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung Duk Ko, Jung Ja Yang, Yu Seung Kim, Youn Joon Sung, Soo Jin Jung, Dae Cheon Kim, Byung Kwun Lee
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Patent number: 8993994Abstract: A light emitting device includes: a substrate; a first electrode on the substrate, the first electrode including a light-transmissive material having a refractive index greater than a refractive index of the substrate; a refraction conversion layer between the substrate and the first electrode, the refraction conversion layer including a first layer having a refractive index greater than the refractive index of the first electrode, a second layer having a refractive index smaller than the refractive index of the first layer, and a third layer having a refractive index smaller than the refractive index of the second layer, wherein the first layer, the second layer, and the third layer are sequentially formed in a direction from the first electrode toward the substrate; a second electrode facing the first electrode; and an organic emissive layer between the first electrode and the second electrode.Type: GrantFiled: June 28, 2012Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Jung-Bae Song, Sang-Pil Lee, Young-Rok Song
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Patent number: 8993995Abstract: A light-emitting element where a positive electrode is formed on the surface of a transparent substrate; a hole transport layer is formed on the surface of the positive electrode; and a light-emitting layer made of quantum dots is formed on the surface of the hole transport layer. The light-emitting layer has a light-emitting region that emits light of a first predetermined wavelength in which a surfactant is present on the surface of the quantum dots and a non-light-emitting region that does not emit light in which a surfactant is absent on the surface of the quantum dots. A second light-emitting layer that emits light of a second predetermined wavelength is formed on the surface of the light-emitting layer, and a negative electrode is formed on the surface of the second light-emitting layer.Type: GrantFiled: November 16, 2012Date of Patent: March 31, 2015Assignee: Murata Manufacturing Co., Ltd.Inventor: Haruya Miyata
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Patent number: 8993996Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.Type: GrantFiled: March 14, 2013Date of Patent: March 31, 2015Assignee: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Remigijus Gaska, Jinwei Yang, Alexander Dobrinsky
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Patent number: 8993997Abstract: A gallium nitride-based group III-V compound semiconductor light emitting device and a method for fabricating the same are provided. The gallium nitride-based group III-V compound semiconductor light emitting device includes: a substrate; a p-type ohmic electrode layer formed on the substrate; a p-type gallium nitride-based group III-V compound semiconductor layer formed on the p-type ohmic electrode layer; an n-type gallium nitride-based group III-V compound semiconductor layer formed on the p-type gallium nitride-based group III-V compound semiconductor layer; an n-type ohmic electrode layer formed on the n-type gallium nitride-based group III-V compound semiconductor layer; and first and second refractive index adjustment layers having refractive index smaller than those of the n-type gallium nitride-based group III-V compound semiconductor layer and the n-type ohmic electrode layer, wherein a pyramid structure is formed on the surface of the second refractive index adjustment layer.Type: GrantFiled: June 23, 2011Date of Patent: March 31, 2015Assignees: Seoul Viosys Co., Ltd., POSTECH Academy-Industry FoundationInventors: Jong Lam Lee, Jun Ho Son, Hak Ki Yu
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Patent number: 8993998Abstract: An electro-optic device includes a first electrode, an active layer formed over and electrically connected with the first electrode, a buffer layer formed over and electrically connected with the active layer, and a second electrode formed directly on the buffer layer. The second electrode includes a plurality of nanowires interconnected into a network of nanowires. The buffer layer provides a physical barrier between the active layer and the plurality of nanowires to prevent damage to the active layer while the second electrode is formed.Type: GrantFiled: March 15, 2013Date of Patent: March 31, 2015Assignee: The Regents of the University of CaliforniaInventors: Yang Yang, Rui Zhu, Chun Chao Chen, Letian Dou, Gang Li
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Patent number: 8993999Abstract: According to an embodiment, a semiconductor light emitting device is configured to emit light by energy relaxation of an electron between subbands of a plurality of quantum wells. The device includes an active layer and at least a pair of cladding layers. The active layer is provided in a stripe shape extending in a direction parallel to an emission direction of the light, and includes the plurality of quantum wells; and the active layer emits the light with a wavelength of 10 ?m or more. Each of the cladding layers is provided both on and under the active layer respectively and have a lower refractive index than the active layer. At least one portion of the cladding layers contains a material having a different lattice constant from the active layer and has a lower optical absorption at a wavelength of the light than the other portion.Type: GrantFiled: May 6, 2014Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shigeyuki Takagi, Hidehiko Yabuhara
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Patent number: 8994000Abstract: An optoelectronic semiconductor chip comprises the following sequence of regions in a growth direction (c) of the semiconductor chip (20): a p doped barrier layer (1) for an active region (2), the active region (2), which is suitable for generating electromagnetic radiation, the active region being based on a hexagonal compound semiconductor, and an n doped barrier layer (3) for the active region (2). Also disclosed are a component comprising such a semiconductor chip, and to a method for producing such a semiconductor chip.Type: GrantFiled: July 11, 2012Date of Patent: March 31, 2015Assignee: OSRAM Opto Semiconductors GmbHInventors: Adrian Avramescu, Volker Härle, Lutz Höppel, Matthias Peter, Matthias Sabathil, Uwe Strauss
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Patent number: 8994001Abstract: A light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system are disclosed. The light emitting device may include a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers. The first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer may include Al. The second conductive semiconductor layer may have Al content higher than Al content of the first conductive semiconductor layer. The first conductive semiconductor layer may have Al content higher than Al content of the active layer.Type: GrantFiled: April 2, 2014Date of Patent: March 31, 2015Assignee: LG Innotek Co., Ltd.Inventor: Hyo Kun Son
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Patent number: 8994002Abstract: A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.Type: GrantFiled: March 16, 2012Date of Patent: March 31, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
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Patent number: 8994003Abstract: To provide a power MISFET using oxide semiconductor. A gate electrode, a source electrode, and a drain electrode are formed so as to interpose a semiconductor layer therebetween, and a region of the semiconductor layer where the gate electrode and the drain electrode do not overlap with each other is provided between the gate electrode and the drain electrode. The length of the region is from 0.5 ?m to 5 ?m. In such a power MISFET, a power source of 100 V or higher and a load are connected in series between the drain electrode and the source electrode, and a control signal is input to the gate electrode.Type: GrantFiled: September 19, 2011Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuhiko Takemura
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Patent number: 8994004Abstract: Photodetectors and integrated circuits including photodetectors are disclosed. A photodetector in accordance with the present invention comprises a silicon-on-insulator (SOI) structure resident on a first substrate, the SOI structure comprising a passive waveguide, and a III-V structure bonded to the SOI structure, the III-V structure comprising a quantum well region, a hybrid waveguide, coupled to the quantum well region and the SOI structure adjacent to the passive waveguide, and a mesa, coupled to the quantum well region, wherein when light passes through the hybrid waveguide, the quantum well region detects the light and generates current based on the light detected.Type: GrantFiled: January 27, 2012Date of Patent: March 31, 2015Assignee: The Regent of the University of CaliforniaInventor: John E. Bowers
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Patent number: 8994005Abstract: Devices (e.g., optoelectronic devices such as solar cells and infrared or THz photodetectors) with a nanomaterial having vertically correlated quantum dots with built-in charge (VC Q-BIC) and methods of making such devices. The VC Q-BIC material has two or more quantum dot layers, where the layers have quantum dots (individual quantum dots or quantum dot clusters) in a semiconductor material, and adjacent quantum dot layers are separated by a spacer layer of doped semiconductor material. The VC-QBIC nanomaterial provides long photocarrier lifetime, which improves the responsivity and sensitivity of detectors or conversion efficiency in solar cells as compared to previous comparable devices.Type: GrantFiled: March 27, 2012Date of Patent: March 31, 2015Assignee: The Research Foundation for The State University of New YorkInventors: Vladimir Mitin, Andrei Sergeyev, Gottfried Strasser
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Patent number: 8994006Abstract: Semiconductor nanoparticles are deposited on a top surface of a first insulator layer of a substrate. A second insulator layer is deposited over the semiconductor nanoparticles and the first insulator layer. A semiconductor layer is then bonded to the second insulator layer to provide a semiconductor-on-insulator substrate, which includes a buried insulator layer including the first and second insulator layers and embedded semiconductor nanoparticles therein. Back gate electrodes are formed underneath the buried insulator layer, and shallow trench isolation structures are formed to isolate the back gate electrodes. Field effect transistors are formed in a memory device region and a logic device region employing same processing steps. The embedded nanoparticles can be employed as a charge storage element of non-volatile memory devices, in which charge carriers tunnel through the second insulator layer into or out of the semiconductor nanoparticles during writing and erasing.Type: GrantFiled: October 2, 2012Date of Patent: March 31, 2015Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Robert H. Dennard, Hemanth Jagannathan, Ali Khakifirooz, Tak H. Ning, Ghavam G. Shahidi
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Patent number: 8994007Abstract: A light-emitting element has a layer including an organic material between a first electrode and a second electrode, and further has a layer including a metal oxide between the second electrode and the layer including the organic material, where these electrodes and layers are laminated so that the second electrode is formed later than the first electrode. The light-emitting element is suppressed damage caused to a layer including an organic material during deposition by sputtering and a phenomenon such as short circuit between electrodes.Type: GrantFiled: July 6, 2011Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiko Saito, Hisao Ikeda
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Patent number: 8994008Abstract: A reverse printing ink composition capable of realizing printing with a uniform film thickness and high-definition patterning, a printing method using the same, and a method of manufacturing a display unit using the same are provided. The reverse printing ink composition includes a solvent containing an aromatic carbon hydride and a straight-chain carbon hydride and a low-molecular material.Type: GrantFiled: March 22, 2012Date of Patent: March 31, 2015Assignee: Sony CorporationInventors: Toshiaki Imai, Makoto Ando, Tadahiko Yoshinaga
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Patent number: 8994009Abstract: To provide a photoelectric conversion device which has little light loss caused by light absorption in a window layer, the photoelectric conversion device includes a first electrode, a first semiconductor layer formed over the first electrode, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, and a second electrode formed over the third semiconductor layer; and the first semiconductor layer is a light-transmitting semiconductor layer containing an organic compound and an inorganic compound, and the second semiconductor layer and the third semiconductor layer are each a semiconductor layer containing an organic compound.Type: GrantFiled: September 4, 2012Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshinobu Asami, Riho Kataishi
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Patent number: 8994010Abstract: An organic light-emitting display device and a method of manufacturing the organic light-emitting display device are provided. The organic light-emitting display device includes a plurality of pixels each including: a first region including a light-emitting region for emitting light, a first electrode and an emission layer covering the first electrode being located in the light-emitting region; and a second region including a transmissive region for transmitting external light through the display device. The display device also includes: a third region between the pixels; a first auxiliary layer in the first and third regions; a second electrode on the first auxiliary layer in the first and third regions; a second auxiliary layer covering the second electrode and located in the first and second regions and not in the third region; and a third electrode on the second electrode in the third region.Type: GrantFiled: January 10, 2013Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Jun-Ho Choi, Jin-Koo Chung, Seong-Min Kim
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Patent number: 8994011Abstract: The present invention provides an organic light emitting device including: a substrate; and two or more stacked light emitting elements, which comprise a first electrode, at least one intermediate electrode, a second electrode, and an organic material layer disposed between the electrodes, the stacked organic light emitting elements including a first group of electrodes electrically connected to each other such that among the electrodes, at least two electrodes, which are not adjacent to each other, become a common electric potential, and a second group of electrodes which include one electrode among electrodes which are not electrically connected to the first group of electrodes, or at least two electrodes which are not electrically connected to the first group of electrodes and are electrically connected to each other so as to be a common electric potential without being adjacent to each other, in which the stacked organic light emitting elements are disposed at an interval apart from each other on the subsType: GrantFiled: August 17, 2011Date of Patent: March 31, 2015Assignee: LG Chem, Ltd.Inventors: Jung Bum Kim, Minsoo Kang, Hyeon Choi
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Patent number: 8994012Abstract: An organic EL panel (1) in accordance with one embodiment of the present invention includes: an element substrate (10); a sealing substrate (14); and an organic EL element (15) which is (i) sandwiched between the element substrate (10) and the sealing substrate (14) and (ii) constituted by at least an anode, an organic light emitting layer and a cathode which are stacked together. The sealing substrate (14) has, on its surface facing the element substrate (10), a PVA sealing film (13) and an SiO2 sealing film (12) stacked together.Type: GrantFiled: October 14, 2011Date of Patent: March 31, 2015Assignee: Sharp Kabushiki KaishaInventor: Takeshi Hirase
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Patent number: 8994013Abstract: An object is to provide a light-emitting element which includes an exciplex being used as an energy donor capable of efficiently transferring energy to a substance exhibiting thermally activated delayed fluorescence. The exciplex comprises two kinds of substances and its singlet and triplet excited states are close to each other. Thus, by making light emission of the exciplex overlap with an absorption band on the longest wavelength side which corresponds to absorption by the substance exhibiting thermally activated delayed fluorescence, i.e., an energy acceptor, in a singlet excited state, it becomes possible to achieve efficient energy transfer from a singlet excited state of the exciplex to a singlet excited state of the substance exhibiting thermally activated delayed fluorescence, and it also becomes possible to achieve efficient energy transfer from a triplet excited state of the exciplex to a triplet excited state of the substance exhibiting thermally activated delayed fluorescence.Type: GrantFiled: May 13, 2013Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Satoshi Seo
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Patent number: 8994014Abstract: A ferroelectric device comprising: a substrate; a first electrode disposed on the substrate; a ferroelectric layer disposed on and in contact with the first electrode; and a second electrode disposed on and in contact with the ferroelectric layer, wherein at least one of the first electrode and the second electrode is an organic electrode comprising a doped electroconductive organic polymer.Type: GrantFiled: May 31, 2013Date of Patent: March 31, 2015Assignee: Saudi Basic Industries CorporationInventors: Unnat S. Bhansali, Mohd Adnan Khan, Husam N. Alshareef, Moussa M. Saleh, Ihab N. Odeh
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Patent number: 8994015Abstract: An organic light-emitting display device includes a display substrate comprising a plurality of pixel regions at least partially defined by a plurality of non-pixel regions; a sealing substrate facing the display substrate; and a spacer on one of the non-pixel regions of the display substrate between the display substrate and the sealing substrate to maintain a space between the display substrate and the sealing substrate. The plurality of pixel regions include a first pixel; a second pixel spaced apart from the first pixel and having a center corresponding to a first corner of a virtual rectangle having a center corresponding to a center of the first pixel; and a third pixel spaced apart from the second pixel and having a center corresponding to a second corner adjacent to the first corner of the virtual rectangle. The spacer is adjacent to the second pixel.Type: GrantFiled: June 24, 2013Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Chang-Soo Pyon, Ji-Eun Lee
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Patent number: 8994016Abstract: A dielectric layer for an electronic device, such as a thin-film transistor, is provided. The dielectric layer comprises a molecular glass. The resulting dielectric layer is very thin, pure, and stable. Processes and compositions for fabricating such a dielectric layer are also disclosed.Type: GrantFiled: August 16, 2013Date of Patent: March 31, 2015Assignee: Xerox CorporationInventors: Yiliang Wu, Ping Liu, Nan-Xing Hu
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Patent number: 8994017Abstract: A triplet light emitting device which has high efficiency and improved stability and which can be fabricated by a simpler process is provided by simplifying the device structure and avoiding use of an unstable material. In a multilayer device structure using no hole blocking layer conventionally used in a triplet light emitting device, that is, a device structure in which on a substrate, there are formed an anode, a hole transporting layer constituted by a hole transporting material, an electron transporting and light emitting layer constituted by an electron transporting material and a dopant capable of triplet light emission, and a cathode, which are laminated in the stated order, the combination of the hole transporting material and the electron transporting material and the combination of the electron transporting material and the dopant material are optimized.Type: GrantFiled: December 10, 2013Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroko Yamazaki, Atsushi Tokuda, Tetsuo Tsutsui
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Patent number: 8994018Abstract: The present invention provides an OLED packaging structure and a packaging method thereof. The OLED packaging structure comprises a packaging board and an OLED substrate. At least one seal frame matching OLED in size is formed through painting glass frit seal on the packaging board at a position corresponding to the OLED. An initial painting point is at every seal frame with a protruding prominence. A recess is set up on the OLED substrate corresponding the initial painting point to accommodate the prominence. the OLED packaging structure and the packaging method thereof is to set up a recess on an OLED substrate to accommodate a prominence on the initial painting point due to accumulation of glass frit seal on a packaging board, so that when adhering the OLED substrate to the packaging board the seal frame is adhesive to the OLED substrate tightly without significant gap.Type: GrantFiled: August 19, 2013Date of Patent: March 31, 2015Assignee: Shenzhen China Star Optoelectronics Technology Co., LtdInventor: Wei Yu
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Patent number: 8994019Abstract: The invention is to provide a structure of a semiconductor device which achieves quick response and high-speed drive by improving on-state characteristics of a transistor, and to provide a highly reliable semiconductor device. In a transistor in which a semiconductor layer, a source and drain electrode layers, a gate insulating film, and a gate electrode are sequentially stacked, a non-single-crystal oxide semiconductor layer containing at least indium, a Group 3 element, zinc, and oxygen is used as the semiconductor layer. The Group 3 element functions as a stabilizer.Type: GrantFiled: July 17, 2012Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 8994020Abstract: According to one embodiment, a display device includes a thin film transistor. The thin film transistor includes a gate insulating film, a semiconductor layer, a gate electrode, first and second channel protection films, first and second conductive layers, and a passivation film. The semiconductor layer is provided on a major surface of the gate insulating film. The semiconductor layer includes first to seventh portions. The gate insulating film is disposed between the semiconductor layer and the gate electrode. The first channel protection film covers the third portion. The second channel protection film covers the fifth and fourth portions, and an upper surface of the first channel protection film. The first conductive layer covers the sixth portion. The second conductive layer covers the seventh portion. The passivation film covers the first and second portions, the first and second conductive layers, and the second channel protection film.Type: GrantFiled: March 13, 2013Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shintaro Nakano, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Tomomasa Ueda, Hajime Yamaguchi
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Patent number: 8994021Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.Type: GrantFiled: March 6, 2014Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
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Patent number: 8994022Abstract: Embodiments of the disclosure relate to a method of evaluating a semiconductor wafer dicing process, comprising providing evaluation lines extending in at least one scribe line of the wafer, dicing the wafer in the scribe line, evaluating the length of the evaluation lines, providing an information about their length, and using the information to evaluate the dicing process.Type: GrantFiled: April 10, 2012Date of Patent: March 31, 2015Assignee: STMicroelectronics Rousset SASInventor: Francois Tailliet
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Patent number: 8994023Abstract: A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.Type: GrantFiled: May 24, 2011Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Woo-Geun Lee, Young-Joo Choi, Kyoung-Jae Chung, Jin-Won Lee, Seung-Ha Choi, Hee-Jun Byeon, Pil-Sang Yun
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Patent number: 8994024Abstract: A highly reliable display device which has high aperture ratio and includes a transistor with stable electrical characteristics is manufactured. The display device includes a driver circuit portion and a display portion over the same substrate. The driver circuit portion includes a driver circuit transistor and a driver circuit wiring. A source electrode and a drain electrode of the driver circuit transistor are formed using a metal. A channel layer of the driver circuit transistor is formed using an oxide semiconductor. The driver circuit wiring is formed using a metal. The display portion includes a pixel transistor and a display portion wiring. A source electrode and a drain electrode of the pixel transistor are formed using a transparent oxide conductor. A semiconductor layer of the pixel transistor is formed using the oxide semiconductor. The display portion wiring is formed using a transparent oxide conductor.Type: GrantFiled: July 14, 2010Date of Patent: March 31, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara
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Patent number: 8994025Abstract: The present invention relates to a visible ray sensor and a light sensor capable of improving photosensitivity by preventing photodegradation. The visible ray sensor may include: a substrate, a light blocking member formed on the substrate, and a visible ray sensing thin film transistor formed on the light blocking member. The light blocking member may be made of a transparent electrode, a band pass filter, or an opaque metal.Type: GrantFiled: December 28, 2010Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Sang-Youn Han, Jun-Ho Song, Kyung-Sook Jeon, Mi-Seon Seo, Sung-Hoon Yang, Suk-Won Jung, Seung Mi Seo
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Patent number: 8994026Abstract: Design structures, structures and methods of manufacturing structures for providing latch-up immunity for mixed voltage integrated circuits. The structure includes a diffused N-Tub structure embedded in a P-wafer and provided below a retrograde N-well to a non-isolated CMOS logic.Type: GrantFiled: February 22, 2013Date of Patent: March 31, 2015Assignee: International Business Machines CorporationInventor: Steven H. Voldman
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Patent number: 8994027Abstract: A thin film transistor (TFT) array substrate includes a TFT including an active layer, a gate electrode, a source electrode, a drain electrode, a first gate insulating layer and a second gate insulating layer formed between the active layer and the gate electrode, and an interlayer insulating layer formed between the gate electrode and the source electrode and the drain electrode; a pixel electrode formed in an opening of the interlayer insulating layer, the pixel electrode including transparent conductive oxide; a translucent electrode formed in a region corresponding to the pixel electrode, between the first gate insulating layer and the second gate insulating layer; and a capacitor including a lower electrode formed from the same layer as the active layer, and an upper electrode formed from the same layer as the translucent electrode.Type: GrantFiled: March 13, 2013Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventor: Dae-Woo Lee