Patents Issued in March 31, 2016
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Publication number: 20160093385Abstract: A flash memory arrangement includes first memory cells for non-volatile memory of information and a read-write circuit. The read-write circuit includes a write latch, read amplifier, bit circuit pre-charge circuit, and databus interface, with the first memory cell being connected to a first bit circuit, word circuit, VSE circuit, and a select circuit, and the read-write circuit being connected to a column decoder, databus, and a read control signal circuit. A first memory column is arranged such that in a first partial matrix the first memory cell is arranged, in which a first select transistor, a memory transistor, and a second select transistor are arranged between the first bit circuit and a discharge hub. The second select transistor can be controlled by a global, non address-decoded read-write select circuit. At every bit circuit, a reference memory cell is arranged. A second partial matrix is provided equivalent to the first partial matrix.Type: ApplicationFiled: September 30, 2015Publication date: March 31, 2016Inventor: Stefan GUENTHER
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Publication number: 20160093386Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.Type: ApplicationFiled: December 8, 2015Publication date: March 31, 2016Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
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Publication number: 20160093387Abstract: A method of operating a memory system including a nonvolatile memory including a memory block, and a memory controller including an erase control unit, includes performing pre-reading a plurality of memory cells connected to a selected word line of the memory block, generating an off cell count based on the pre-reading result, by operation of the erase control unit, comparing the off cell count with a reference value to generate a comparison result, and changing an erase operation condition based on the comparison result, by operation of the nonvolatile memory, and erasing the memory block according to the changed erase operation condition.Type: ApplicationFiled: August 17, 2015Publication date: March 31, 2016Inventors: Eun Chu Oh, Hong Rak Son, Junjin Kong
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Publication number: 20160093388Abstract: An operating method of a nonvolatile memory device is provided. The nonvolatile memory device includes first and second page buffers, and first and second bit lines connected thereto, respectively. First and second latch nodes of the first page buffer are charged to have a voltage having a first level according to data stored in a first latch of the first page buffer. After the charging of the first latch node is started, a sensing node of the second page buffer is pre-charged. The sensing node is connected to the second bit line. Data stored in the first latch is dumped into a second latch of the first page buffer during the pre-charging of the sensing node of the second page buffer.Type: ApplicationFiled: September 25, 2015Publication date: March 31, 2016Inventors: JUNG-HO SONG, Minsu Kim, Il-Han Park, Su Chang Jeon
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Publication number: 20160093389Abstract: A nonvolatile semiconductor memory can reduce variations in an amount of current during data writing operation. This allows for the writing of data to memory cells with high precision. The nonvolatile semiconductor memory includes a plurality of memory cells, word lines connected to the memory cells, and bit lines connected to each of the memory cells. At least two of the bit lines are selected, and a current is simultaneously supplied from a power supply line to those memory cells which are connected to the selected bit lines in order to write data thereto. The nonvolatile semiconductor memory also includes charge amount measurement units for measuring respective amounts of charge stored in the memory cells. The nonvolatile semiconductor memory also includes current path switching circuits connected to the respective bit lines.Type: ApplicationFiled: December 9, 2015Publication date: March 31, 2016Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Katsuaki MATSUI
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Publication number: 20160093390Abstract: A read operation compensates for program disturb when distinguishing between an erased-state and a lowest programmed data state, where the program disturb is a function of the data state of an adjacent, previously-programmed memory cell on a common charge-trapping layer. The read operation occurs in connection with a programming operation which avoids program disturb of the programmed data states by using asymmetric pass voltages. Before reading the memory cells on a selected word line (WLn), the memory cells on the adjacent, previously-programmed word line (WLn?1) are read. The read operation for WLn uses multiple read voltages—one for each data state on WLn?1, and one of the read results is selected based on the data state of the adjacent memory cell. Other read operations distinguish between each pair of adjacent programmed data states using a read voltage which is independent of the data state of the adjacent memory cell.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Inventors: Jiahui Yuan, Yingda Dong, Charles Kwong, Hong-Yan Chen, Liang Pang
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Publication number: 20160093391Abstract: A semiconductor device may include a memory string coupled between a bit line and a common source line and configured to include a drain select transistor, memory cells, and a source select transistor. The drain select transistor may be configured to operate based on a voltage applied to a drain select line. The memory cells may be configured to operate based on a voltage applied to word lines. The source select transistor may be configured to operate based on a voltage applied to a source select line. The semiconductor device may include an operation circuit configured to perform a read operation or a verify operation of the memory cells. The operation circuit may be configured to apply a negative voltage to the common source line during the read operation or the verify operation.Type: ApplicationFiled: February 12, 2015Publication date: March 31, 2016Inventor: Jung Woon SHIM
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Publication number: 20160093392Abstract: According to an embodiment, an operation method for a memory device which has a first memory element and a second memory element respectively provided on both sides of a semiconductor member includes applying a first voltage to a second word line, the first voltage being negative for a voltage of a cell source line, and applying a second voltage to a first word line, the second voltage being positive for the voltage of the cell source line when reading out a data from the first memory element.Type: ApplicationFiled: March 11, 2015Publication date: March 31, 2016Applicant: Kabushiki Kaisha ToshibaInventor: Wataru SAKAMOTO
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Publication number: 20160093393Abstract: A flash memory apparatus having a physical unclonable function (PUF) and an embodying method of the same are provided. To elaborate, the flash memory apparatus includes a flash memory unit that comprises a main memory area and a peripheral memory area; a challenge input unit that receives input of a challenge value; a read voltage setting unit that sets a read voltage based on the input challenge value; a data reading unit that reads data by applying the read voltage to a memory cell included in a pre-set memory area in the peripheral memory area each time the challenge value is input; and a response output unit that outputs the read data as a response value corresponding to the challenge value, wherein the pre-set memory area consists of a plurality of memory cells comprising two or more memory cells having different threshold voltage values.Type: ApplicationFiled: August 20, 2015Publication date: March 31, 2016Applicant: Korea University Research and Business FoundationInventors: Jong Sun Park, Sang Kyu Lee
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Publication number: 20160093394Abstract: An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.Type: ApplicationFiled: September 17, 2015Publication date: March 31, 2016Inventor: JU SEOK LEE
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Publication number: 20160093395Abstract: A programmable non-volatile memory device effectuates two different functions (read, erase (re-program)) during a single instruction or command. During a first phase of the command a cell state is determined by a memory controller circuit, and in a second phase of the same command the cell state is re-written. This implementation is useful for applications where it is desirable to permit one time access only of particular data/content.Type: ApplicationFiled: September 25, 2015Publication date: March 31, 2016Inventors: David K. Y. Liu, John Nicholas Gross
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Publication number: 20160093396Abstract: An apparatus for reading a non-volatile memory includes a tracking module operable to calculate means and variances of voltage level distributions in a non-volatile memory and to calculate at least one reference voltage to be used when reading the non-volatile memory based on the means and variances, a likelihood generator operable to calculate at least one other reference voltage to be used when reading the non-volatile memory, wherein the at least one other reference voltage is based at least in part on a predetermined likelihood value constellation, and to map read patterns from the non-volatile memory to likelihood values, and a read controller operable to read the non-volatile memory using the at least one reference voltage and the at least one other reference voltage to yield the read patterns.Type: ApplicationFiled: December 7, 2015Publication date: March 31, 2016Applicant: Seagate Technology LLCInventors: AbdelHakim S Alhussien, Erich F Haratsch, Sundararajan Sankaranarayanan, YingQuan Wu
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Publication number: 20160093397Abstract: A method for reading data from persistent storage. The method includes receiving a client read request that includes a logical address for data from a client, determining a physical address using the logical address where the physical address includes a page number for a physical page in the persistent storage, determining a retention time for the data, determining a program/erase (P/E) cycle value associated with the physical page, obtaining at least one read threshold value using the P/E cycle value, the retention time, and the page number, issuing a control module read request including the at least one read threshold value to a storage module that includes the physical page, and obtaining the data from the physical page using the at least one read threshold value.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Haleh Tabrizi, Rajiv Agarwal, Michael Francis Barrientos, Jeffrey Paul Ferreira, Jeffrey S. Bonwick, Michael W. Shapiro
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Publication number: 20160093398Abstract: A memory device may include nonvolatile memory cells. A first memory cell of the nonvolatile memory cells may have a first resistance value in a first state and a second memory cell of the nonvolatile memory cells may have a second resistance value less than the first resistance value in a second state. A third memory cell of the nonvolatile memory cells may have a third resistance value less than the first resistance value and greater than the second resistance value in a third state, and a fourth memory cell of the nonvolatile memory cells may have a fourth resistance value less than the third resistance value and greater than the second resistance value in a fourth state.Type: ApplicationFiled: June 29, 2015Publication date: March 31, 2016Inventors: Hyun-Min CHOI, Shigenobu MAEDA, Ji-Hoon YOON
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Publication number: 20160093399Abstract: A device for monitoring process variations across memory bitcells includes a bitcell inverter that provides an output voltage to be used for identifying skewed corners of the memory bitcells. A first comparator compares the output voltage with a first reference voltage, and a second comparator compares the output voltage with a second reference voltage. The first and the second comparators generate a corner code based on comparison results.Type: ApplicationFiled: November 6, 2014Publication date: March 31, 2016Inventors: Saket GUPTA, Yifei ZHANG, Carl MONZEL, Mark Jon WINTER
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Publication number: 20160093400Abstract: Techniques are disclosed relating to testing logic in integrated circuits based on power being received by the integrated circuit. In one embodiment, an integrated circuit includes a memory and a self-test unit. The self-test unit is configured to receive an indication that identifies a memory block as being in a low-power state and to determine whether to disregard test data read from the one or more memory banks. In some embodiments, the self-test unit may be configured to mask a portion of test result related to the test data that the self-test unit has determined to disregard. The self-test unit may include an error validation logic configured to determine a validity of test data received from a memory based on a power activation status (e.g., whether the memory is powered on or off) associated with the memory.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventor: Dragos F. Botea
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Publication number: 20160093401Abstract: An embodiment of the invention provides an integrated circuit including a core circuit and a memory. The core circuit executes operations of the integrated circuit. The memory stores a subsystem and a repair system. When the repair system runs, the repair system detects whether there is a defect in the memory. When the repair system detects the defect, the repair system repairs the defect, and when the repair system does not detect the defect, a fake defect is injected in the memory to verify whether the repair system runs correctly.Type: ApplicationFiled: June 25, 2015Publication date: March 31, 2016Inventors: Shi-Wei CHANG, Chia-Wei WANG
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Publication number: 20160093402Abstract: A memory includes a plurality of replacement word lines interspersed among the plurality of word lines. The memory also includes a word line control circuit configured to apply different voltages to different word lines of the plurality of word lines based on positions of the word lines, and to replace a defective word line of the plurality of word lines with a replacement word line.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Makoto Kitagawa, Yogesh Luthra
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Publication number: 20160093403Abstract: In a repair of a random access memory (RAM), an error information is received, a fail address of the RAM identified, and a one-time programming applied to a portion of the redundancy circuit while a content of the RAM is valid. Optionally, the RAM is a dynamic access RAM (DRAM), a refresh burst is applied to the DRAM, followed by a non-refresh interval, and the one-time programming is performed during the non-refresh interval.Type: ApplicationFiled: September 27, 2014Publication date: March 31, 2016Inventors: Jung Pill KIM, Dexter Tamio CHUN, Deepti Vijayalakshmi SRIRAMAGIRI, Jungwon SUH
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Publication number: 20160093404Abstract: An apparatus and method are described for performing forward and reverse memory sparing operations. For example, one embodiment of a processor comprises memory sparing logic to perform a first forward memory sparing operation at a first level of granularity in response to detecting a memory failure; the memory sparing logic to perform a reverse memory sparing operation in response to a determination of an improved sparing state having a second level of granularity; and the memory sparing logic to responsively perform a second forward memory sparing operation at the second level of granularity.Type: ApplicationFiled: September 26, 2014Publication date: March 31, 2016Inventors: GEORGE H. HUANG, DEBALEENA DAS, BRIAN S. MORRIS, RAJAT AGARWAL
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Publication number: 20160093405Abstract: A gauge assembly which has a gauge surface including graphics representing a vehicle operating parameter. A pointer arm is provided which is made out of a light guide or light transmitting material. The pointer arm includes a step portion in an operative portion of the second bottom surface for reducing light received by said second surface adjacent the step portion and providing an overall even light throughout the operative illuminated viewing surface of the pointer arm.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Applicant: CONTINENTAL AUTOMOTIVE SYSTEMS, INC.Inventors: Vyacheslav B. Birman, Richard Daniel Sanders, Guoqing Wang
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Publication number: 20160093406Abstract: An improved fusion reactor design with provision for supplying plasma fuel inside a model reactor without consuming additional power in the process. Embodiments provide free choice of useful fuels from the full range of fusible isotopes. Other embodiments provide means of selectively extracting up-scattered electrons from the plasma, followed by replacing them with electrons of corrected energy. Computer simulations show fusion reactors constructed with these inventive improvements will demonstrate increased net-power compared to other fusion reactors of similar size. The Specification of the invention leads immediately to staged reactor development, starting from small-scale model-reactors, moving on to larger and larger scale models, culminating with commercial power plants.Type: ApplicationFiled: September 28, 2014Publication date: March 31, 2016Inventor: Joel Guild Rogers
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Publication number: 20160093407Abstract: An elongated control rod guide thimble for a nuclear reactor having a tube-in-tube dashpot design that has circumferential slots in the dashpot walls that align with spaced openings in the guide thimble sheath. The dashpot tube has an end plug with a threaded opening extending axially therethrough which is captured by a thimble screw that extend through an opening in the bottom nozzle and sandwiches an end plug attached to the guide thimble sheath between the dashpot tube end plug and the bottom nozzle.Type: ApplicationFiled: September 25, 2014Publication date: March 31, 2016Applicant: Westinghouse Electric Company LLCInventor: Jin Liu
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Publication number: 20160093408Abstract: The present embodiments provide a jet pump for a boiling water reactor as well as a boiling water reactor equipped with the jet pump, the jet pump being less prone to cause self-excited vibration in the case of both forward leakage flow and backward leakage flow. A jet pump 12 for a boiling water reactor is installed in a reactor pressure vessel of the boiling water reactor. The jet pump comprises a riser pipe 31 coupled to a reactor pressure vessel of the boiling water reactor, an inlet mixer pipe 33 coupled to the riser pipe, and a diffuser 34 coupled to the inlet mixer pipe 33 via a sliding joint 40, wherein the inlet mixer pipe 33 comprises at least one of a tapered lower end 42a with a slope angle of 0??a<2° and an upper taper provided at the gap with a slope angle of 0??b<2°.Type: ApplicationFiled: September 15, 2015Publication date: March 31, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masanobu WATANABE, Kunihiko KINUGASA, Tsutomu SHIOYAMA, Daiki TAKEYAMA
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Publication number: 20160093409Abstract: A guard aperture is described to control the ion angular distribution in plasma processing in one example a workpiece processing system has a plasma chamber, a plasma source to generate a plasma containing gas ions in the plasma chamber, the plasma forming a sheath above the workpiece, the sheath having an electric field, a workpiece holder in the chamber to apply a bias voltage to the workpiece to attract ions across the plasma sheath to be incident on the workpiece, a control aperture between the sheath and the workpiece, the aperture being positioned to modify an angular distribution of the ions that are incident on the workpiece, and a guard aperture between the sheath and the control aperture to isolate an electrical field of the control aperture from the plasma sheath.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Sang Ki NAM, Ludovic GODET
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Publication number: 20160093410Abstract: Apparatus for electron beam treatment of three-dimensional parts that includes cavities in a shielded rotating drum that preferably includes additional rotation mechanism for rotating parts within cavities in said drum. Radiation associated with the electron beam emitter is substantially shielded by the combination of the drum and the additional radiation shielding. The rotating drum is preferably made of at least four sections axially stacked, and its shielding properties are enhanced by including lead filled holes drilled in the sections.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Rily Carl Grunwald, John Charles Drenter
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Publication number: 20160093411Abstract: The invention provides methods, devices and systems for excimer fluorescence energy conversion from isotopes. Unprocessed spent nuclear fuel can be used as an isotope, and processed spent nuclear fuel can be used as an isotope. A method includes placing an excimer in the path of radiation decay from the isotope. The excimer is selected according to the isotope to absorb the radiation decay and emit photons in response. Surrounding environment is shielded from the radiation decay. Photons generated from the fluorescence of the excimer are received with photovoltaic material to generate electrical energy. The electrical energy is applied to a load. Systems of the invention can be based upon spent storage casks and handle unprocessed spent nuclear fuel, or can be greatly reduced in size and handle processed fuel, with single isotope isolation allowing consumer battery sized systems.Type: ApplicationFiled: September 30, 2015Publication date: March 31, 2016Inventors: Robert V. Tompson, JR., Mark A. Prelas
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Publication number: 20160093412Abstract: A method for a hand-held device comprising illuminating, with a first UV LED associated with the hand-held device, a surface of an object with UV light, acquiring with a visible-light image sensor on the hand-held device, a first image of the surface of the object while the surface of the object is illuminated by the first UV LED, performing with the processor in the hand-held device, a function upon the first image to determine a type of contaminant disposed upon the surface of the object, determining with the processor in the hand-held device, sanitation techniques to perform in response to the type of contaminant that is determined, and displaying with a touch-screen display on the hand-held device, the sanitation techniques to the user.Type: ApplicationFiled: June 19, 2015Publication date: March 31, 2016Inventors: Yitao LIAO, Robert WALKER, Doug COLLINS, Sheung LI
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Publication number: 20160093413Abstract: The electroconductive composition of the present invention contains an electroconductive polymer (A) having a sulfonic acid group and/or carboxylic acid group, and a basic compound (B) having two or more nitrogen atoms. The electrical conductor of the present invention consists of the electroconductive composition. In the laminate of the present invention, the electrical conductor is laminated on at least one surface of a substrate. The method for producing a laminate of the present invention includes applying the electroconductive composition to at least one surface of a substrate, heating and drying the composition, and forming an electrical conductor. The electroconductive film of the present invention is provided with the electrical conductor.Type: ApplicationFiled: May 16, 2014Publication date: March 31, 2016Applicant: Mitsubishi Rayon Co., Ltd.Inventors: Masashi UZAWA, Akira YAMAZAKI, Hiroya FUKUDA
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Publication number: 20160093414Abstract: A PTC composition comprises crystalline polymer and conductive filler. The conductive filler comprises tungsten carbide powder dispersed in the crystalline polymer, and the tungsten carbide powder comprises impurity of less than 7% by weight. The impurity comprises the materials other than tungsten monocarbide.Type: ApplicationFiled: July 22, 2015Publication date: March 31, 2016Inventors: CHIEN CHENG HO, TONG CHENG TSAI, KUO CHANG LO, YI AN SHA
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Publication number: 20160093415Abstract: An internal electrode paste including Ag as a conductor, a resin, and a solvent. Wherein the resin is of a type where 100% of the resin burns in a temperature range that is equal to or lower than a sintering onset temperature of the conductor.Type: ApplicationFiled: December 10, 2015Publication date: March 31, 2016Inventor: YORINOBU MAEDA
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Publication number: 20160093416Abstract: An endoscope woven cable includes plural cables arranged in parallel, and a filament woven through the plurality of cables in an alignment direction thereof. The plural cables include at least one rigidity-imparting wire. The rigidity-imparting wire may be arranged at both ends and in a middle of the plurality of cables in the alignment direction thereof or symmetrically positioned about a center of the plurality of cables in the alignment direction thereof. An outer diameter of the rigidity-imparting wire may be not greater than that of a rest of the plural cables. The rigidity-imparting wire may include a bare stainless steel wire or a bare steel wire.Type: ApplicationFiled: September 8, 2015Publication date: March 31, 2016Inventors: Detian HUANG, Takanobu WATANABE, Norihiro NISHIURA
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Publication number: 20160093417Abstract: A cable strengthening and personalization device and method for use with cables round, flat or with contemporous shape for devices which include smart phones, smart watches, inductive smart device chargers, tablet computers, MP3 media players, mobile phones, digital recording devices both audio and video, global positioning devices, game controllers and other devices that use a USB or other type plug on the power facing end and iPhone lightening, phone plug, USB standard A, mini or micro USB type or other type plug on the device end is herein disclosed. The device components are designed to strengthen and customize existing device connection cables in the area of, just adjacent to and along the entire existing cable length without dismantling such cables nor impact the usability especially in the applications where limited space exists and enhance the durability and or appearance of the existing cables, plug and power supplies (AC to DC converters or DC).Type: ApplicationFiled: September 28, 2014Publication date: March 31, 2016Inventors: James Clifford Litterini, Cameron Lynne Litterini
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Publication number: 20160093418Abstract: An insulated conductor assembly is provided. The assembly comprises at least two insulated conductors, a jacket enclosing the at least two insulated conductors, and a filling compound arranged between the jacket and the at least two insulated conductors. The assembly comprises first sections, extending along the assembly, completely filled with the filling compound between the jacket and the at least two insulated conductors, and second sections, extending along the assembly, void of filling compound between the jacket and the at least two insulated conductors. Further a method of manufacturing an insulated conductor assembly and a manufacturing arrangement for manufacturing an insulated conductor assembly are provided.Type: ApplicationFiled: May 15, 2013Publication date: March 31, 2016Inventors: Lars EFRAIMSSON, Johan ÄHMAN, Joakim JÖRGENSEN, Anders LINDROTH, Stefan SÖDERSTRÖM, Johan SVANBERG, Anders GATU
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Publication number: 20160093419Abstract: The present invention relates to a coaxial cable, and more particularly, to a coaxial cable that satisfies a required flame-retardant grade and electrical characteristics and that is inexpensive to manufacture, compared to the related art.Type: ApplicationFiled: September 8, 2015Publication date: March 31, 2016Inventors: Sang-Sik SHIN, Jong-Seb BAECK, Seung-Yong SHIN
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Publication number: 20160093420Abstract: A composite medium may be artificially structured to enhance electron-phonon coupling in the composite medium, whereby to enhance a Cooper pairing instability in the composite medium. This yields a composite superconductor with superconducting properties (energy gap, critical temperature, etc.) more robust than the superconducting properties of the constituent media. The electron-phonon coupling may be enhanced by increasing the phononic density of states in the composite medium, by introducing hyperbolic phononic dispersion, phononic van Hove singularities, and/or reduced phonon group velocities.Type: ApplicationFiled: September 25, 2015Publication date: March 31, 2016Inventor: YAROSLAV A. URZHUMOV
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Publication number: 20160093421Abstract: An electrical insulation system for a high voltage inductive device includes a cylindrical insulation barrier defining an axial direction, a longitudinal bar having a main extension in the axial direction, the longitudinal bar arranged to support the cylindrical insulation barrier along the axial direction and to provide spacing in a radial direction, and the longitudinal bar having a first side facing the cylindrical insulation barrier and a second side, opposite the first side, having a groove, and a spacer having a main extension in the radial direction, the spacer being arranged to provide spacing in the axial direction, the spacer having a groove fitting end portion. The longitudinal bar is adapted to receive the groove fitting end portion of the spacer in the groove, and wherein the spacer is dimensioned so relative to the groove that the groove captures any streamer propagating from the spacer towards the cylindrical insulation barrier.Type: ApplicationFiled: May 19, 2014Publication date: March 31, 2016Applicant: ABB TECHNOLOGY LTDInventors: Anders Bo Eriksson, Uno Gäfvert, José-Luis Del Real, Jan Hajek
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Publication number: 20160093422Abstract: An insulating device includes a body portion including a first surface feature extending between a first surface end and a second surface end. The first surface end defines a first surface cross-sectional size. The second surface end defines a second surface cross-sectional size. The second surface cross-sectional size is less than the first surface cross-sectional size. The body portion includes a second surface feature extending between a third surface end and a fourth surface end. The third surface end defines a third surface cross-sectional size. The fourth surface end defines a fourth surface cross-sectional size. The fourth surface cross-sectional size is less than the third surface cross-sectional size. The insulating device includes a flange portion having a flange wall. The flange wall includes a first mating portion that engages the first surface feature and a second mating portion that engages the second surface feature of the body portion.Type: ApplicationFiled: September 25, 2014Publication date: March 31, 2016Inventors: Lonnie C. Elder, Jan Czyzewski
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Publication number: 20160093423Abstract: A resistive voltage divider includes at least a first and a second resistor electrically connected in series. The resistors are made of an electrically resistive film material and each resistor is applied as a trace onto an insulating substrate. The divider's voltage ratio has a value between one hundred and one million. In order to achieve these high voltage ratios, a third resistor is electrically connected in parallel with the second resistor. The trace of the second and of the third resistor each overlap on one end at least in part with a first contacting terminal and on the respective other end at least in part with a second contacting terminal. A compact size of the divider is maintained by arranging the first and second contacting terminals in an interdigitated manner.Type: ApplicationFiled: December 8, 2015Publication date: March 31, 2016Applicant: ABB AGInventors: Adrian HOZOI, Rolf DISSELNKOTTER
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Publication number: 20160093424Abstract: An article having a multiple magnetic polarities and a method for making the article are disclosed. The article can be a monolithic substrate form from a metallic material or materials. The article may include a first magnetic polarity and a second magnetic polarity opposite the first magnetic polarity. Methods for making the article include provide either providing a monolithic substrate having a first magnetic polarity, or applying a first magnetic field to the monolithic substrate to impart a first magnetic polarity. The method may also include raising the temperature of the monolithic substrate in order to reduce the coercivity of the monolithic substrate. The temperature of the monolithic substrate may also be selectively raised to lower the coercivity of the monolithic substrate in associated areas. By lowering the coercivity, the second magnetic polarity may be imparted on the monolithic substrate.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Inventors: Hao Zhu, John C. DiFonzo, Sean S. Corbin
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Publication number: 20160093425Abstract: In at least one embodiment, a hybrid permanent magnet is disclosed. The magnet may include a plurality of anisotropic regions of a Nd—Fe—B alloy and a plurality of anisotropic regions of a MnBi alloy. The regions of Nd—Fe—B alloy and MnBi alloy may be substantially homogeneously mixed within the hybrid magnet. The regions of Nd—Fe—B and MnBi may have the same or a similar size. The magnet may be formed by homogeneously mixing anisotropic powders of MnBi and Nd—Fe—B, aligning the powder mixture in a magnetic field, and consolidating the powder mixture to form an anisotropic hybrid magnet. The hybrid magnet may have improved coercivity at elevated temperatures, while still maintaining high magnetization.Type: ApplicationFiled: September 25, 2014Publication date: March 31, 2016Inventors: Wanfeng LI, C Bing RONG, Leyi ZHU, Feng LIANG, Michael W. DEGNER, Jun YANG
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Publication number: 20160093426Abstract: A bonded magnet is provided which includes first and second components. The first and second components have first and second non-action surfaces, and first and second action surfaces that intersect the first and second non-action surfaces, respectively. First and second flux groups curve inside the first and second components from the first and second non-action surfaces to the first and second action surfaces, respectively. The areas of the first and second non-action surfaces are greater than the first and second action surfaces, respectively. The flux densities on the first and second action surfaces are higher than the first and second non-action surfaces, respectively. The pole on the first non-action surface is opposite to the second non-action surface. The first and second non-action surfaces are coupled to each other. The first flux groups continuously extend from one to another.Type: ApplicationFiled: September 28, 2015Publication date: March 31, 2016Applicant: NICHIA CORPORATIONInventors: Rie YOSHIDA, Michiya KUME, Kohei IHARA, Taku ICHIMORI
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Publication number: 20160093427Abstract: A removable fluid barrier comprises a generally planar flexible body fabricated of at least one resilient material and encapsulating a plurality of permanent magnets. The flexible body has an outer face defining a sealing surface of the removable fluid barrier.Type: ApplicationFiled: September 26, 2014Publication date: March 31, 2016Inventor: Elliott Chewins
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Publication number: 20160093428Abstract: The periodic magnetic field generator includes a flat-shaped first yoke, and a plurality of main permanent magnets, an auxiliary permanent magnet, and a side permanent magnet on the first yoke. The plurality of main permanent magnets are magnetized in a first direction of generating magnetic fields, the direction being perpendicular to the first yoke, and disposed such that orientations of the magnetization become opposite alternately in the first direction. The auxiliary permanent magnet is magnetized in a second direction perpendicular to side faces of the plurality of main permanent magnets, and placed between the side faces of the main permanent magnets. The side permanent magnet is magnetized in a third direction perpendicular to the first direction, and disposed so as to cover end faces of the main permanent magnets and the auxiliary permanent magnet, the end faces being perpendicular to the side faces of the main permanent magnets.Type: ApplicationFiled: September 18, 2015Publication date: March 31, 2016Inventor: TSUTOMU YOSHIKAWA
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Publication number: 20160093429Abstract: An array of paired bar magnets (200) provides a reinforced magnetic field (203) on a first side and a nearly canceled magnetic field (204) on a second side of each pair. The array may be a planar array (600) with a plurality of parallel, coplanar pairs (620). The array may provide air gaps between consecutive pairs, and within individual pairs, to provide improved transparency to sound. The array may be doubled (700), with the reinforced fields (713) of one half of the array opposing the reinforced fields (723) of the other half to produce a more intense field (730). In another configuration, the array may be doubled (800) with the nearly canceled fields of one pair facing the nearly canceled fields of the other, producing an array with reinforced fields (801-804) on four sides.Type: ApplicationFiled: September 26, 2014Publication date: March 31, 2016Inventor: Dragoslav Colich
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Publication number: 20160093430Abstract: A magnetic field distribution control apparatus includes a rod portion, a coil disposed at one side of an upper surface of the rod portion, and a ferrite movably disposed within the coil and configured to produce a magnetic field.Type: ApplicationFiled: December 9, 2015Publication date: March 31, 2016Inventor: Heejin LEE
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Publication number: 20160093431Abstract: Disclosed are apparatus and methods for arrayed embedded magnetic components that include magnetic devices that have a core that is embedded between two or more substrates and a winding pattern surrounding the core that is implemented on and through the two or more substrates. The winding pattern is operable to induce a magnetic flux within the core when energized by a time varying voltage potential. The winding pattern may be implemented by printed circuit layers, plated vias, other electrically conductive elements, and combinations thereof. Arrayed embedded magnetic components include two or more electrically interconnected magnetic devices positioned side-by-side in a horizontal integration, positioned top-to-bottom in a vertical integration, or combinations thereof. The magnetic devices may have a magnetic functionality such as, but not limited to, a transformer, inductor, and filter.Type: ApplicationFiled: December 9, 2015Publication date: March 31, 2016Inventor: James E. Quilici
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Publication number: 20160093432Abstract: An interleaved transformer or a transformer and integrated set of inductors formed via a magnetic structure comprising a set of E cores and an I core inserted between the set of E cores is provided in order to address issues that occur when a structured transformer is coupled together with inductor flux. Actual inductance exhibited by the transformers is controlled by a preselected precise gap between the I core and each of the E cores. The advantage of such a structured transformer cancels out the magnetic flux in certain legs of the magnetic structure requiring less magnetic material and thus, less core losses while improving the overall efficiency of a power supply.Type: ApplicationFiled: September 26, 2014Publication date: March 31, 2016Inventors: Chu T. Chung, Marc H. Coq, Cecil C. Dishman, Chien H. Lin, Randhir S. Malik
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Publication number: 20160093433Abstract: To provide a small non-contact power transmitter capable of securing the power transmission distance even when positional deviation occurs between a power transmission coil and a power receiving coil.Type: ApplicationFiled: September 25, 2015Publication date: March 31, 2016Inventors: Kiyohito ENDOU, Teruo EBIHARA, Masafumi HOSHINO
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Publication number: 20160093434Abstract: An electronic component includes a multilayer body formed by laminating an insulator substrate and a plurality of insulator layers, a coil including coil conductors provided on the insulator substrate, and an internal magnetic path penetrating the insulator substrate. A manufacturing method for the electronic component includes: forming the coil conductors and a sacrificial conductor at the same time on a mother insulator substrate, which is the assemblage of a plurality of the insulator substrates; laminating insulator sheets, which are to be the corresponding insulator layers mentioned above, on the mother insulator substrate so as to cover the coil conductors; and exposing the sacrifice conductor by removing part of the insulator sheets.Type: ApplicationFiled: September 30, 2015Publication date: March 31, 2016Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Akinori HAMADA