Patents Issued in July 28, 2016
  • Publication number: 20160217977
    Abstract: A gas delivery system for a ceramic showerhead includes gas connection blocks and a gas ring, the gas connection blocks mounted on the gas ring such that gas outlets in the blocks deliver process gas to gas inlets in an outer periphery of the showerhead. The gas ring includes a bottom ring with channels therein and a welded cover plate enclosing the channels. The gas ring can include a first channel extending ½ the length of the gas ring, two second channels connected at midpoints thereof to downstream ends of the first channel, and four third channels connected at midpoints thereof to downstream ends of the second channels. the cover plate can include a first section enclosing the first channel, two second sections connected at midpoints thereof to ends of the first section, and third sections connected at midpoints thereof to ends of the second sections.
    Type: Application
    Filed: January 25, 2016
    Publication date: July 28, 2016
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Michael Kang, Alex Paterson
  • Publication number: 20160217978
    Abstract: The subject matter of the instant invention is a plasma generation device in which at least one inductive device and at least one capacitive device are provided for coupling energy into a plasma in a plasma chamber. The at least one inductive device and the at least one capacitive device can be supplied with energy separately from one another by different frequency generators or by a common frequency generator.
    Type: Application
    Filed: September 11, 2014
    Publication date: July 28, 2016
    Inventor: Joachim Mai
  • Publication number: 20160217979
    Abstract: To provide microwave excitation plasma processing device capable of generating wide-width plasma jet having high uniformity, high density, and low temperature even under intermediate pressure and high pressure. The microwave plasma processing device includes: dielectric substrate; tapered portion provided in one end portion of the dielectric substrate, the tapered portion being shaped so that thickness of the dielectric substrate becomes gradually smaller; microstrip line; ground conductor; microwave input portion; gas input port configured to input gas into the dielectric substrate; plasma generating portion; gas flow widening portion provided inside the dielectric substrate and configured to supply wide-width gas flow having uniform flow velocity to the plasma generating portion, the gas flow widening portion being formed to make a gas flow width wider as the gas flow advances; gas flow channel configured to supply the gas to the gas flow widening portion; and nozzle for blowing plasma.
    Type: Application
    Filed: August 29, 2014
    Publication date: July 28, 2016
    Inventors: Jaeho KIM, Hajime SAKAKITA
  • Publication number: 20160217980
    Abstract: Provided is a plasma processing apparatus including a processing chamber which is disposed in a vacuum vessel and able to be decompressed, a sample stage on a top surface of which a wafer to be processed is mounted, an opening which is configured to supply a heat-transfer gas to a gap between the wafer and the top surface of the sample stage, a regulator which regulates a flow rate of the heat-transfer gas, and a controller which regulates an operation of the regulator based on a pressure of the gap detected using an amount of the heat-transfer gas leaking from the regulator to the processing chamber through the gap while the wafer is mounted on the sample stage and an amount of the heat-transfer gas supplied from the opening to the processing chamber while the wafer is not mounted on the sample stage.
    Type: Application
    Filed: September 11, 2015
    Publication date: July 28, 2016
    Inventors: Shintarou NAKATANI, Tsunehiko TSUBONE
  • Publication number: 20160217981
    Abstract: An exemplary semiconductor processing system may include a remote plasma source coupled with a processing chamber having a top plate. An inlet assembly may be used to couple the remote plasma source with the top plate and may include a mounting assembly, which in embodiments may include at least two components. The inlet assembly may further include a precursor distribution assembly defining a plurality of distribution channels fluidly coupled with an injection port.
    Type: Application
    Filed: March 14, 2016
    Publication date: July 28, 2016
    Applicant: Applied Materials, Inc.
    Inventors: Andrew Nguyen, Kartik Ramaswamy, Srinivas Nemani, Bradley Howard, Yogananda Sarode Vishwanath
  • Publication number: 20160217982
    Abstract: Disclosed are a method and an apparatus for the detection of a plasma in a process chamber for the treatment of substrates. In the method, the pressure within the chamber is measured over a period of time using a pressure sensor, a sudden change in pressure is detected and an ignition or extinguishing of a plasma determined at least by means of the pressure change. The apparatus comprises a process chamber, for receiving at least one substrate, with at least one plasma generator, at least one pressure sensor which is situated so as to detect the pressure within the process chamber and output an output signal corresponding to the pressure, and at least one evaluation unit. The evaluation unit is capable of monitoring over a period of time an output signal from the pressure sensor and, on the basis of at least one sudden change in the output signal of the pressure sensor, of determining an ignition and/or an extinguishing of a plasma.
    Type: Application
    Filed: August 22, 2014
    Publication date: July 28, 2016
    Inventors: Wilhelm Kegel, Wilfried Lerch, Jürgen Niess, Nicole Sacher
  • Publication number: 20160217983
    Abstract: A tantalum sputtering target containing niobium and tungsten as essential components in a total amount of 1 massppm or more and less than 10 massppm, and having a purity of 99.9999% or higher excluding niobium, tungsten and gas components. Provided is a high purity tantalum sputtering target comprising a uniform and fine structure which is adjusted to be within an optimal range and which enables deposition of a uniform film at a high deposition rate in a stable manner.
    Type: Application
    Filed: September 26, 2014
    Publication date: July 28, 2016
    Inventor: Kunihiro Oda
  • Publication number: 20160217984
    Abstract: A conductive target material includes substantially one lithium compound, preferably lithium phosphate, and carbon, as well as typical impurities. A process for producing a conductive target material and a thin-film battery using a conductive target material for deposition of a lithium ion electrolyte layer are also provided.
    Type: Application
    Filed: September 3, 2014
    Publication date: July 28, 2016
    Inventors: PETER POLCIK, ENRICO FRANZKE, MARCUS WOLFF
  • Publication number: 20160217985
    Abstract: A mass spectrometer comprises: an ion source that generates ions having an initial range of mass-to-charge ratios; an auxiliary ion detector, downstream from the ion source that receives a plurality of first ion samples derived from the ions generated by the ion source and determines a respective ion current measurement for each of the plurality of first ion samples; a mass analyser, downstream from the ion source that receives a second ion sample derived from the ions generated by the ion source and to generate mass spectral data by mass analysis of the second ion sample; and an output stage that establishes an abundance measurement associated with at least some of the ions generated by the ion source based on the ion current measurements determined by the auxiliary ion detector.
    Type: Application
    Filed: September 10, 2014
    Publication date: July 28, 2016
    Inventor: Alexander Alekseevich MAKAROV
  • Publication number: 20160217986
    Abstract: A method of assessing mass spectral peaks obtained by a mass spectrometer is disclosed. The method comprises: providing experimentally obtained mass spectral data; selecting a chemical compound thought to have been analysed so as to provide said experimentally observed data, and modelling the spectral data predicted to be detected if the compound was to be mass analysed. The step of modelling comprises: generating a first set of spectral data including at least one mass peak that is predicted to be detected for the selected compound; generating a second set of spectral data by duplicating at least part of the first set of spectral data and shifting at least one mass peak in mass to charge ratio relative to the corresponding at least one mass peak in the first set of spectral data; and summing the amplitudes of the first and second sets of spectral data to produce a model data set having at least one mass peak.
    Type: Application
    Filed: September 17, 2014
    Publication date: July 28, 2016
    Inventors: Richard Denny, Paul Slater
  • Publication number: 20160217987
    Abstract: Systems and methods for identifying precursor ions of product ions from combined product ion spectra are provided. N precursor ions are selected. N groups of the N precursor ions are created. The tandem mass spectrometer is instructed to perform multiplexed precursor ion selection on the continuous beam of ions, fragment each of the N?1 precursor ions, and measure the intensities of the product ions, producing N product ion spectra. A heat map is plotted, producing N heat maps. The N product ion spectra are combined into a combined product ion spectrum. A corresponding precursor ion of a peak is identified by finding a heat map of the N heat maps that does not have data for the mass of the peak and determining that a precursor ion of the N precursor ions that is not included in a group that produced the heat map is the corresponding precursor ion.
    Type: Application
    Filed: April 2, 2016
    Publication date: July 28, 2016
    Inventor: Takashi Baba
  • Publication number: 20160217988
    Abstract: Ions are separated from a sample over time and filtered. The precursor ions produced at each step are fragmented. Resulting product ions are analyzed using a mass analyzer, producing a product ion spectrum for each step of the transmission window and a plurality of product ion spectra for the mass range for the each scan. The plurality of product ion spectra are received, producing a plurality of multi-scan product ion spectra. At least one product ion is selected from the plurality of multi-scan product ion spectra that is present at least two or more times in product ion spectra from each of two or more scans. A known separation profile of a precursor ion is fit to intensities from the at least one product ion in the plurality of multi-scan product ion spectra to reconstruct a separation profile of a precursor ion of the at least one product ion.
    Type: Application
    Filed: April 2, 2016
    Publication date: July 28, 2016
    Inventors: Nic G. Bloomfield, Frank Londry
  • Publication number: 20160217989
    Abstract: A method of controlling a DC power supply to change a DC offset voltage applied to a component for manipulating charged particles. The method includes, whilst an AC voltage waveform is being applied to the component: controlling the DC power supply to produce an initial DC offset voltage that is applied to the component via a link that causes the DC offset voltage at the component to lag behind the DC offset voltage produced by the DC power supply when the DC offset voltage produced by the DC power supply is changed; then controlling the DC power supply to produce an overdrive DC offset voltage that is applied to the component via the link for a predetermined period of time; then controlling the DC power supply to produce a target DC offset voltage that is applied to the component via the link, wherein the target DC offset voltage is between the initial DC offset voltage and the overdrive DC offset voltage.
    Type: Application
    Filed: December 30, 2015
    Publication date: July 28, 2016
    Applicant: SHIMADZU CORPORATION
    Inventors: Matthew GILL, Stuart HARLEY, Jeff CHADBOURNE
  • Publication number: 20160217990
    Abstract: An ion detection system for a detecting a quantity of ions exiting from a mass analyzer of a mass spectrometer comprises: (a) photon generating means configured to receive the quantity of ions and to generate a quantity of photons that is proportional to the quantity of ions; (b) a linear array of photo-detectors configured along a line for detecting a variation of a portion of the quantity of generated photons along the line; and (c) an optical system for directing the portion of the quantity of photons from the photon generating means to the linear array of photo-detectors comprising: (c1) a first cylindrical lens having a first lens axis disposed parallel to the line; (c2) a second cylindrical lens or rod lens having a second lens axis disposed parallel to the line; and a doublet lens.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Inventors: Johnathan Wayne SMITH, Alan E. SCHOEN
  • Publication number: 20160217991
    Abstract: Systems and methods for multiplexed precursor ion selection are provided. A mass isolator includes a selection region of rods, a transmission region of rods, and a barrier electrode lens separating the selection and transmission regions. Two or more different precursor ions are selected by applying two or more different AC voltage frequencies to rods of a selection region in order to resonate the two or more different precursor ions from a continuous beam of ions. The two or more different precursor ions are transmitted by applying a DC voltage to the barrier electrode lens, creating an electric field potential barrier over which only the resonating ions are transmitted. Precursor ions of product ions from combined product ion spectra produced by multiplexed precursor ion selection are identified by grouping the target precursor ions.
    Type: Application
    Filed: October 7, 2014
    Publication date: July 28, 2016
    Inventor: Takashi Baba
  • Publication number: 20160217992
    Abstract: A probe assembly is disclosed comprising an inlet for receiving an eluent from a chromatography device; an outlet (120) for delivering the eluent to an ion source of a mass spectrometer; and an attachment device (122) for attaching the outlet to the mass spectrometer. The outlet comprises an electrically conductive capillary (124) and an electrically conductive member (129) surrounding at least part of the electrically conductive capillary (124). The electrically conductive member (129) is arranged to receive a voltage upon connection of the attachment device (122) to the mass spectrometer and the electrically conductive member (129) is arranged to provide an electrical connection from the electrically conductive member (129) to the electrically conductive capillary (124).
    Type: Application
    Filed: September 17, 2014
    Publication date: July 28, 2016
    Inventors: Steve O'Brien, Ian Trivett
  • Publication number: 20160217993
    Abstract: In various embodiments of the invention, a cargo container can be monitored at appropriate time intervals to determine that no controlled substances have been shipped with the cargo in the container. The monitoring utilizes reactive species produced from an atmospheric analyzer to ionize analyte molecules present in the container which are then analyzed by an appropriate spectroscopy system. In an embodiment of the invention, a sorbent surface can be used to absorb, adsorb or condense analyte molecules within the container whereafter the sorbent surface can be interrogated with the reactive species to generate analyte species characteristic of the contents of the container.
    Type: Application
    Filed: March 25, 2016
    Publication date: July 28, 2016
    Applicant: IONSENSE INC.
    Inventor: BRIAN D. MUSSELMAN
  • Publication number: 20160217994
    Abstract: The invention relates to a micro-nozzle array comprising a plurality of capillaries comprising a first silica-based material and a second silica-based material substantially surrounding the first silica-based material of the plurality of capillaries, and a plurality of nozzles extending beyond a face of the micro-nozzle array, each nozzle corresponding to a single capillary, wherein each nozzle comprises the first silica-based material. The micro-nozzle array may be used in hydrodynamic or electro-osmotic applications. In one embodiment the micro-nozzle array is a multiple electrospray emitter. The invention also relates to methods for preparing and using micro-nozzle arrays.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 28, 2016
    Inventors: Richard D. Oleschuk, Yueqiao Fu, Graham Gibson, Tim Hutama
  • Publication number: 20160217995
    Abstract: An embodiment of the invention relates to a TOF-MS capable of performing mass spectrometry of a sample at a high throughput. The TOF-MS has an acceleration part for accelerating an ion, a detector for detecting an event of arrival of the accelerated ion, and a data processing part for performing mass spectrometry of the sample, based on a time of flight of the ion. A first structure of the detector includes an MCP, a dynode, and an anode. In the first structure, the dynode is set at a potential higher than that of an output face of the MCP. The anode is disposed at an intermediate position between the MCP and the dynode or on the dynode side with respect to the intermediate position. The anode has plural apertures and is set at a potential higher than that of the dynode.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 28, 2016
    Inventor: Masahiro HAYASHI
  • Publication number: 20160217996
    Abstract: A lamp for automotive front lighting and a vehicle headlight comprising the lamp are described, as well as a method of manufacturing the lamp. The lamp 10 comprises a base 12 for mechanical and electrical connection to an automotive headlight 50. A burner 14 is fixed to the base 12 and comprises a sealed transparent vessel 22. A first filament 34 is arranged within the vessel 22. A holding wire 30c is arranged within the vessel, and a baffle 40 is arranged proximate to the first filament 34 to partially shield light emitted from the first filament 34. The baffle 40 is fixed to the holding wire 30c. The transparent vessel 22 comprises a vessel wall including a cylindrical portion 24 surrounding the first filament 34. In order to obtain a lamp which may withstand vibration, a support member 38, 138, 238 is provided including at least a first part 39 fixed to the baffle 40 or to the holding wire 30c and a second part 43 which is in contact with the cylindrical portion of the vessel 22.
    Type: Application
    Filed: September 29, 2014
    Publication date: July 28, 2016
    Inventors: Markus Petter, Helmut Tiesler-Wittig, Bernd Schönfelder, Johannes Gerhard Möeller
  • Publication number: 20160217997
    Abstract: According to one embodiment, a substrate processing device includes a nozzle that discharges chemical to a circumferential edge portion of a substrate; and a rotation processing unit that rotates the substrate. The substrate processing device also includes a determination unit and a rotation number control unit. The determination unit determines whether or not a discharging position of the chemical by the nozzle arrived at an outer circumferential portion of the substrate from a position on an outer side of the substrate. The rotation number control unit controls a rotation number of the substrate based on a determination result by the determination unit.
    Type: Application
    Filed: May 19, 2015
    Publication date: July 28, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tomoyuki TAKEISHI
  • Publication number: 20160217998
    Abstract: A method for producing mirror-polished wafer, the method produces a plurality of mirror-polished wafers by performing, on plurality of silicon wafers obtained by slicing a silicon ingot, slicing strain removing step of removing strain on a surface caused by slicing, etching step of removing strain caused by the slicing strain removing step, and double-side polishing step of performing mirror polishing on both surfaces of the silicon wafers subjected to etching, each step being performed by batch processing, wherein silicon wafers which are processed in double-side polishing step by batch processing are selected from silicon wafers processed in same batch in the slicing strain removing step and the number of silicon wafers to be selected is made to be equal to the number of silicon wafers processed in the slicing strain removing step or submultiple thereof. As a result, a method that can produce mirror-polished wafers having high flatness is provided.
    Type: Application
    Filed: August 20, 2014
    Publication date: July 28, 2016
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiromasa HASHIMOTO, Yoshihiro USAMI, Kazuaki AOKI, Shigeru OBA
  • Publication number: 20160217999
    Abstract: Methods of depositing a film comprising positioning a plurality of substrates on a substrate support in a processing chamber having a plurality of processing regions, each processing region separated from an adjacent region by a gas curtain. Alternating exposure to first reactive gases, purge gases, second reactive gases, and purge gas in at least one of the processing regions to deposit a film.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 28, 2016
    Inventors: Tatsuya E. Sato, Eran Newman
  • Publication number: 20160218000
    Abstract: Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.
    Type: Application
    Filed: January 19, 2016
    Publication date: July 28, 2016
    Inventors: Soo Young CHOI, Beom Soo PARK, Yi CUI, Tae Kyung WON, Dong-kil YIM
  • Publication number: 20160218001
    Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a first cleaner and a second cleaner. The first cleaner polishes a semiconductor substrate or a polishing target material on the semiconductor substrate with an abrasive and then cleans a top face of the semiconductor substrate or of the polishing target material while the semiconductor substrate is rotated. The second cleaner rubs an end portion of the semiconductor substrate with a physical contact according to rotation of the semiconductor substrate.
    Type: Application
    Filed: June 16, 2015
    Publication date: July 28, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi HIRASAWA, Dai FUKUSHIMA
  • Publication number: 20160218002
    Abstract: A method for depositing an insulating layer includes performing a primary deposition over a sidewall of a feature by depositing a layer of silicate glass using a silicon source at a first flow rate and a dopant source at a second flow rate. A ratio of the flow of the dopant source to the flow of the silicon source is a first ratio. The method further includes performing a secondary deposition over the sidewall of a feature by increasing the flow of the silicon source relative to the flow of the dopant source. The ratio of the flow of the dopant source to the flow of the silicon source is a second ratio lower than the first ratio, and stopping the flow of the silicon source after performing the secondary deposition. A reflow process is performed after stopping the flow. A variation in thickness of the layer of silicate glass over the sidewall of a feature after the reflow process is between 1% to 20%.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 28, 2016
    Inventors: Juergen Steinbrenner, Markus Kahn, Helmut Schoenherr, Ravi Joshi, Heimo Hofer, Martin Poelzl, Harald Huetter
  • Publication number: 20160218003
    Abstract: A single-crystal silicon carbide substrate has a main surface having a surface roughness fulfilling Ra ?1 nm, and has a ratio of hidden scratches of less than 50%, where, in the case where the main surface is arbitrary observed at 50 or more observation points with a field of view having a diameter of 100 ?m, the ratio of hidden scratches is defined by a value obtained by dividing the number of the observation points at which a striped hidden scratch having a length of at least 50 ?m by the total number of the observation points.
    Type: Application
    Filed: January 26, 2016
    Publication date: July 28, 2016
    Inventors: Taisuke HIROOKA, Hiroyuki OKUDA
  • Publication number: 20160218004
    Abstract: The invention includes a method of promoting thin film growth on a solid substrate, wherein derivatization of the substrate comprises formation of at least one surface species. In certain embodiments, the method comprises desorbing the surface species from the substrate using electron stimulated desorption (ESD).
    Type: Application
    Filed: September 22, 2014
    Publication date: July 28, 2016
    Applicant: The Regents of the University of Colorado, a Body Corporate
    Inventors: Steven M. GEORGE, Andrew S. CAVANAGH
  • Publication number: 20160218005
    Abstract: A process is used to form a protective layer to cover a divot between two regions of a semiconductor material. During etching processes, the protective layer protects the divot to be etched away and reduces material loss of a Silicon (Si)-shallow trench isolation (STI) substrate. A selective coverage is provided to protect the height of the Si-STI substrate and an Si-STI interface. A desirable geometry can be obtained for forming a silicon germanium (SiGe)layer with uniform thickness near the divot.
    Type: Application
    Filed: April 20, 2015
    Publication date: July 28, 2016
    Inventors: Quanbo Li, Jun Huang, Xiangguo Meng
  • Publication number: 20160218006
    Abstract: The present invention discloses an InGaAs film grown on a Si substrate, which comprises a Si substrate, a low temperature In0.4Ga0.6As buffer layer, a high temperature In0.4Ga0.6As buffer layer and an In0.53Ga0.47As expitaxial film, arranged sequentially, wherein the low temperature In0.4Ga0.6As buffer layer is an In0.4Ga0.6As buffer layer grown at the temperature of 350˜380®C.; the high temperature In0.4Ga0.6As buffer layer is an In0.4Ga0.6As buffer layer grown at the temperature of 500˜540° C., and the sum of the thickness of the low temperature In0.4Ga0.6As buffer layer and the thickness of the high temperature In0.4Ga0.6As buffer layer is 10˜20 nm. The invention further discloses a method for preparing the InGaAs film. The InGaAs film grown on the Si substrate of the present invention has good crystal quality, is almost completely relaxed, and has a simple preparation process.
    Type: Application
    Filed: December 5, 2014
    Publication date: July 28, 2016
    Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Guoqiang LI, Fangliang GAO, Yunfang GUAN, Lei WEN, Jingling LI, Shuguang ZHANG
  • Publication number: 20160218007
    Abstract: A method for manufacturing a semiconductor structure is provided. The method includes implanting a first type of dopants in a first region and a second region of a substrate and implanting a second type of dopants in the second region of the substrate. The method includes forming a material layer over the first region and the second region of the substrate and patterning the material layer, the first region of the substrate, and the second region of the substrate to form a first fin structure and a second fin structure The method includes forming a gate structure across the first fin structure and the second fin structure.
    Type: Application
    Filed: February 17, 2016
    Publication date: July 28, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Yao WEN, Jui-Yao LAI, Yao-De CHIOU, Sai-Hooi YEONG, Yen-Ming CHEN
  • Publication number: 20160218008
    Abstract: This invention discloses a semiconductor power device disposed in a semiconductor substrate including an active cell areas and a termination area. The semiconductor power device further comprises a plurality of gate trenches formed at a top portion of the semiconductor substrate in the active cell area wherein each of the gate trenches is partially filled with a conductive gate material with a top portion of the trenches filled by a high density plasma (HDP) insulation layer. The semiconductor power device further comprises mesa areas of the semiconductor substrate disposed between the gate trenches wherein the mesa areas are recessed and having a top mesa surface disposed vertically below a top surface of the HDP insulation layer wherein the HDP insulation layer covering over the conductive gate material constituting a stick-out boundary-defining layer surrounding the recessed mesa areas in the active cell areas between the gate trenches.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 28, 2016
    Applicant: Alpha & Omega Semiconductor, Incorporated
    Inventors: Wenjun Li, Paul Thorup, Hong Chang, Yeeheng Lee, Yang Xiang, Jowei Dun, Hongyong Xue, Yiming Gu
  • Publication number: 20160218009
    Abstract: The present invention relates to a method of producing patterned silver nanowire, comprising: coating a photosensitive polyamide acid polymer solution on a silica substrate and dried; using a photomask to paste on the photosensitive polyamic acid and illuminates by ultraviolet; using a developer to obtain a patterned polyamide acid template; coating a metal nanowire suspension on the patterned template; and removing the metal nanowire outside of the patterned polyamic acid. The present invention also discloses an electrode using the patterned metal nanowire and a transistor using the patterned metal nanowire electrode.
    Type: Application
    Filed: April 24, 2015
    Publication date: July 28, 2016
    Inventors: Hsuan-Chun CHANG, Cheng-Yu CHUNG, Wen-Chang CHEN
  • Publication number: 20160218010
    Abstract: A method includes forming a first etch target layer and a first mask layer on a substrate. Sacrificial patterns extending in a first direction are formed on the first mask layer in a second direction. Spacers are formed on sidewalls of the sacrificial patterns. After removing the sacrificial patterns, the first mask layer is etched using the spacers as an etching mask to form first masks. Second masks are formed on sidewalls of each first mask to define a third masks including each first mask and the second masks on sidewalls of each first mask. The first etch target layer is etched using the first and third masks as an etching mask to form first and second patterns in the first and second regions, respectively. Each first pattern has a first width, and each second pattern has a second width greater than the first width.
    Type: Application
    Filed: December 21, 2015
    Publication date: July 28, 2016
    Inventors: Bok-Young LEE, Yoo-Jung LEE, Dong-Hoon KHANG, Do-Hyoung KIM, Cheol KIM, In-Hee LEE, Ji-Eun HAN
  • Publication number: 20160218011
    Abstract: This disclosure relates to a plasma processing system and methods for high precision etching of microelectronic substrates. The system may include a plasma chamber that may generate plasma to remove monolayer(s) of the substrate. The plasma process may include a two-step process that uses a first plasma to form a thin adsorption layer on the surface of the microelectronic substrate. The adsorbed layer may be removed when the system transitions to a second plasma or moves the substrate to a different location within the first plasma that has a higher ion energy. In one specific embodiment, the transition between the first and second plasma may be enabled by changing the position of the substrate relative to the source electrode with no or relatively small changes in plasma process conditions.
    Type: Application
    Filed: January 26, 2016
    Publication date: July 28, 2016
    Inventors: Jianping Zhao, Merritt Funk
  • Publication number: 20160218012
    Abstract: A fine pattern-forming method includes: a core pattern-forming step of forming a core pattern of a predetermined line width at a substrate surface side; a sidewall-forming step of forming a sidewall on the core pattern formed in the core pattern-forming step; and a core pattern removing step of removing the core pattern in a state where the sidewall is left, by using an etching gas after the sidewall-forming step, and is configured such that, in the core pattern removing step, a film deposited at a substrate back side in the core pattern-forming step is removed in parallel to the removal of the core pattern.
    Type: Application
    Filed: September 29, 2014
    Publication date: July 28, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi SHIMAMOTO, Toshiyuki KIKUCHI, Jiro YUGAMI, Yoshiro HIROSE, Yuichi WADA, Kenji KANAYAMA, Hiroshi ASHIHARA, Kenji KAMEDA
  • Publication number: 20160218013
    Abstract: A pattern forming method which uses a resist underlayer film having resistance to a basic aqueous hydrogen peroxide solution. A pattern forming method including: a first step of applying a resist underlayer film-forming composition containing a solvent and a polymer having a weight average molecular weight of 1,000 to 100,000 and an epoxy group on a semiconductor substrate that may have an inorganic film on the surface, followed by baking, to form a resist underlayer film; a second step of forming a resist pattern on the resist underlayer film; a third step of dry etching the resist underlayer film using the resist pattern as a mask to expose a surface of the inorganic film or the semiconductor substrate; and a forth step of wet etching the inorganic film or the semiconductor substrate using the dry-etched resist underlayer film as a mask and a basic aqueous hydrogen peroxide solution.
    Type: Application
    Filed: August 27, 2014
    Publication date: July 28, 2016
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Tomoya OHASHI, Shigeo KIMURA, Yuki USUI, Hiroto OGATA
  • Publication number: 20160218014
    Abstract: A semiconductor device includes a semiconductor substrate. A gate insulation film is formed on the semiconductor substrate. A gate electrode is formed on the gate insulation film. A side surface of the upper portion of the gate electrode is inclined downwardly from an upper surface of the gate electrode to a side surface of the lower portion of the gate electrode. A side surface of the lower portion of the gate electrode extends in a direction substantially perpendicular to a surface of the semiconductor substrate.
    Type: Application
    Filed: August 31, 2015
    Publication date: July 28, 2016
    Inventor: Masahiko KUBO
  • Publication number: 20160218015
    Abstract: Disclosed is a dry etching method for a laminated film in which at least one silicon layer and at least one silicon oxide layer are laminated together. The dry etching method includes generating a plasma gas from a dry etching agent and etching the laminated film with the plasma gas under the application of a bias voltage. The dry etching agent contains an unsaturated hydrofluorocarbon represented by the following formula: C3HxFy where x is an integer of 1 to 5; y is an integer of 1 to 5; and x and y satisfy a relationship of x+y=4 or 6, and iodine heptafluoride. The volume of the iodine heptafluoride in the dry etching agent is 0.1 to 1.0 times the volume of the unsaturated hydrofluorocarbon in the dry etching agent.
    Type: Application
    Filed: January 21, 2016
    Publication date: July 28, 2016
    Inventors: Hiroyuki OOMORI, Akiou KIKUCHI
  • Publication number: 20160218016
    Abstract: A method includes exposing and developing a negative photo resist, and performing a treatment on the negative photo resist using an electron beam. After the treatment, a layer underlying the photo resist is etched using the negative photo resist as an etching mask.
    Type: Application
    Filed: April 4, 2016
    Publication date: July 28, 2016
    Inventors: Wen-Kuo Hsieh, Tsung-Hung Chu, Ming-Chung Liang
  • Publication number: 20160218017
    Abstract: A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.
    Type: Application
    Filed: October 26, 2015
    Publication date: July 28, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei NISHIGUCHI
  • Publication number: 20160218018
    Abstract: Methods of selectively etching tungsten from the surface of a patterned substrate are described. The methods electrically separate vertically arranged tungsten slabs from one another as needed. The vertically arranged tungsten slabs may form the walls of a trench during manufacture of a vertical flash memory cell. The tungsten etch may selectively remove tungsten relative to films such as silicon, polysilicon, silicon oxide, aluminum oxide, titanium nitride and silicon nitride. The methods include exposing electrically-shorted tungsten slabs to remotely-excited fluorine formed in a remote plasma region. Process parameters are provided which result in uniform tungsten recess within the trench. A low electron temperature is maintained in the substrate processing region to achieve high etch selectivity and uniform removal throughout the trench.
    Type: Application
    Filed: January 28, 2015
    Publication date: July 28, 2016
    Applicant: Applied Materials, Inc.
    Inventors: Jie Liu, Vinod R. Purayath, Xikun Wang, Anchuan Wang, Nitin K. Ingle
  • Publication number: 20160218019
    Abstract: A package carrier includes: (1) a dielectric layer; (2) a first electrically conductive pattern, embedded in the dielectric layer and disposed adjacent to a first surface of the dielectric layer, and including a plurality of first pads; (3) a plurality of first electrically conductive posts, extending through the dielectric layer, wherein each of the first electrically conductive posts includes a first electrically conductive post segment connected to at least one of the first pads and a second electrically conductive post segment connected to the first electrically conductive post segment, and a lateral extent of the first electrically conductive post segment is different from a lateral extent of the second electrically conductive post segment; and (4) a second electrically conductive pattern, disposed adjacent to a second surface of the dielectric layer, and including a plurality of second pads connected to respective ones of the second electrically conductive post segments.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuan-Chang SU, Shih-Fu HUANG, Chia-Cheng CHEN
  • Publication number: 20160218020
    Abstract: A method of manufacturing a fan out wafer level package comprises: preparing conductive projections on an upper surface of a chip; mounting the chip on a carrier with the upper surface of the chip facing upwards; plastic packaging the chip to form a plastic packaging body with tops of the conductive projections being disposed outside the plastic package body; and implementing a redistribution line processing on the plastic package body. With this method, chips can be made small and thin and the manufacturing processes can be simplified.
    Type: Application
    Filed: October 29, 2015
    Publication date: July 28, 2016
    Inventors: Hongjie WANG, Yibo LIU, Feng CHEN, Dongkai SHANGGUAN, Peng SUN
  • Publication number: 20160218021
    Abstract: The present disclosure relates to a semiconductor package and method of manufacturing the same. The semiconductor package includes a first die, a plurality of conductive pads, a package body and a plurality of first traces. The plurality of conductive pads electrically connect to the first die, and each of the plurality of conductive pads has a lower surface. The package body encapsulates the first die and the plurality of conductive pads and exposes the lower surface of each of the plurality of conductive pads from a lower surface of the package body. The plurality of first traces are disposed on the lower surface of the package body and are connected to the lower surface of each of the plurality of conductive pads. A thickness of each of the plurality of first traces is less than 100 ?m.
    Type: Application
    Filed: January 27, 2015
    Publication date: July 28, 2016
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Bernd Karl APPELT, Kay Stefan ESSIG, William T. CHEN, Yuan-Chang SU
  • Publication number: 20160218022
    Abstract: Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a housing having a space for treating a substrate in the interior thereof, a spin head which supports and rotates the substrate inside the housing, and an ejection unit having a first nozzle member for ejecting a first treatment liquid onto the substrate positioned on the spin head. The first nozzle member includes a body having an ejection passage, through which the first treatment liquid flows, therein and a first discharge hole communicated with the ejection passage to eject the first treatment liquid onto the substrate, and a vibrator installed in the body to provide vibration for the first treatment liquid flowing through the ejection passage. The vibrator has an interference preventing recess for preventing an interference by reflective waves therein.
    Type: Application
    Filed: January 26, 2016
    Publication date: July 28, 2016
    Inventors: Yoon Jong JU, Kihoon CHOI, Hyeon Jun LEE
  • Publication number: 20160218023
    Abstract: A cutting blade for cutting a workpiece is disclosed. The cutting blade includes a base and a cutting edge fixed to a peripheral portion of the base. The cutting edge is formed by bonding a mixture of abrasive grains and photocatalyst particles with a binder. In cutting the workpiece by using the cutting blade, a cutting water is supplied to the cutting blade and light is applied to the cutting blade to excite the photocatalyst particles. The cutting water supplied to the cutting blade comes into contact with the photocatalyst particles excited, so that the cutting water is given an oxidizing power due to hydroxy radicals.
    Type: Application
    Filed: January 22, 2016
    Publication date: July 28, 2016
    Inventor: Kenji Takenouchi
  • Publication number: 20160218024
    Abstract: A bearing (12) being a recessed section that receives a spindle (20) is provided in a lower surface (10B) of a susceptor (10). The bearing (12) has a tapers from the lower surface (10B) towards an upper surface (10A). A gap (12B) is provided in an side wall (12A) of the bearing (12), further on the outside of the bearing (12) than a fitting surface (12X) between the bearing (12) and the spindle (20) in the horizontal direction. As a result, reduction in the fitting force between the susceptor bearing and the spindle can be suppressed and susceptor temperature reduction in the vicinity of the bearing can also be suppressed.
    Type: Application
    Filed: August 13, 2014
    Publication date: July 28, 2016
    Applicant: BRIDGESTONE CORPORATION
    Inventor: Fumiya KOBAYASHI
  • Publication number: 20160218025
    Abstract: In accordance with certain embodiments, an apparatus for bonding electronic components such as light-emitting elements each to a connection point on a substrate via an adhesive includes a platform for supporting the substrate, a membrane for covering the electronic components, a source of pressure for urging the membrane against the electronic components, whereby pressure is applied between each electronic component and its corresponding connection point, and a source of energy for at least partially curing the adhesive.
    Type: Application
    Filed: January 26, 2016
    Publication date: July 28, 2016
    Inventors: Michael A. TISCHLER, Alborz AMINI
  • Publication number: 20160218026
    Abstract: A semiconductor manufacturing apparatus capable of stable operation includes a processing chamber where a wafer is treated, a vacuum pump that is coupled with the processing chamber and evacuates the processing chamber, a monitor that measures the drive state of the vacuum pump, and an exhaust assisting device that is arranged on the exhaust side of the vacuum pump, in which the monitor measures the drive state of the vacuum pump in a state the vacuum pump and the exhaust assisting device are driven.
    Type: Application
    Filed: December 17, 2015
    Publication date: July 28, 2016
    Inventor: Kaichiro KOBAYASHI