Patents Issued in January 3, 2017
  • Patent number: 9536621
    Abstract: A nonvolatile memory includes a memory area including plural first magnetoresistive elements each serving as a memory element, each first magnetoresistive element including a first storage layer and a first reference layer, with a first insulating film therebetween. A fuse circuit storing correction information of the memory area when a defect exists in the memory area, includes plural second magnetoresistive elements and plural fuse elements, the second magnetoresistive elements each serving as an anti-fuse element. Each second magnetoresistive element includes a second storage layer and a second reference layer, with a second insulating film therebetween. The fuse elements each store at least part of the correction information. A redundancy area includes plural third magnetoresistive elements each serving as a redundancy element, each third magnetoresistive element including a third storage layer and a third reference layer, with a third insulating film therebetween.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: January 3, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Ryousuke Takizawa
  • Patent number: 9536622
    Abstract: For programming an antifuse memory, the power consumption of the memory is assessed during programming mode. The power consumption is compared with a threshold. When the threshold is exceeded, indicative of successful programming of the antifuse memory cell, the programming mode is terminated.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: January 3, 2017
    Assignee: STMICROELECTRONICS SA
    Inventors: Stephane Lacouture, Joel Damiens
  • Patent number: 9536623
    Abstract: The present invention discloses a gate drive circuit and a shift register. The gate drive circuit comprises a plurality of shift register circuits which are cascade connected, and each of the shift register circuits comprises a clock control transmission circuit and a NOR gate latch circuit, wherein the clock control transmission circuit is triggered by a first clock pulse of a clock signal to transmit a gate drive pulse of a former stage to the NOR gate latch circuit, and the NOR gate latch circuit performs latch, and the NOR gate latch circuit is further triggered by a second clock pulse following the first clock pulse to output the gate drive pulse. With the aforesaid arrangement, the gate drive circuit of the present invention is applicable to CMOS process, and the power consumption is low and the noise margin is wide.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: January 3, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Sikun Hao
  • Patent number: 9536624
    Abstract: A data transfer circuit has a first data transmission unit and two or more second shift registers. The first data transmission unit has a first shift register which has a plurality of first flip flop circuits which store data, shifts the data of the plurality of first flip flop circuits, and transmits data of two or more output terminals out of output terminals of the plurality of first flip flop circuits to the two or more second shift registers. The two or more second shift registers each shift data inputted from the two or more output terminals out of the output terminals of the plurality of first flip flop circuits.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Tatsuru Matsuo
  • Patent number: 9536625
    Abstract: User data or constantly toggling functional critical path timing sensors measure delays in actual critical paths that include a RAM. Variable resistors or variable capacitors are added to RAM bit lines for redundant cells to delay bit-line sensing by sense amplifiers. The sense amplifiers' delayed data is compared to non-delayed data from normal selected RAM cells to detect timing failures. Variable resistors or capacitors may also be added between the write drivers and bit lines to delay writing data into the redundant cells. A margin delay adjustment controller sweeps margin delays for constantly toggling paths until failures. A margin delay is then adjusted and added to functional critical paths that carry user data. Functional critical path timing sensors test setup time with the added margin delay. Timing failures cause VDD to increase, while a controller reduces VDD when no failures occur. Actual delays through the RAM adjust VDD.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 3, 2017
    Assignee: Qualcomm Incorporated
    Inventors: Bradley Quinton, Trent McClements, Andrew Hughes, Sanjiv Taneja
  • Patent number: 9536626
    Abstract: A memory subsystem empirically tests performance parameters of I/O with a memory device. Based on the empirical testing, the memory subsystem can set the performance parameters specific to the system in which the memory subsystem is included. A test system performs the testing. For each of multiple different settings for multiple different I/O circuit parameters, the test system sets a value for each I/O circuit parameter, generates test traffic to stress test the memory device with the parameter value(s), and measures an operating margin for the I/O performance characteristic. The test system further executes a search function to determine values for each I/O circuit parameter at which the operating margin meets a minimum threshold and performance of at least one of the I/O circuit parameters is increased. The memory subsystem sets runtime values for the I/O circuit parameters based on the search function.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Theodore Z. Schoenborn, Christopher P. Mozak
  • Patent number: 9536627
    Abstract: The semiconductor device includes a bit line, a transistor, a retention node, and a capacitor. The transistor has a function of charging or discharging the retention node. The capacitor has a function of retaining a potential of the retention node. A voltage greater than the sum of a writing voltage and a threshold voltage is applied to a gate of the transistor. When the transistor is turned on, a first potential is supplied to the bit line with a reference potential in a floating state. A voltage less than the sum of the writing voltage and the threshold voltage is applied to the gate of the transistor. When the transistor is turned on, a second potential is supplied to the bit line with a reference potential in a floating state. With use of the first and second potentials, the threshold voltage of the transistor is calculated without being influenced by parasitic capacitance and variations in the storage capacitance of the capacitor.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: January 3, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoaki Atsumi, Shuhei Nagatsuka, Kazuaki Ohshima
  • Patent number: 9536628
    Abstract: A nuclear fuel assembly grid having a torpedo-shaped mixing vane assembly supported at each intersection of the grid straps that surrounds a fuel rod support location. The torpedo-shaped stem supports mixing vanes that extend over each of the fuel rod support locations.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: January 3, 2017
    Assignee: Westinghouse Electric Company LLC
    Inventors: Jin Yan, Peng Yuan, Zeses E. Karoutas, Levie D. Smith, III
  • Patent number: 9536629
    Abstract: Apparatus for passively generating electric power during a nuclear power station blackout by utilizing the temperature difference between the hot inlet of a residual heat removal circuit and the surrounding containment environment. A heat engine, such as a thermoelectric generator, a Stirling Cycle Engine or Rankine Cycle Engine, is coupled in heat exchange relationship with an uninsulated portion of the inlet to a passive residual heat removal heat exchanger and/or passive residual heat removal heat exchanger channel head to generate the power required to operate essential equipment needed to maintain the nuclear power station in a safe condition during a loss of normal onsite and offsite power.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: January 3, 2017
    Assignee: Westinghouse Electric Company LLC
    Inventors: Jeffrey T. Dederer, Catherine M. Perego
  • Patent number: 9536630
    Abstract: A method for removing radioactive cesium and/or iodine from a radioactive substance in liquid and/or a solid matter using a hydrophilic resin composition comprising a hydrophilic resin and a metal ferrocyanide compound, wherein the hydrophilic resin includes at least one hydrophilic resin selected from the group consisting of a hydrophilic polyurethane resin, a hydrophilic polyurea resin, and a hydrophilic polyurethane-polyurea resin each having at least a hydrophilic segment, and a metal ferrocyanide compound is dispersed in the hydrophilic resin composition in a ratio of at least 1 to 200 mass parts relative to 100 mass parts of the hydrophilic resin.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: January 3, 2017
    Assignees: Dainichiseika Color & Chemicals Mfg. Co., Ltd., Ukima Chemicals & Color Mfg. Co., Ltd.
    Inventors: Kazuyuki Hanada, Manabu Uruno, Kazuya Kimura, Kenichi Takahashi
  • Patent number: 9536631
    Abstract: In LPP EUV systems, sinusoidal oscillations or instabilities can occur in the generated EUV energy. This is avoided by detecting when the LPP EUV system is approaching such instability and adjusting the LPP EUV system by moving the laser beam of the LPP EUV system. Detection is done by determining when the generated EUV energy is at or above a primary threshold. Adjusting the LPP EUV system by moving the laser beam is done for a fixed period of time, until a subsequently generated EUV energy is below the primary threshold, until a subsequently generated EUV energy is below the primary threshold for a fixed period of time, or until a subsequently generated EUV energy is at or below a secondary threshold below the primary threshold.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: January 3, 2017
    Assignee: ASML Netherlands B.V.
    Inventor: Daniel Jason Riggs
  • Patent number: 9536632
    Abstract: A solar cell can include a substrate and a semiconductor region disposed in or above the substrate. The solar cell can also include a conductive contact disposed on the semiconductor region with the conductive contact including deformed conductive particles.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: January 3, 2017
    Assignee: SunPower Corporation
    Inventor: Richard Hamilton Sewell
  • Patent number: 9536633
    Abstract: A metallic composite in which a conjugated compound having a molecular weight of 200 or more is adsorbed to a metallic nanostructure having an aspect ratio of 1.5 or more, for example, a metallic composite in which a compound having a group represented by the formula (I) or a repeating unit represented by the formula (II) or both of them is adsorbed to a metallic nanostructure having an aspect ratio of 1.5 or more, is useful for electronic devices such as a light-emitting device, a solar cell and an organic transistor.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: January 3, 2017
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hideyuki Higashimura, Takayuki Iijima, Masahiro Fujioka, Kenta Tanaka
  • Patent number: 9536634
    Abstract: The present invention relates to an insulating wire and, more particularly, to an insulating wire having partial discharge resistance that exhibits excellent partial discharge resistance and high partial discharge inception voltage and also excellences in the adhesion between the conductor and the insulation layer and the flexibility of the insulation layer, which insulating wire can be prepared by a simple process at a low production cost.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: January 3, 2017
    Assignee: LS CABLE & SYSTEM LTD.
    Inventors: Hyung-Sam Choi, Joon-Hee Lee, Bo-Kyung Kim, Dong-Jin Seo, Jae-Geon Lee
  • Patent number: 9536635
    Abstract: An electric wire includes a metal conductor, a first insulation layer, wherein the first layer is a non-ceramifiable silicone compound, and a second insulation layer, wherein the second layer is a ceramifiable silicone compound, wherein the second layer is on the outside of the first layer.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: January 3, 2017
    Assignee: Wire Holdings LLC
    Inventor: Daniel Polasky
  • Patent number: 9536636
    Abstract: An insulated wire including a laminated resin-coated insulated wire containing: a thermosetting resin layer (A) directly or via an insulating layer (D) on a conductor having a rectangular cross-section; and at least a thermoplastic resin layer (B) on the outer periphery of the thermosetting resin layer (A), in which the cross-sectional shape of the thermosetting resin layer (A) composed of two pairs of two sides facing each other, and has at least four convex portions each of which has a film thickness in maximum, at least one convex portion of the at least four convex portions is on each of the four sides, or at least two convex portions of the at least four convex portions are at least on each of the two sides facing each other, and in the each side having the convex portion, provided that a minimum film thickness is designated as “a” pm, and an average of maximum film thicknesses of the convex portions is designated as “b” pm, the a/b ratio is 0.60 or more and 0.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: January 3, 2017
    Assignees: FURUKAWA ELECTRIC CO., LTD., FURUKAWA MAGNET WIRE CO., LTD.
    Inventors: Keisuke Ikeda, Makoto Oya, Hideo Fukuda, Keiichi Tomizawa
  • Patent number: 9536637
    Abstract: A multilayered heat-recoverable article 1 includes a base material layer 10 and an adhesive layer 11 disposed on the inner side of the base material layer 10. The adhesive layer 11 includes [A] a thermoplastic resin having a melt flow rate of 15 g/10 min to 1,000 g/10 min at 190° C. and a load of 2.16 kg, [B] an organically treated layered silicate, and [C] a deterioration inhibitor. The shear viscosity at 150° C. of the adhesive layer 11 is 300 Pa·s or more at a shear rate of 0.1 s?1 and 200 Pa·s or less at a shear rate of 100s?1.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: January 3, 2017
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC FINE POLYMER, INC.
    Inventors: Satoshi Yamasaki, Shinya Nishikawa, Ryouhei Fujita, Yasutaka Emoto
  • Patent number: 9536638
    Abstract: The present invention discloses a halogen-free insulated cable material used for 125° C. irradiation cross-linked EPCV photovoltaics and a preparation method thereof. The material is mainly prepared from the following raw materials based on weight parts: 5-20 parts of ethylene propylene diene monomer; 0-25 parts of polyethylene; 0-10 parts of ethylene-vinyl acetate copolymer; 1-5 parts of compatibilizer; 50-75 parts of aluminum hydroxide; 1-5 parts of stabilizer; 1-5 parts of silicone masterbatch. The halogen-free insulated cable material of the present invention has excellent insulating property and flame retardancy, and can achieve the halogen-free flame retardant VW-1, and releases a very low amount of smoke when burning, making a light transmittance of greater than 90% in the smoke, and also has excellent mechanical properties and electrical properties, and can suffer capacitance change rate test at 90° C.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: January 3, 2017
    Assignee: Jiangsu Dasheng Polymer Co., Ltd.
    Inventors: Chaohua Luo, Weiwei Fan, Weiwei Fan
  • Patent number: 9536639
    Abstract: A wire harness is provided in which, by merely overlap wrapping a binding tape member around a group of lead wires, intruding water can be guided to the outside. The wire harness includes a group of lead wires and a binding tape-type protection portion that covers the group of lead wires. The binding tape-type protection portion is formed by overlap wrapping a binding tape member around the group of lead wires, the binding tape member having a tape member body made of a synthetic resin and an adhesive layer formed on one surface of the tape member body. The tape member body has a plurality of water drain holes that are provided so as to penetrate the wall of the tape member body in the width direction, and that are provided in the lengthwise direction.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: January 3, 2017
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Morichika Yamamoto, Masataka Wakabayashi
  • Patent number: 9536640
    Abstract: A furcation tube for optical fibers has a polymer inner jacket surrounded by a fiber and strength member layer of fibers and strength rods, which is surrounded by a polymer outer jacket. The inner jacket may surround a plurality of inner tubes. The strength members may be arrayed around the inner jacket generally equidistant from one another. The strength members may be resin pultruded fiber rods and the fiber may be para-aramid fibers.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 3, 2017
    Assignee: CommScope Technologies LLC
    Inventor: Nahid Islam
  • Patent number: 9536641
    Abstract: A method of manufacturing an automobile high voltage wire harness includes setting a shrinkable tube which has a color to make the wire harness recognized as a high voltage one outside a metal pipe body which is an exterior member of one or a plurality of high voltage electrical pathway(s) wired in an automobile, making the shrinkable tube shrink to cover part of or all of the outer surface of the metal pipe body, and bending the metal pipe body to a predetermined position to be formed into a three-dimensional shape.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: January 3, 2017
    Assignee: YAZAKI CORPORATION
    Inventors: Eiichi Toyama, Takashi Kato
  • Patent number: 9536642
    Abstract: A high-temperature insulation assembly for use in high-temperature electrical machines and a method for forming a high-temperature insulation assembly for insulating conducting material in a high-temperature electrical machine. The assembly includes a polymeric film and at least one ceramic coating disposed on the polymeric film. The polymeric film is disposed over conductive wiring or used as a conductor winding insulator for phase separation and slot liner.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: January 3, 2017
    Assignee: General Electric Company
    Inventors: Weijun Yin, Min Yan, Ri-An Zhao
  • Patent number: 9536643
    Abstract: A method for manufacturing a multilayer electronic component includes the steps of preparing a laminate including a plurality of laminated insulating layers and a plurality of internal electrodes disposed along interfaces between the insulating layers, edges of the internal electrodes being exposed at a predetermined surface of the laminate, and forming an external electrode on the predetermined surface to electrically connect exposed the edges of the internal electrodes. The step of forming an external electrode includes a plating step of forming a continuous plating film by depositing plating deposits on the edges of the internal electrodes exposed at the predetermined surface and by performing plating growth to be connected to each other, and a heat treatment step of performing a heat treatment at an oxygen partial pressure of about 5 ppm or less and at a temperature of about 600° C. or more.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: January 3, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Motoki, Makoto Ogawa, Kenichi Kawasaki, Shunsuke Takeuchi, Shigeyuki Kuroda
  • Patent number: 9536644
    Abstract: A composite resistor includes a thin film resistor element having a first temperature coefficient of resistance and a metal resistor element having a second temperature coefficient of resistance. A portion of the metal resistor element overlaps a portion of the thin film resistor element such that the portion of the metal resistor element is in thermal communication with the portion of the thin film resistor element to compensate for a resistance drift arising during operation of the composite resistor.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: January 3, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventor: Ronald R. Gobbi
  • Patent number: 9536645
    Abstract: A ferrite composition comprises a main component and a sub component. The main component is comprised of 40.0 to 49.8 mol % iron oxide in terms of Fe2O3, 5.0 to 14.0 mol % copper oxide in terms of CuO, 0 to 32.0 mol % zinc oxide in terms of ZnO, and a remaining part of nickel oxide. The sub component includes 0.5 to 4.0 wt % tin oxide in terms of SnO2, 0.10 to 1.00 wt % bismuth oxide in terms of Bi2O3, and 0.21 to 3.00 wt % cobalt oxide in terms of Co3O4, with respect to the main component.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: January 3, 2017
    Assignee: TDK CORPORATION
    Inventors: Ryuichi Wada, Kouichi Kakuda, Yukari Akita, Yukio Takahashi, Yusuke Nagai, Takashi Suzuki, Takahiro Sato
  • Patent number: 9536646
    Abstract: A sintered ferrite magnet comprising metal elements of Ca, La, Fe and Co, whose atomic ratios are represented by the general formula of Ca1-xLaxFe2n-yCoy, wherein x and y, and n representing a molar ratio meet 0.3?x?0.6, 0.25?y?0.5, and 3?n?6, and further comprising 0.2% to 0.35% by mass of SiO2.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: January 3, 2017
    Assignee: HITACHI METALS, LTD.
    Inventors: Yoshinori Kobayashi, Tsunehiro Kawata
  • Patent number: 9536647
    Abstract: There is provided a multi-layered chip electronic component including: a multi-layered body formed by stacking a plurality of magnetic layers; and conductive patterns disposed between the plurality of magnetic layers and electrically connected in a lamination direction to form coil patterns, wherein in a case in which a single coil pattern in the coil pattern is projected in the length and width directions of the multi-layered body, when an area of the magnetic layer inside of the coil pattern is defined as Ai and an area of the magnetic layer outside of the coil pattern is defined as Ao, 0.40?Ai:Ao?1.03 is satisfied.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: January 3, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Woo Hahn, So Yeon Song, Sung Yong An, Byeong Cheol Moon, Soo Hwan Son
  • Patent number: 9536648
    Abstract: A drum core for a wire-wound component having a pair of flange parts provided on both ends of an axis core around which a winding wire is wound, with tapered surfaces of roughly conical shape formed on their facing inner surfaces in such a way that the interval of the inner surfaces increases toward the outer sides of the flange parts. The flange parts have roughly a rectangular shape and the sides along which their long side faces contact the tapered surfaces have the curved shapes that convex roughly at the center. The curved shapes make the height of the corners of the flange parts from the reference surface lower than the height of the convex parts of the curved shapes from the reference surface, and the loads received by the wire during winding are reduced as a result.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: January 3, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Takashi Yamaguchi, Takanori Yoshizawa
  • Patent number: 9536649
    Abstract: In order to prevent quenching caused accidentally in a superconducting magnet, an MRI apparatus vibrates the superconducting magnet in order to prevent quenching of the superconducting magnet in a time period for which a predetermined imaging sequence is not executed (step 210). As a specific method, a gradient magnetic field may be generated by a gradient magnetic field coil for an imaging sequence of the MRI apparatus, or a gradient magnetic field may be generated using a gradient magnetic field coil for vibration provided apart from the gradient magnetic field coil for an imaging sequence. In addition, in a period for which the predetermined imaging sequence is not executed, a phantom may be imaged to prevent the quenching of the superconducting magnet.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: January 3, 2017
    Assignee: HITACHI, LTD.
    Inventor: Munetaka Tsuda
  • Patent number: 9536650
    Abstract: Magnetic structure production may relate, by way of example but not limitation, to methods, systems, etc. for producing magnetic structures by printing magnetic pixels (aka maxels) into a magnetizable material. Disclosed herein is production of magnetic structures having, for example: maxels of varying shapes, maxels with different positioning, individual maxels with different properties, maxel patterns having different magnetic field characteristics, combinations thereof, and so forth. In certain example implementations disclosed herein, a second maxel may be printed such that it partially overwrites a first maxel to produce a magnetic structure having overlapping maxels. In certain example implementations disclosed herein, a magnetic printer may include a print head comprising multiple parts and having various properties. In certain example implementations disclosed herein, various techniques for using a magnetic printer may be employed to produce different magnetic structures.
    Type: Grant
    Filed: August 16, 2014
    Date of Patent: January 3, 2017
    Assignee: CORRELATED MAGNETICS RESEARCH, LLC.
    Inventor: Larry W. Fullerton
  • Patent number: 9536651
    Abstract: A coil component includes a first coil part including a multilayer substrate on which a conductor pattern is formed, a second coil part formed as a wire and stacked together with the first coil part, a core coupled to the first and second coil parts while penetrating through the first and second coil parts to thereby be electromagnetically coupled to the first and second coil parts, and a pressing member interposed between the core and the second coil part to allow the first and second coil parts to closely adhere to each other.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: January 3, 2017
    Assignee: Solum Co., Ltd.
    Inventors: Xin Lan Li, Jae Gen Eom, Geun Young Park, Se Hoon Jang, Heung Gyoon Choi
  • Patent number: 9536652
    Abstract: The present invention relates to an inductor, wherein the inductor according to the present invention includes: a body, a winding wire winded around the body, and a housing used for covering the body, according to the present invention, the inductor reduces the volume and increases the withstanding voltage of inductor by twisting the wires, and the present invention also provide a production method of the inductor can simplify the production process of inductors.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: January 3, 2017
    Assignee: U. D. ELECTRONIC CORP.
    Inventors: Ming-Tzu Chen, Yu-Chin Hsu
  • Patent number: 9536653
    Abstract: A coil component includes an air-core winding wire portion wound by a wire with a plurality of wound layers by alignment winding, a spiral shaped wound portion in which the wire wound in a spiral shape from an inner edge of an end surface toward an outer edge thereof along the end surface while in contact with the end surface on one side in the axis direction of the winding wire portion, a first lead portion extended and extracted outward from a winding first end point of the spiral shaped wound portion, and a second lead portion extended and extracted outward from a winding second end point at the outer circumference of the winding wire portion.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: January 3, 2017
    Assignee: Sumida Corporation
    Inventors: Satoru Yamada, Yoshiyuki Hatayama
  • Patent number: 9536654
    Abstract: A power receiving device includes: a power receiving unit receiving electric power from an external power transmitting unit contactlessly; a first coil; a first shielding wall surrounding the first coil; a first device; a first shielding casing having the first device accommodated therein, the first shielding casing being also disposed inside the first shielding wall; and a first wiring connected to the first device and extending from inside the first shielding casing to outside the first shielding casing, and also pulled outside the first shielding wall, the first shielding casing having an external surface including a first opposite portion closer to the first shielding wall than the first coil, the first shielding wall having a first region opposite to the first opposite portion, the first region having a first hole, the first wiring being pulled outside the first shielding wall through the first hole.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: January 3, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Koji Nakamura, Shinji Ichikawa, Toru Nakamura
  • Patent number: 9536655
    Abstract: A power supply device generates power having a prescribed frequency. A primary self-resonant coil transmits the power in a contactless manner to a secondary self-resonant coil by resonating with the secondary self-resonant coil through an electromagnetic field. A power sensor detects reflected power to the power supply device. A communication device receives a power receiving state of a vehicle. An ECU estimates a positional mismatch amount of the secondary self-resonant coil relative to the primary self-resonant coil based on the power receiving state of the vehicle and the reflected power, by using relation obtained in advance between the power receiving state and the reflected power, and the positional mismatch amount.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 3, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Shinji Ichikawa
  • Patent number: 9536656
    Abstract: Example embodiments of the systems and methods of reduction of parasitic losses in a wireless power system disclosed herein provide a practical means of accurately estimating parasitic losses in a wireless power transfer system irrespective of coupling. Such systems and methods may be used to generate an equation which predicts parasitic losses in a wireless power system. In an offset case, in which the transmitter and receiver are not directly coupled, losses associated with the recirculating current in the primary LC tank dominate the loss, and the transmitted power may be better estimated by measuring the power inputs, power outputs, and injected losses in a controlled environment; making a mathematical fit to an equation, which from the various power measurements and injected loss, predicts the expected transmitter losses; and then, in an operational environment, using the equation to predict parasitic losses based on the power inputs, power outputs and expected loss equation.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: January 3, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Eric Gregory Oettinger, Vladimir Alexander Muratov, Ravindra Krishna Patil, Kalyan Siddabattula, William Ford Waters, III
  • Patent number: 9536657
    Abstract: A grain oriented electrical steel sheet is subjected to magnetic domain refinement by laser irradiation and has magnetic flux density B8 of at least 1.91T, wherein the nitrogen content in the forsterite coating is 3.0 mass % or less. The grain oriented electrical steel sheet satisfies recent demand for iron loss reduction.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: January 3, 2017
    Assignee: JFE Steel Corporation
    Inventors: Takeshi Omura, Hiroaki Toda, Hiroi Yamaguchi, Seiji Okabe
  • Patent number: 9536658
    Abstract: A grain oriented electrical steel sheet that is subjected to magnetic domain refining treatment by electron beam irradiation and exhibits excellent low-noise properties when assembled as an actual transformer in which tension exerted on the steel sheet by the forsterite film is 2.0 MPa or higher both in a rolling direction and a direction transverse (perpendicular) to the rolling direction, and a ratio of an irradiation pitch in a thermal strain introduced region (B) to a spot diameter (A) on an electron beam irradiation surface satisfies 0.5?B/A?5.0.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: January 3, 2017
    Assignee: JFE Steel Corporation
    Inventors: Takeshi Omura, Hiroi Yamaguchi, Seiji Okabe
  • Patent number: 9536659
    Abstract: A magnet assembly has a number of axially-aligned coils, the radial mid-point of each coil being axially-aligned with a portion of a radial extent of an adjacent coil in the assembly. Compression blocks are provided between adjacent coils at circumferential intervals, to retain the coils in fixed relative positions.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: January 3, 2017
    Assignee: Siemens PLC
    Inventors: Simon James Calvert, Russell Peter Gore
  • Patent number: 9536660
    Abstract: A chip electronic component may include: a magnetic body; and internal coil parts buried in the magnetic body. The magnetic body includes: a core layer including the internal coil parts; and upper and lower cover layers disposed on upper and lower portions of the core layer, respectively, the core layer having a level of magnetic permeability different from that of at least one of the upper and lower cover layers.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: January 3, 2017
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTOR CORPORATION
    Inventors: Moon Soo Park, Tae Young Kim, Dong Hwan Lee
  • Patent number: 9536661
    Abstract: A method of producing a transformer module by placing at least one transformer which includes a core, a primary winding, and a secondary winding at a bottom surface of a case at which a plurality of external terminals are provided. The method comprising placing two support columns on the bottom surface, placing the bottom surfaces of cores near the lead-out points of the leads of the windings at the two sides of the cores on core support parts of the two support columns to support them, stringing leads at the two sides of the cores to the external terminals and electrically joining them, removing the two support columns so that the bottom surfaces of the cores are placed on the bottom surface of the case, then fastening the cores to the bottom surface of the case to produce a transformer module where the leads from the cores are given excess length.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Masayuki Itoh, Hiroshi Kurosawa
  • Patent number: 9536662
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including a plurality of dielectric layers and a plurality of first and second internal electrodes stacked in a width direction; a pair of first external electrodes disposed on a mounting surface of the ceramic body to be spaced apart from one another and connected to the plurality of first internal electrodes; a second external electrode disposed between the pair of first external electrodes on the mounting surface of the ceramic body and connected to the plurality of second internal electrodes; and a dummy electrode disposed on a surface of the ceramic body opposing the mounting surface of the ceramic body.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: January 3, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyun Tae Kim, Kyoung Nam Hwang, Hwi Geun Im, Ho Jun Lee, Young Ghyu Ahn, Woo Jin In
  • Patent number: 9536663
    Abstract: A metallized film capacitor includes an element formed by cutting a laminate made of a pair of metallized films to a predetermined length, and the element includes metallized contact electrodes disposed on both end faces in a width direction of the element. On each dielectric film, there are formed a protection mechanism portion including a plurality of segmented electrodes that are coupled with each other via a fuse, a solid electrode connecting with the metallized contact electrode of a corresponding polarity, and a vertical pattern extending across the dielectric film in the length direction between the protection mechanism portion and the solid electrode. The position and the width of the vertical pattern are set such that the range of the vertical pattern in the width direction overlaps the vertical pattern of a metallized film which forms a pair.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: January 3, 2017
    Assignee: Kojima Industries Corporation
    Inventor: Naoya Hirota
  • Patent number: 9536664
    Abstract: In an electronic component, capacitor conductors include linear portions parallel or substantially parallel to a lower surface of a laminate, and lead-out portions led out respectively from the linear portions to the lower surface. Outer electrodes are disposed on the lower surface and cover exposed portions where the lead-out portions are exposed at the lower surface, respectively. At least one of the linear portions includes a groove, which is recessed in a direction away from the lower surface, in a region thereof overlapping with the corresponding outer electrode when looking at the electronic component in a plan view from a z-axis direction.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: January 3, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Noriyuki Inoue, Mayuko Nishihara, Makito Nakano, Masayoshi Shimizu
  • Patent number: 9536665
    Abstract: A high capacitance single layer ceramic capacitor having a ceramic dielectric body containing one or more internal electrodes electrically connected to a metallization layer applied to the side and a top or bottom surface and a metallization pad electrically isolated from the metallization side and the top or bottom surface by a castellation or a via or separated by a dielectric insulating band positioned between the electrodes around the perimeter of the ceramic body and separating the top and bottom surfaces.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: January 3, 2017
    Assignee: Knowles Capital Formation, Inc.
    Inventors: Ali Moalemi, Euan Patrick Armstrong
  • Patent number: 9536666
    Abstract: A multi-layer ceramic capacitor has a laminate of dielectric layers and internal electrode layers laminated alternately with one another, as well as cover layers formed as the outermost layers at the top and bottom of the laminate in the laminating direction, wherein the dielectric layers are constituted by a sintered compact containing a barium titanate and a silicon compound, and a fresnoite phase having an average grain size of 1 ?m or less is present in the dielectric layers.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: January 3, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Hideya Teraoka, Koichiro Morita, Youichi Mizuno
  • Patent number: 9536667
    Abstract: A multi-layer ceramic capacitor is made by alternately layering a dielectric layer constituted by a sintered body of a ceramic powder, and an internal electrode layer. The ceramic powder contains, as a main composition, barium titanate powder having a perovskite structure with a median size of 200 nm or smaller as measured by SEM observation, wherein the barium titanate powder is such that the percentage of barium titanate particle having twin defects in the barium titanate powder is less than 10% as measured by TEM observation and that its crystal lattice c/a is 1.0075 or more.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: January 3, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Youichi Mizuno
  • Patent number: 9536668
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric ceramic layers and inner electrode layers containing Ni and electrically connected to outer electrodes. The dielectric ceramic layers contain a Ba- and Ti-containing perovskite compound, Ca, Mg, R (at least one rare earth metal selected from La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y), M (at least one selected from Zr, Mn, Co, Fe, Cr, Cu, Al, V, Mo, and W), and Si. The number of parts by mole of each element relative to Ti as 100 parts is as follows: Ca, approximately 0.10 to 5.00 parts; Mg, approximately 0.0010 to 0.0098 parts; R in total, approximately 0.50 to 4.00 parts; M in total, approximately 0.10 to 2.00 parts; and Si, approximately 0.5 to 2.0 parts.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: January 3, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kohei Shimada, Katsuya Ishida
  • Patent number: 9536669
    Abstract: In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: January 3, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Syunsuke Takeuchi, Makoto Ogawa, Seiichi Nishihara, Kenichi Kawasaki, Shuji Matsumoto
  • Patent number: 9536670
    Abstract: A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: January 3, 2017
    Assignee: American Radionic Company, Inc.
    Inventor: Robert M. Stockman