Patents Issued in January 17, 2017
  • Patent number: 9548163
    Abstract: A solid electrolytic capacitor that comprises a sintered porous anode, a dielectric layer that overlies the anode body, and a solid electrolyte overlying the dielectric layer is provided. The anode is formed from a finely divided powder (e.g., nodular or angular) having a relatively high specific charge. Despite the use of such high specific charge powders, high voltages can be achieved through a combination of features relating to the formation of the anode and solid electrolyte. For example, relatively high press densities and sintering temperatures may be employed to achieve “sinter necks” between adjacent agglomerated particles that are relatively large in size, which render the dielectric layer in the vicinity of the neck less susceptible to failure at high forming voltages.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: January 17, 2017
    Assignee: AVX Corporation
    Inventors: Jan Petrzilek, Martin Biler
  • Patent number: 9548164
    Abstract: The present disclosure is to provide an organic conductor having high conductivity and heat resistance. The organic conductor in accordance with the present disclosure contains a conductive polymer, a quinone compound, and a vanadyl compound.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: January 17, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Yasuo Tanaka
  • Patent number: 9548165
    Abstract: A predoping method for lithium, which is characterized by mixing and kneading, in the presence of a solvent, lithium metal with (a) silicon and a composite dispersion of silicon and silicon dioxide, (b) particles represented by SiOx (wherein 0.5?x<1.6) and having a fine structure wherein fine silicon particles are dispersed in a silicon-based compound, and (c) an Si-based material that is a mixture of one or more oxides selected from among the lower oxides of silicon represented by the above-mentioned formula and that is capable of absorbing and desorbing lithium ions; a lithium-predoped electrode which uses the predoping method for lithium; and an electricity storage device.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: January 17, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Masanori Fujii, Hisashi Satake, Hajime Kinoshita
  • Patent number: 9548166
    Abstract: A capacitor for an implantable medical device is presented. The capacitor includes an anode, a cathode, a separator therebetween, and an electrolyte over the anode, cathode, and separator. The electrolyte includes ingredients comprising acetic acid, ammonium acetate, phosphoric acid, and tetraethylene glycol dimethyl ether. The capacitor has an operating voltage ninety percent or greater of its formation voltage.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: January 17, 2017
    Assignee: Medtronic, Inc.
    Inventors: Mark E. Viste, John D. Norton, Joachim Hossick-Schott, Anthony W. Rorvick
  • Patent number: 9548167
    Abstract: The invention relates to an aqueous fluoropolymer, and preferably polyvinylidene fluoride (PVDF), composition for manufacturing electrodes for use in non-aqueous-type electrochemical devices, such as batteries and electric double layer capacitors. The composition contains aqueous PVDF binder, and one or more powdery electrode-forming materials. In one embodiment, the composition is free of fluorinated surfactant In another embodiment, one or more fugitive adhesion promoters are added. The electrode formed from the composition of the invention exhibits interconnectivity and irreversibility that is achieved from the use of aqueous PVDF binder.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: January 17, 2017
    Assignee: Arkema Inc.
    Inventors: Ramin Amin-Sanayei, Ravi R. Gupta
  • Patent number: 9548168
    Abstract: A robot includes a power source of the robot, and a switch section adapted to block electrical power supply to the power source. The switch section is disposed on a front side of the robot arranged to face to a workbench when at work. The switch section blocks the electrical power supply to the power source in a case in which it is detected that a distance between the robot and the workbench is longer than a predetermined distance.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: January 17, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Kaoru Takeuchi, Tatsuya Matsudo
  • Patent number: 9548169
    Abstract: A contact structure of a battery relay that is capable of reducing damage to relay contacts and a battery relay apparatus including the same are disclosed. The contact structure includes a movable contact unit including at least one first embossed contact formed adjacent to a center of the movable contact unit, the first embossed contact having a predetermined height, and at least one second embossed contact formed outside the first embossed contact, the second embossed contact having a lower height than the first embossed contact, and a stationary contact unit, the first embossed contact and the second embossed contact coming into contact with the stationary contact unit when power is turned on.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: January 17, 2017
    Assignee: HYUNDAI MOTOR COMPANY
    Inventor: Jin Gi Kim
  • Patent number: 9548170
    Abstract: A guard assembly is for an electrical switching apparatus of an electrical system. The electrical system includes a number of conductors each having an insulated portion and an exposed portion that meet at a junction. The electrical switching apparatus includes a housing and a number of terminals connected to the exposed portion of a conductor. The guard assembly comprises: an interconnect member coupled to the housing; and a number of guard members each comprising: a first portion coupled to the interconnect member, and a second portion extending from the first portion away from the housing, the second portion comprising: a first distal end located at the first portion, and a second distal end opposite and distal from the first distal end. Each of the guard members has an opening. The opening receives a conductor. Each junction is located between a second distal end and a terminal.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: January 17, 2017
    Assignee: EATON CORPORATION
    Inventors: William Michael Crooks, Charles Bradley Anderson, Michael Paul Puskar, David Michael Olszewski, Javvad Qasimi
  • Patent number: 9548171
    Abstract: Disclosed is a switchboard. The switchboard includes a switchboard case with a built-in circuit breaker, a door mounted on the switchboard case in a hinge structure to be opened or closed and configured to include a door hook including an inclined surface at a front end, an external manipulation handle provided at an outer side of the switchboard case and configured to manually, externally manipulate a switch-on or off operation of the circuit breaker, and a catching member disposed in the switchboard case to be contactable with the inclined surface of the door hook. The catching member rotates by contacting the inclined surface of the door hook according to a closing operation of the door, and a locked state of the door is maintained by catching the door hook on one side corner of the catching member.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: January 17, 2017
    Assignee: LSIS CO., LTD.
    Inventor: Jun Yong Jang
  • Patent number: 9548172
    Abstract: The present invention relates to a control device having at least one front panel, at least one button panel arranged behind the front panel, and at least one switch responsive to a user's touch of a switchable area on a front side of the front panel in front of said switch. The switch includes at least one light source element arranged at a rear side of the button panel illuminating the rear side of the front panel, and at least one reflector element arranged behind the button panel and the light source element to reflect the light to the rear side of the button panel. The button panel includes at least one cut out that corresponds with the switchable area of the switch or more switchable areas of neighbored switches, so that the light can pass through the cut-out and the front panel to be out of the control device.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: January 17, 2017
    Assignee: ELECTROLUX HOME PRODUCTS CORPORATION N.V.
    Inventors: Alexander Hauck, Volkmar Bunzel, Klaus Winkelmann, Dominik Rauh
  • Patent number: 9548173
    Abstract: An electrical contactor has first and second terminals; a movable arm connected to the second terminal; and an actuator. The actuator has a magnet, first and second coils having a common connection and located either side of the magnet, a magnetic rocking armature pivotably attached between the coils and an actuation element connected to the first end of the rocking armature for actuating the movable arm. Driving the first coil causes a demagnetization of the first coil and a corresponding increase in magnetic flux in the second coil, latching the armature to the second coil and moving the movable arm in a first direction. Driving the second coil causes a demagnetization of the second coil and a corresponding increase in magnetic flux in the first coil, latching the rocking armature to the first coil and moving the movable arm in a second direction.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: January 17, 2017
    Assignee: JOHNSON ELECTRIC S.A.
    Inventor: Richard Anthony Connell
  • Patent number: 9548174
    Abstract: A switch assembly adapted and a method for switching power to a circuit having a power source. The switch assembly includes current carrying contacts and a coupling member. The coupling member has conductive pads for engaging the current carrying contacts and a contact bridge extending between the conductive pads. An actuator assembly moves the coupling member between a closed position in which the conductive pads of the coupling member engage the current carrying contacts and an open position in which the conductive pads of the coupling member are disengaged from the current carrying contacts. Opposing electromagnetic forces are generated between the contact bridge and the conductive pads to resist electromagnetic repulsion forces generated between the current carrying contacts and the conductive pads as the actuator assembly approaches or is in the closed position.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 17, 2017
    Assignee: TYCO ELECTRONICS CORPORATION
    Inventors: Herve Gabriel Gaudefroy, Marcus Priest, Tien Duc Ngo
  • Patent number: 9548175
    Abstract: A switching-device tripping apparatus for a switching device includes contact pieces that can be moved relative to one another. Relative motion between the contact pieces is generated by a gear or transmission configuration. The gear or transmission configuration has a pawl in order to control motion of the contact pieces relative to each other. First and second tripping devices are provided, which work or operate the same pawl and drive the same pawl.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: January 17, 2017
    Assignee: Siemens Aktiengesellschaft
    Inventors: Oliver Duwe, Thomas Hilker
  • Patent number: 9548176
    Abstract: A fuse terminal includes a central body portion. A first arm extends from the central body portion and defines an arm space that is located on a fuse side of the central body portion. A connector portion also extends from the central body portion and includes a leg that extends on the fuse side of the central body portion.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: January 17, 2017
    Assignee: LEAR CORPORATION
    Inventors: Paul McEvilly, Allen Leo Mott, Daniel Jilg, Aric Henderson Anglin
  • Patent number: 9548177
    Abstract: A smart fuse for circuit protection includes a first shaft and second shaft separated by a gap. A heater is located inside portions of the first and second shafts, and the heater is held in place within the shafts by a solder alloy that fills the gap. The shafts and solder alloy form an electrical signal path through the fuse. A spring is attached to the heater. The spring is stretched such that the spring exerts a force on the heater. The solder alloy holds the heater in place and resists the force exerted by the spring. In an activation condition of the fuse, the heater increases in temperature and melts the solder alloy. The melted solder alloy no longer resists the force exerted by the spring, and the spring pulls the heater through the second shaft until the gap is open, thereby severing the electrical connection through the fuse.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: January 17, 2017
    Assignee: LITTELFUSE FRANCE SAS
    Inventors: Dapeng Hou, Philippe Difulvio
  • Patent number: 9548178
    Abstract: A fuse structure includes a substrate, a fuse element, and an auxiliary device. The fuse element is disposed on the substrate. The auxiliary device includes a source region and a drain region respectively disposed at two opposite sides of the fuse element. The auxiliary device is configured to monitor and diagnose the fuse element. The source region and the drain region are electrically isolated from the fuse element. A monitoring method of the fuse structure includes following steps. A drain voltage signal is applied to the drain region of the auxiliary device, a gate voltage signal is applied to the fuse element, and a signal from the source region is analyzed to diagnose a condition of the fuse element.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: January 17, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Yu-Hsiang Shu
  • Patent number: 9548179
    Abstract: An ion trap device includes a substrate over which at least one central DC electrode, an RF electrode and at least one side electrode are disposed. The central DC electrode includes a DC connector pad and a DC rail connected to the DC connector pad. The RF electrode includes at least one RF rail located adjacent to the DC rail and an RF pad connected to the at least one RF rail. The RF electrode is disposed between the central DC electrode and the side electrode. At least one pair of electrodes among the central DC electrode, the RF electrode and the side electrode have round corners facing each other.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: January 17, 2017
    Assignees: SK TELECOM CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Dongil Cho, Taehyun Kim, Jongkeon Yoon, Byoungdoo Choi, Seokjun Hong, Minjae Lee
  • Patent number: 9548180
    Abstract: Some embodiments of vacuum electronics call for nanoscale field-enhancing geometries. Methods and apparatus for using nanoparticles to fabricate nanoscale field-enhancing geometries are described herein. Other embodiments of vacuum electronics call for methods of controlling spacing between a control grid and an electrode on a nano- or micron-scale, and such methods are described herein.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: January 17, 2017
    Assignee: ELWHA LLC
    Inventors: Max N. Mankin, Tony S. Pan
  • Patent number: 9548181
    Abstract: A novel composition, system and method for improving beam current during boron ion implantation are provided. In a preferred aspect, the boron ion implant process involves utilizing B2H6, 11BF3 and H2 at specific ranges of concentrations. The B2H6 is selected to have an ionization cross-section higher than that of the BF3 at an operating arc voltage of an ion source utilized during generation and implantation of active hydrogen ions species. The hydrogen allows higher levels of B2H6 to be introduced into the BF3 without reduction in F ion scavenging. The active boron ions produce an improved beam current characterized by maintaining or increasing the beam current level without incurring degradation of the ion source when compared to a beam current generated from conventional boron precursor materials.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: January 17, 2017
    Assignee: PRAXAIR TECHNOLOGY, INC.
    Inventors: Ashwini K. Sinha, Stanley M. Smith, Douglas C. Heiderman, Serge M. Campeau
  • Patent number: 9548182
    Abstract: An instrument producing a charged particle beam according to the present invention is provided with: a charged particle source; a plurality of first electrodes disposed along a direction of irradiation of charged particles from the charged particle source; a plurality of insulation members disposed between the first electrodes; and a housing mounted around the plurality of first electrodes. The housing is formed from an insulating solid material, and includes a plurality of second electrodes disposed at positions in proximity to the plurality of first electrodes. At least one of the plurality of second electrodes is electrically connected to at least one of the plurality of first electrodes, each of the plurality of second electrodes having the same potential as the potential of the proximate one of the first electrodes.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: January 17, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takashi Onishi, Shunichi Watanabe, Minoru Kaneda
  • Patent number: 9548183
    Abstract: Charged particle beam writing apparatus includes a first generation unit to generate a smallest deflection region layer in three or more deflection region layers each having deflection regions of a size different from those of other deflection region layers, for each of a plurality of figure types variably shapable using first and second shaping apertures, an assignment unit to assign each of a plurality of shot figure patterns to deflection regions of the smallest deflection region layer of a corresponding one of the plurality of figure types, a correction unit to correct, by shifting the position of each smallest deflection region layer, according to a variable shaping position of each figure type, and a writing unit to write each of the plurality of shot figure patterns on a target object, in a state where the position of each smallest deflection region layer has been corrected for each figure type.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: January 17, 2017
    Assignee: NuFlare Technology, Inc.
    Inventor: Jun Yashima
  • Patent number: 9548184
    Abstract: A microreactor for use in a microscope, comprising a first and second cove layer (13), which cover layers are both at least partly transparent to an electron beam (14) of an electron microscope, and extend next to each other at a mutual distance from each other and between which a chamber (15) is enclosed, wherein an inlet (4) and an outlet (5) are provided for feeding fluid through the chamber and wherein heating means (8) are provided for heating the chamber and/or elements present therein.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: January 17, 2017
    Assignees: Technische Universiteit Delft, Stichting voor de Technische Wetenschappen
    Inventors: Jan Fredrik Creemer, Hendrik Willem Zandbergen, Pasqualina Maria Sarro
  • Patent number: 9548185
    Abstract: A cross section processing method and a cross section processing apparatus are provided in which it is possible to form a flat cross section in a sample composed of a plurality of substances having different hardness by a focused ion beam. The etching of a processing area is performed while variably controlling the irradiation interval, the irradiation time, or the like of a focused ion beam based on cross section information of an SEM image obtained by the observation of a cross section. In this way, even if a sample is composed of a plurality of substances having different hardness, it is possible to form a flat observation surface with a uniform etching rate.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: January 17, 2017
    Assignee: HITACHI HIGH-TECH SCIENCE CORPORATION
    Inventors: Hidekazu Suzuki, Tatsuya Asahata, Atsushi Uemoto
  • Patent number: 9548186
    Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: January 17, 2017
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Eric Hudson
  • Patent number: 9548187
    Abstract: A microwave radiation antenna includes an antenna body having a microwave radiation surface; a processing gas inlet configured to introduce a processing gas into the antenna body; a gas diffusion space configured to diffuse the processing gas in the antenna body; a plurality of gas outlets provided in the antenna body and configured to discharge the processing gas into the chamber; a plurality of slots provided in the antenna body under a state where the slots are separated from the gas diffusion space and the gas outlets; and an annular dielectric member provided in the microwave radiation surface side of the antenna body to cover a slot formation region where the slots are formed. A metal surface wave is formed in the microwave radiation surface by the microwave radiated through the slots and the annular dielectric member and a surface wave plasma is generated by the metal surface wave.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: January 17, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Taro Ikeda, Tomohito Komatsu, Shigeru Kasai, Hiroyuki Miyashita, Yuki Osada, Akira Tanihara, Yutaka Fujino
  • Patent number: 9548188
    Abstract: A method of conditioning a vacuum chamber of a semiconductor substrate processing apparatus includes forming a layer of an organic polymeric film on plasma or process gas exposed surfaces thereof. The method includes: (a) flowing a first reactant in vapor phase of a diacyl chloride into the vacuum chamber; (b) purging the vacuum chamber after a flow of the first reactant has ceased; (c) flowing a second reactant in vapor phase into the vacuum chamber selected from the group consisting of a diamine, a diol, a thiol, and a trifunctional compound to form a layer of an organic polymeric film on the plasma or process gas exposed surfaces of the vacuum chamber; and (d) purging the vacuum chamber to purge excess second reactant and reaction byproducts from the vacuum chamber.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: January 17, 2017
    Assignee: Lam Research Corporation
    Inventor: Dennis Michael Hausmann
  • Patent number: 9548189
    Abstract: A substrate etching system includes an etching control module, a filtering module, and an endpoint module. The etching control module selectively begins plasma etching of a substrate within an etching chamber. The filtering module, during the plasma etching of the substrate: receives a signal including endpoint information; decomposes the signal using empirical mode decomposition (EMD); and generates a filtered signal based on results of the EMD. The endpoint module indicates when an endpoint of the plasma etching of the substrate has been reached based on the filtered signal. The etching control module ends the plasma etching of the substrate in response to the indication that the endpoint of the plasma etching of the substrate has been reached.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 17, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Luc Albarede, Yassine Kabouzi, Jorge Luque, Andrew D. Bailey, III
  • Patent number: 9548190
    Abstract: Systems and methods are provided for scheduled MS3. A compound of interest is separated from a sample over a known time period using a separation device. A plurality of sMRM experiments are performed over the known time period on the separating compound of interest using a mass spectrometer. An intensity of a product ion of the compound of interest is produced for each of the plurality of sMRM experiments. Each intensity for the product ion for each of the plurality of sMRM experiments is compared to a threshold intensity level using a processor. When an intensity for the product ion of an sMRM experiment of the plurality of sMRM experiments is equal to or exceeds the threshold intensity level, the mass spectrometer is instructed to perform one or more MS3 experiments for the product ion using the processor.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: January 17, 2017
    Assignee: DH Technologies Development Pte. Ltd.
    Inventors: John Lawrence Campbell, David Michael Cox
  • Patent number: 9548191
    Abstract: Devices, systems, and methods for ion trapping with integrated electromagnets are described herein. One device includes a plurality of electrodes configured to trap an ion above a surface of the device, a medial coil and a plurality of peripheral coils, each positioned at a respective radial angle associated with the medial coil, wherein the medial coil is configured to generate a first magnetic field having a first orientation, and wherein the peripheral coils are configured to generate a second magnetic field having a second orientation that opposes the first orientation.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: January 17, 2017
    Assignee: Honeywell International Inc.
    Inventor: Daniel Youngner
  • Patent number: 9548192
    Abstract: The invention generally relates to apparatuses for focusing ions at or above ambient pressure and methods of use thereof. In certain embodiments, the invention provides an apparatus for focusing ions that includes an electrode having a cavity, at least one inlet within the electrode configured to operatively couple with an ionization source, such that discharge generated by the ionization source is injected into the cavity of the electrode, and an outlet. The cavity in the electrode is shaped such that upon application of voltage to the electrode, ions within the cavity are focused and directed to the outlet, which is positioned such that a proximal end of the outlet receives the focused ions and a distal end of the outlet is open to ambient pressure.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: January 17, 2017
    Assignee: Purdue Research Foundation
    Inventors: Robert Graham Cooks, Zane Baird, Wen-Ping Peng
  • Patent number: 9548193
    Abstract: In a scan measurement in which a mass scan is repeated across a predetermined mass range, when a voltage is returned from a termination voltage of one scan to an initiation voltage for the next scan, an undershoot or other drawbacks occur to destabilize the voltage value. Therefore, an appropriate waiting time is required. Conventionally, this waiting time has been set to be constant regardless of the analysis conditions. On the other hand, in the quadrupole mass spectrometer according to the present invention, the mass difference ?M between the scan termination mass and the scan initiation mass is computed based on the specified mass range, and a different settling time is set in accordance with this mass difference. When the mass difference ?M is small and hence requires only a short voltage stabilization time, a relatively short settling time is set. This shortens the cycle period of the mass scan, which increases the temporal resolution.
    Type: Grant
    Filed: May 26, 2008
    Date of Patent: January 17, 2017
    Assignee: SHIMADZU CORPORATION
    Inventors: Kazuo Mukaibatake, Shigenobu Nakano, Minoru Fujimoto
  • Patent number: 9548194
    Abstract: An ion trap is disclosed comprising: a plurality of electrodes which define a toroidal or annular ion confining volume that extends around a central axis; a first device arranged and adapted to apply one or more DC voltages to said plurality of electrodes in order to generate a DC potential well which acts to confine ions in a radial direction within said toroidal or annular ion confining volume, wherein said radial direction is substantially perpendicular to said central axis; and a control system arranged and adapted to non-mass selectively eject ions from said toroidal or annular ion confining volume. The ion trap enables a large number of ions to be trapped and ejected simultaneously.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: January 17, 2017
    Assignee: Micromass UK Limited
    Inventors: Kevin Giles, Martin Raymond Green, Jason Lee Wildgoose
  • Patent number: 9548195
    Abstract: A method of ejecting ions to be analyzed from a quadrupole ion trap in which a trapping field is created by one or more RF voltages applied to one or more electrodes of the trap, the method comprising the steps of cooling the ions to be analyzed within the quadrupole ion trap until the ions are thermalized, reducing the amplitude of one or more RF voltages applied to the quadrupole ion trap and applying the reduced amplitude RF voltages for one half cycle after the one or more RF voltages have reached a zero crossing point, turning off the RF voltages applied to the quadrupole ion trap, and ejecting the ions to be analyzed from the quadrupole ion trap.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: January 17, 2017
    Assignee: Thermo Fisher Scientific (Bremen) GmbH
    Inventors: Christian Albrecht Hock, Dmitry Grinfeld, Richard Heming
  • Patent number: 9548196
    Abstract: A discharge lamp includes a cathode in a luminous tube, and an emitter, other than thorium, is added to the cathode. The emitter is prevented from being excessively vaporized from the cathode and depleted soon. Smooth lighting is enabled even at start-up. A main body part (31) of the cathode (3) is made from a metallic material having a high melting point and containing no thorium. A front end (32) is made from a metallic material having a high melting point and containing an emitter (excepting thorium). Inside a sealed space (33) formed in the main body part (31) and/or the front end part (32) is received a sintered compact (34) containing an emitter (excepting thorium) that is higher in concentration than the emitter contained in the front end part (32).
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: January 17, 2017
    Assignee: USHIO DENKI KABUSHIKI KAISHA
    Inventors: Yukiharu Tagawa, Tomoyoshi Arimoto, Mitsuo Funakoshi, Yukio Yasuda, Hirohisa Iwabayashi
  • Patent number: 9548197
    Abstract: A substrate treatment method is provided, which includes a rinsing step of supplying a rinse liquid to a front surface of a rotating substrate after a chemical liquid step. The rinsing step includes a higher-speed rinsing step and a deceleration rinsing step to be performed after the higher-speed rinsing step. The deceleration rinsing step includes a liquid puddling step of reducing the rotation speed of the substrate within a rotation speed range lower than a rotation speed employed in the higher-speed rinsing step and supplying the rinse liquid to the front surface of the substrate at a flow rate higher than a maximum supply flow rate employed in the higher-speed rinsing step, whereby a puddle-like rinse liquid film is formed on the front surface of the substrate.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: January 17, 2017
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Asuka Yoshizumi, Ayumi Higuchi
  • Patent number: 9548198
    Abstract: A method of manufacturing a semiconductor device including forming a thin film containing silicon, oxygen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding, and a first catalytic gas to the substrate; and supplying an oxidizing gas and a second catalytic gas to the substrate.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: January 17, 2017
    Assignees: HITACHI KOKUSAI ELECTRIC INC., L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE
    Inventors: Yoshiro Hirose, Norikazu Mizuno, Kazutaka Yanagita, Shingo Okubo
  • Patent number: 9548199
    Abstract: A method, which forms an air-bubble-free thin film with a high-viscosity fluid resin, initially dispenses the fluid resin on an outer region of a semiconductor wafer while the semiconductor wafer is spinning, and then dispenses the fluid resin onto the center of the semiconductor wafer after the semiconductor wafer has stopped spinning.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: January 17, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sandra Zheng, Mark James Smiley, Douglas Jay Levack, Ronald Dean Powell
  • Patent number: 9548200
    Abstract: Methods and apparatus for processing a substrate are described herein. A vacuum multi-chamber deposition tool can include a degas chamber with both a heating mechanism and a variable frequency microwave source. The methods described herein use variable frequency microwave radiation to increased quality and speed of the degas process without damaging the various components.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: January 17, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Loke Yuen Wong, Ke Chang, Yueh Sheng Ow, Ananthkrishna Jupudi, Glen T. Mori, Aksel Kitowski, Arkajit Roy Barman
  • Patent number: 9548201
    Abstract: The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: January 17, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Ying Zhang, Uday Mitra, Praburam Gopalraja, Srinivas D. Nemani, Hua Chung
  • Patent number: 9548202
    Abstract: The disclosure relates to a method of bonding by molecular adhesion comprising the positioning of a first wafer and of a second wafer within a hermetically sealed vessel, the evacuation of the vessel to a first pressure lower than or equal to 400 hPa, the adjustment of the pressure in the vessel to a second pressure higher than the first pressure by introduction of a dry gas, and bringing the first and second wafers into contact, followed by the initiation of the propagation of a bonding wave between the two wafers, while maintaining the vessel at the second pressure.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: January 17, 2017
    Assignee: Soitec
    Inventors: Marcel Broekaart, Arnaud Castex
  • Patent number: 9548203
    Abstract: Provided is a semiconductor and method of manufacturing the same, and a method of forming even doping concentration of respective semiconductor device when manufacturing multiple semiconductor devices. When a concentration balance is disrupted due to an increase in doping region size, doping concentration is still controllable in example by using ion injected blocking pattern. Thus, the examples relate to a semiconductor and manufacture device with even doping, and high breakdown voltage obtainable as a result of such doping.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: January 17, 2017
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Young Bae Kim, Kwang Il Kim
  • Patent number: 9548204
    Abstract: There is provided a semiconductor device comprising a semiconductor layer that is made of a gallium-containing group III-V compound; and a first insulating film that is in contact with the semiconductor layer and contains silicon. An average density of gallium in the first insulating film between an interface of the first insulating film and the semiconductor layer and a plane away from the interface by 30 nm is less than 1.0×1018 cm?3. This configuration suppresses a decrease in flat band voltage and a decrease in threshold voltage.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: January 17, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Junya Nishii, Tohru Oka
  • Patent number: 9548205
    Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: January 17, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi, Masaaki Tachioka
  • Patent number: 9548206
    Abstract: Embodiments of an ohmic contact structure for a Group III nitride semiconductor device and methods of fabrication thereof are disclosed. In general, the ohmic contact structure has a root-mean-squared (RMS) surface roughness of less than 10 nanometers, and more preferably less than or equal to 7.5 nanometers, and more preferably less than or equal to 5 nanometers, and more preferably less than or equal to 2 nanometers, and even more preferably less than or equal to 1.5 nanometers.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: January 17, 2017
    Assignee: Cree, Inc.
    Inventors: Helmut Hagleitner, Jason Gurganus
  • Patent number: 9548207
    Abstract: A method of etching a silicon substrate, in which a depressed portion is formed by etching a first surface of the silicon substrate with ions generated in plasma, the method including introducing a rare gas into a reaction system to ionize the rare gas.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: January 17, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yoshinao Ogata, Masataka Kato, Masaya Uyama
  • Patent number: 9548208
    Abstract: A method for patterning an underlying layer is described, the method comprising providing a guiding layer on the underlying layer, the guiding layer comprising guiding structures and being substantially planar; providing a block-copolymer layer on the guiding layer; inducing phase separation of the block-copolymer layer in a regular pattern of structures of a first and a second polymer component, whereby one of the components aligns to the guiding structures, by chemo-epitaxy; thereafter, removing a first of the components of the block-copolymer layers completely, leaving a regular pattern of structures of the second component; providing a planarizing layer over the regular pattern of structures of the second component and the guiding layer; removing a portion of the planarizing layer, thereby leaving a regular pattern of structures of the planarizing layer at positions in between the structures of the second component, and exposing the structures of the second component; removing the structures of the second
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: January 17, 2017
    Assignee: IMEC VZW
    Inventors: Boon Teik Chan, Zheng Tao, Nadia Vandenbroeck, Safak Sayan
  • Patent number: 9548209
    Abstract: Provided is an integrated circuit (IC) fabrication method. The method includes receiving a mask, the mask having a plurality of dies and receiving a wafer, the wafer having a resist layer. The method further includes exposing the resist layer using the mask with a fraction radiation dose thereby forming a first plurality of images; re-positioning the mask relative to the wafer; and exposing the resist layer using the mask with another fraction radiation dose. A second plurality of images is formed, wherein a portion of the second plurality of images is superimposed over another portion of the first plurality of images.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: January 17, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Fang Yu, Chia-Ching Huang, Ting-Hao Hsu
  • Patent number: 9548210
    Abstract: Fabrication of a field-effect transistor is performed on a substrate comprising a film made from first semiconductor material, a gate dielectric covered by a gate electrode, source and drain areas separated by the gate electrode, a protection layer covering gate electrode and source and drain areas, and an access hole to the source area and/or to drain area. Metallic material is deposited in the access hole in contact with the first semiconductor material of the source and/or drain area. An electrically conducting barrier layer that is non-reactive with the first semiconductor material and with the metallic material is deposited before reaction of metallic material with first semiconductor material. Transformation heat treatment of the metallic material with the semiconductor material is performed to form a metallic material having a base formed by the semiconductor material generating a set of stresses on a conduction channel arranged between the source and drain areas.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: January 17, 2017
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STIMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Fabrice Nemouchi, Emilie Bourjot
  • Patent number: 9548211
    Abstract: The present invention provides a method for selectively removing silicon carbide from the surface of a substrate in preference to silicon dioxide. The method comprises abrading a surface of substrate with a polishing composition that comprises a particulate abrasive, at least one acidic buffering agent, and an aqueous carrier.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: January 17, 2017
    Assignee: Cabot Microelectronics Corporation
    Inventors: William Ward, Timothy Johns
  • Patent number: 9548212
    Abstract: A method is provided for fabricating a semiconductor device. The method includes providing a substrate having a device region and a peripheral region; and forming device structures on the substrate in the device region so as to form trenches between adjacent device structures. The method also includes forming a stop layer on the substrate and the device structures; and forming a first dielectric layer on the stop layer such that a portion of the densified first dielectric layer fills the trenches and a top surface of a portion of the first dielectric layer in the peripheral region is lower than a surface of the stop layer on the device structures by a densify high aspect ratio process. Further, the method includes forming a second dielectric layer on the densified first dielectric layer; and performing a plurality of polishing processes until the top surface of the device structures is exposed.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: January 17, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Jian Zhao, Hangping Wang