Patents Issued in February 7, 2017
  • Method for user communication with information dialogue system
    Patent number: 9564149
    Abstract: Provided is a method for user communications with an information dialog system, which may be used for organizing user interactions with the information dialog system based on a natural language. The method may include activating a user input subsystem in response to a user entering a request; receiving and converting the request of the user into text by the user input subsystem; sending the text obtained as a result of the conversion of the request to a dialog module; processing, by the dialog module, the text; forming, by the dialog module, the response to the request; sending the response to the user; and displaying and/or reproducing the formed response, where, after the displaying and/or the reproducing of the formed response, the user input subsystem is automatically activated upon entering a further request or a clarification request by the user.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: February 7, 2017
    Assignee: Google Inc.
    Inventors: Ilya Genadevich Gelfenbeyn, Artem Goncharuk, Ilya Andreevich Platonov, Olga Aleksandrovna Gelfenbeyn, Pavel Aleksandrovich Sirotin
  • Magnetic read apparatus having an improved read sensor isolation circuit
    Patent number: 9564150
    Abstract: A method and system provide a magnetic read apparatus. The magnetic read apparatus includes a substrate and an isolation circuit. The isolation circuit includes a bias resistor and a capacitor residing on the substrate. The bias resistor and the capacitor are connected in parallel through the substrate.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: February 7, 2017
    Assignee: WESTERN DIGITAL (FREMONT), LLC
    Inventors: Savas Gider, Neil D. Knutson, Steven C. Rudy
  • Data writer coil heater
    Patent number: 9564151
    Abstract: A data writer may suspend a transducing head from an actuator. The transducing head can consist of a writer coil positioned proximal a write pole. A protruding signal may be passed through the write coil to contact a data storage medium with the transducing head. A write signal can be passed through the write coil to write a data bit on the data storage medium.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: February 7, 2017
    Assignee: Seagate Technology LLC
    Inventor: Gary J. Kunkel
  • Magnetoresistance effect element and magnetic memory
    Patent number: 9564152
    Abstract: Provided are a magneto resistive effect element with a stable magnetization direction perpendicular to a film plane and with a controlled magnetoresistance ratio, and a magnetic memory using the magneto resistive effect element. Ferromagnetic layers 106 and 107 of the magneto resistive effect element are formed from a ferromagnetic material containing at least one type of 3d transition metal such that the magnetoresistance ratio is controlled, and the film thickness of the ferromagnetic layers is controlled on an atomic layer level such that the magnetization direction is changed from a direction in the film plane to a direction perpendicular to the film plane.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: February 7, 2017
    Assignee: TOHOKU UNIVERSITY
    Inventors: Hideo Ohno, Shoji Ikeda, Fumihiro Matsukura, Masaki Endoh, Shun Kanai, Hiroyuki Yamamoto, Katsuya Miura
  • Substrate for suspension, process for producing the same, suspension for magnetic head, and hard disk drive
    Patent number: 9564153
    Abstract: A substrate for suspension comprises a metallic substrate, an insulating layer formed on the metallic substrate, a conductor layer formed on the insulating layer, and a cover layer covering the conductor layer. The insulating layer and the cover layer are formed from different materials, whose coefficients of hygroscopic expansion are in the range between 3×10?6/% RH and 30×10?6/% RH. The difference between the coefficients of hygroscopic expansion of the two materials is 5×10?6/% RH or less.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: February 7, 2017
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yoichi Hitomi, Shinji Kumon, Terutoshi Momose, Katsuya Sakayori, Kiyohiro Takachi, Yoichi Miura, Tsuyoshi Yamazaki
  • Multilayer disk drive motors having out-of-plane bending
    Patent number: 9564154
    Abstract: Various embodiments concern a gimbaled flexure having a dual stage actuation structure. The flexure comprises a gimbal on which a motor is mounted. The motor comprises a first and second terminals and a plurality of actuator layers formed from a piezoelectric material. The plurality of actuator layers comprise serially stacked first, second, and third actuator layers. The plurality of actuator layers are respectively poled and connected to the first and second terminals such that both of the first and second actuator layers expand while the third actuator layer contracts in response to application of a signal across the first and second terminals. The differential motion of the plurality of layers in the motor cause the motor to curl about the contracting third actuator layer. The curling motion causes a portion of the flexure to preferentially curl.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: February 7, 2017
    Assignee: Hutchinson Technology Incorporated
    Inventors: Jacob D. Bjorstrom, Ryan N. Ruzicka, Joseph C. Wheatley
  • Flexure of disk drive suspension having a tail pad portion with a bridge element and a plurality of tail terminals
    Patent number: 9564155
    Abstract: A tail pad portion is provided in a flexure tail including a metal base and a conductive circuit portion. Tail terminals are arranged in the tail pad portion. The metal base is made of stainless steel, and includes a frame structure having a first frame and a second frame. An opening is formed between the first frame and the second frame. The tail terminals are arranged parallel to each other between the first frame and the second frame. A bridge portion is formed between the first frame and the second frame. The bridge portion includes at least one bridge element which is a part of the metal base. The bridge element is arranged at a position which overlaps at least one of the tail terminals in the thickness direction.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: February 7, 2017
    Assignee: NHK SPRING CO., LTD.
    Inventors: Hajime Arai, Futa Sasaki
  • Head gimbal assembly having a flexure tail with cover layer standoff islands
    Patent number: 9564156
    Abstract: A head gimbal assembly (HGA) for a disk drive includes a load beam, a laminated flexure attached to the load beam, and a head attached to the laminated flexure. The laminated flexure includes a tail for electrical connection between the head and a flex cable of a head stack assembly. The laminated flexure tail may include a plurality of conductive traces, a structural layer, and a dielectric layer there between, and may be disposed partially within a slot of an actuator arm. A first insulative cover layer is disposed on the plurality of conductive traces. A plurality of stand-off islands is disposed on the first insulative cover layer, and over at least one of the plurality of conductive traces (e.g. the writer traces). At least one of the plurality of stand-off islands is at least partially disposed between the first insulative cover layer and the inner slot surface.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: February 7, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Wing Chun Shum, Yanning Liu, John E. Scura
  • System and method for detecting reader-writer offset in a heat-assisted magnetic recording head
    Patent number: 9564157
    Abstract: An apparatus comprises a heat-assisted magnetic recording head configured to write to and read from a magnetic recording medium. The head comprises a reader and a writer including a near-field transducer (NFT). The reader comprises a center which is laterally offset relative to a center of the writer to define a reader-writer offset (RWO) therebetween. A magnetic recording medium comprises a plurality of tracks. The plurality of tracks comprises at least one track used as a region to test for a shift in the RWO. A processor is coupled to the recording head and configured to detect the RWO shift.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 7, 2017
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon Trantham, Tim Rausch, Jason C. Jury, Mark Allen Gaertner
  • Methods and devices for adjusting actuator control signals
    Patent number: 9564158
    Abstract: A method includes performing a first seek operation using a first voice coil motor (VCM) control signal by utilizing a first drag component value. The method further includes determining a position error signal (PES) and a DC offset component of the PES measured during the first seek operation, and determining that the DC offset component is above a predetermined threshold. In response to determining that the DC offset component is above the predetermined threshold, the method further includes determining a second drag component value different than the first drag component value. The method further includes generating a second VCM control signal by applying the second drag component value.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: February 7, 2017
    Assignee: Seagate Technology LLC
    Inventors: Amar Nath, Ming Zhong Ding, Guo Quing Zhang, Chan Fan Lau
  • Preventing damage to storage devices within a storage system due to movement of the storage system
    Patent number: 9564159
    Abstract: A method implemented in a storage system that has moveable storage devices includes a motion controller receiving movement related data of a storage device from at least one sensor associated with the storage device. In response to the received movement related data indicating at least one pre-identified condition, a park command is issued that triggers the reading head of the storage device to enter a parked state in which the storage device is protected from damage that can occur due to motion of the reading head while the pre-identified condition exists.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: February 7, 2017
    Assignee: Dell Products, L.P.
    Inventors: Sandor Farkas, Syed S. Ahmed
  • Servo compensation control in a vibration environment
    Patent number: 9564160
    Abstract: Methods, systems, and computer program product embodiments for improving track-follow control in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, using an accelerometer to dynamically detect device vibration for determining whether to implement a vibration compensation control mechanism.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nhan X. Bui, Angeliki Pantazi, Tomoko Taketomi
  • Method for controlling the lateral position of a tape head of a magnetic tape drive
    Patent number: 9564161
    Abstract: Embodiments include methods, systems and computer program products for controlling a lateral position of a tape head of a magnetic tape drive. Aspects include determining a first servo signal by reading position marks from a first servo band on a magnetic tape using a first sensor and determining a second servo signal by reading position marks from a second servo band on the magnetic tape using a second sensor. Aspects also include delaying the first servo signal relative to the second servo signal by a delay and calculating an average signal based on the first and the delayed second servo signal. Aspects further include determining servo information from the average signal indicative of a deviation of the lateral position of the tape head from an ideal lateral position of the tape head and controlling the tape head to adjust its lateral position such that the deviation is decreased.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Giovanni Cherubini, Simeon Furrer, Mark A. Lantz, Angeliki Pantazi
  • Data storage device measuring resonant frequency of a shock sensor by applying differential excitation and measuring oscillation
    Patent number: 9564162
    Abstract: A data storage device is disclosed comprising a disk, a head, and a shock sensor comprising a first terminal and a second terminal. A first bias signal is applied signal to the first terminal of the shock sensor and a second bias signal is applied to the second terminal of the shock sensor. An oscillating signal is generated by increasing the first bias signal and decreasing the second bias signal, and a resonant frequency of the shock sensor is detected based on the oscillating signal. A physical shock affecting the head actuated over the disk is detected based on a response of the shock sensor to the physical shock and based on the detected resonant frequency of the shock sensor.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: February 7, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Jaesoo Byoun, Timothy A. Ferris
  • Implementing dual partially independent thermal flyheight control (TFC) for hard disk drives
    Patent number: 9564163
    Abstract: A method, apparatus, and system are provided for implementing dual partially independent flyheight control (TFC) for hard disk drives (HDDs). A dual thermal flyheight control (TFC) includes a series connected first heater resistor and a second heater resistor connected between a pair of wires. A capacitor is connected in parallel with the first heater resistor providing a frequency dependent shunt to the parallel connected first heater resistor. TFC electrical bias signals are applied to the first heater resistor and second heater resistor carried by the pair of wires. For example, the TFC electrical bias signals include high frequency electrical signals including a frequency range between 1 MHz and 100 MHz having a set amplitude in a voltage range between 0 and 7 Volts, and/or DC current signal.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: February 7, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: John Contreras, Ian Robson McFadyen, Erhard Schreck
  • Exchange decoupled data storage medium
    Patent number: 9564164
    Abstract: A magnetic data storage medium capable of storing data bits may be configured at least with a magnetic underlayer structure and a recording structure. The recording structure can have at least a first magnetic layer and a second magnetic layer with the first magnetic layer decoupled by being constructed of an alloy of cobalt, platinum, and a platinum group metal element.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 7, 2017
    Assignee: Seagate Technology LLC
    Inventors: Jai-Young Kim, Terry Lee Morkved
  • Laminating magnetic cores for on-chip magnetic devices
    Patent number: 9564165
    Abstract: A laminating structure includes a first magnetic layer, a second magnetic layer, a first spacer disposed between the first and second magnetic layers and a second spacer disposed on the second magnetic layer.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert E. Fontana, Jr., William J. Gallagher, Philipp Herget, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang, Bucknell C. Webb
  • Magnetic-disk glass substrate and magnetic disk
    Patent number: 9564166
    Abstract: A magnetic-disk glass substrate of the present invention has an average value of squares of inclinations of 0.0025 or less and a frequency at which squares of inclinations are 0.004 or more of 15% or less, in a case where samples of inclinations on a main surface are obtained at intervals of 10 nm.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 7, 2017
    Assignees: HOYA CORPORATION, HOYA GLASS DISK VIETNAM II LTD.
    Inventors: Masanobu Itaya, Kinobu Osakabe, Toshio Takizawa
  • Optical disc apparatus and control method thereof
    Patent number: 9564167
    Abstract: An optical disc apparatus is disclosed. The optical disc apparatus includes: a driver configured to rotate an optical disc having a recording surface for data; an optical pick-up configured to emit a light beam to the optical disc rotated by the driver; and at least one processor configured to operate the optical pick-up to focus the light beam emitted from the pick-up unit to perform one of recording and reproducing the data on the recording surface and track curvature of the recording surface within a preset allowable range, and to process the light beam reflected from the recording surface, the at least one the processor further configured to increase the allowable range if it is determined that the focus of the light beam cannot track the curvature of the recording surface in a section of the recording surface.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: February 7, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae Hyun Kim
  • Adjustable interpolation sampling interval for tape systems
    Patent number: 9564168
    Abstract: In one general embodiment, a method includes determining a sampling interval for an interpolator using at least one of: predefined data stored in memory, and a standard deviation of a position error signal. The method further includes applying the sampling interval to the interpolator in response to determining the sampling interval. In another general embodiment, an apparatus includes an interpolator and a controller. The controller is configured to determine a sampling interval for the interpolator using at least one of: predefined data stored in memory, and a standard deviation of a position error signal. The controller is also configured to apply the sampling interval to the interpolator in response to determining the sampling interval.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Jens Jelitto
  • Compressed audio information
    Patent number: 9564169
    Abstract: Compressed entertainment content such as audio or video or both includes additional aspects and operations associated their way. The compressed audio may be used to signal computers such as a telephone or reminder for an appointment. A melody line may be extracted from the audio, or the audio may be used exactly as it is. Another aspect stores traders within the entertainment content such as in MP3. Those traders are used to trigger the system to retrieve other parts of the content to be displayed at the same time that that particular part of the MP3 is being play. The content may include video or text, or maybe links to other content such as broadband content four times sensitive content. Another aspect describes encryption which is keyed to the disk ID to prevent playing oven illegally copied disk. Another aspect reads a specified amount of information then spins down the disk to conserve battery power.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: February 7, 2017
    Inventor: Scott C. Harris
  • Flex over suspension fault detection under a write gate for magnetic disk drives
    Patent number: 9564170
    Abstract: A system and method for Flex Over or On Suspension (FOS) fault detection under a write gate for magnetic disk drives may employ a flex over suspension fault comparator that compares a predetermined reference threshold to a positive delta of a disk drive write head data stream and outputs a positive or negative FOS fault indication. A max/min buffer detects polarity of a disk drive read/write head and applies a positive buffered delta to the fault comparator. A transition-free window detector triggers the fault comparator to output the fault indication when a transition-free window of zero-value data bits of a predetermined length is detected from the disk drive head, and the transition-free window detector provides a fault validation signal to validate output of the fault comparator when the transition-free window of zero-value data bits of the predetermined length is detected from the disk drive head.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: February 7, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Rida S. Assaad, William M. Torres Escajadillo, Mark A. Wolfe
  • Reconstructive error recovery procedure (ERP) using reserved buffer
    Patent number: 9564171
    Abstract: In one embodiment, a tape drive includes a reserved data buffer and logic integrated with and/or executable by a processor. The logic is configured to read a data set from a medium and store a first portion of the data set to the reserved data buffer in response to a determination that the first portion of the data set is correctable using C2 error correction code (ECC). The logic is also configured to replace any stored row of a non-C2-correctable portion of the data set stored to the reserved data buffer with a corresponding row of the data set read from the medium in response to a determination that the stored row of the non-C2-correctable portion of the data set has an equal amount or more C1-correctable error therein than the corresponding row of the data set read from the medium.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Takashi Katagiri, Pamela R. Nylander-Hill, Keisuke Tanaka
  • Video replay systems and methods
    Patent number: 9564172
    Abstract: A video replay system which allows for the payback of video files from a buffer in random access memory and from disk to minimize the delay between capturing and replaying a desired video portion. In one embodiment, a portion of RAM is allocated to provide a buffer for holding video files in memory before the riles are written to a hard drive or other non-volatile storage. An index of key frames is also stored in the buffer. The computer system executes software that is responsive to an operator's commands to read the video fifes and index and playback desired video portions in a variety of modes and speeds, including slow motion, reverse, fast-forward, and slow or fast reverse.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: February 7, 2017
    Assignee: NFL Enterprises LLC
    Inventors: John Edward Cave, Jr., Arvin Z. Chan
  • Media editing application for auditioning different types of media clips
    Patent number: 9564173
    Abstract: Some embodiments provide a program that creates a composite media presentation from several media clips. The program creates an audition set for a particular location in a composite display area for placing media clips to specify a description of the composite media presentation. The program adds to the audition set several different types of media clips that are candidates for placement in the composite display area at the particular location. The program iteratively selects a different media clip in the audition set as the only committed media clip in the audition set to include in the composite media presentation.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: February 7, 2017
    Assignee: APPLE INC.
    Inventors: Anne Swenson, Giovanni Agnoli, Enrique Rodriguez, Charles Lyons, Brian Meaney, Dave Cerf, Mike Stern
  • Method and apparatus for processing multimedia
    Patent number: 9564174
    Abstract: The multimedia method includes reading out information regarding user reactions to content during playback of the content, displaying a history of user reactions according to the information regarding the user reactions, and playing back a portion of content corresponding to a selected time point from the history of the user reactions at which the user reactions occurred.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: February 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-jun Han, Bo-mi Kim
  • Clustering crowdsourced videos by line-of-sight
    Patent number: 9564175
    Abstract: A method for clustering images includes acquiring initial image data including a scene of interest. A 3D model is constructed of the scene of interest based on the acquired initial image data. Additional image data including the scene of interest is acquired. The additional image data is fitted to the 3D model. A line-of-sight of the additional image data is estimated based on the fitting to the 3D model. The additional image data is clustered according to the estimated line-of-sight.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arup Acharya, Kirk A. Beaty, Puneet Jain, Justin G. Manweiler
  • Method to mark and exploit at least one sequence record of a video presentation
    Patent number: 9564176
    Abstract: The present invention proposes a method to mark and exploit at least one sequence record of a video presentation played on a multimedia unit, said method comprising the steps of: during the video presentation, receiving a command from a user to mark a currently displayed video sequence, said command initiating the step of: creating a sequence record comprising a time index or frame index, allowing to locate the proper part of the video presentation, and a reference of the video presentation. At a later stage, requesting the edition of the sequence record by: adding textual information which corresponds to the actual sequence, and storing the sequence record.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: February 7, 2017
    Assignee: NAGRAVISION S.A.
    Inventors: Christophe Oddou, Thierry Dagaeff, Yousri Abdeljaoued, Benoit Horisberger, Nicola Turini, Jean Rossier, Alejandra Garcia Rojas Martinez
  • Intelligent video navigation techniques
    Patent number: 9564177
    Abstract: Automatic replay or skip ahead functionality can be configured to intelligently navigate to a portion of a video a user desires to view. The context at which a user selects intelligent navigation can be analyzed to determine where to initiate automatic replay or skip ahead. The context for intelligent navigation can be based on scene or shot segmentation data, closed captioning, aggregate video navigation data from a community of users of shared demographic traits and/or interest, and/or other metadata. In the case of automatic replay, playback of a portion of a video can include enhancements for that portion, such as providing closed captioning, display at a decreased frame rate (“slow motion”), zooming in/out on a portion of the frames of a video segment, among other enhancements.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: February 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Douglas Ryan Gray, Adam Carlson, Ashutosh Vishwas Kulkarni, Anna Makris, Colin Jon Taylor
  • Apparatus and method for supporting storage devices during manufacture
    Patent number: 9564178
    Abstract: There is disclosed an apparatus and method for supporting storage devices during manufacture. The apparatus includes structural members and plural slot carriers received in bays in the apparatus. Each slot carrier carries at least one slot arranged to receive a storage device, wherein the slot carriers are insertable and/or removable from the bays through apertures at the front of the apparatus. Clamp assemblies are arranged to releasably clamp the slot carrier to one or more structural members at the sides of the slot carrier.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: February 7, 2017
    Assignee: Seagate Technology LLC
    Inventor: Alexander Kay
  • Rectifying component for magnetic disk device
    Patent number: 9564179
    Abstract: A spoiler (40) that is a rectifying component for a magnetic disk device including a flat plate-like plate portion (41) arranged to face a magnetic disk (10), and a support portion (42) that supports the plate portion (41) includes a body portion (401) made of a resin, and a metal plating layer (402) that covers an entire surface of the body portion (401).
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: February 7, 2017
    Assignee: TDK CORPORATION
    Inventors: Susumu Taniguchi, Hisayuki Abe
  • Deep-sleep wake up for a memory device
    Patent number: 9564180
    Abstract: A memory device comprises memory banks, power gates, and bank wake-up circuits. Each of the memory banks has a core voltage supply. The power gates are coupled to the memory banks for charging the core voltage supplies and have a plurality of powering modes. The bank wake-up circuits are coupled to the power gates for selecting one of the plurality of power modes for charging the memory banks during a wake-up mode. The bank wake-up circuits sense the core voltage supplies during the wake-up mode. The bank wake-up circuits serially charge the memory banks as a function of the sensed core voltage supplies of the memory banks.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: February 7, 2017
    Assignee: Invecas, Inc.
    Inventors: Harold Pilo, Michael Lee
  • Memory device comprising double cascode sense amplifiers
    Patent number: 9564181
    Abstract: A memory device comprising a memory array comprising a plurality of memory cells, a plurality of bitlines and a plurality of wordlines for writing to the plurality of memory cells and a sense amplifier coupled to a first bitline of the plurality of bitlines, for reading the contents of a selected memory cell, the sense amplifier comprising a first cascode transistor pair coupled to a second cascode transistor pair, the first cascode transistor pair coupled to the first bitline and a second bitline, and a current comparator coupled to a drain side of the second cascode transistor pair for determining a value of the selected memory cell.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: February 7, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Kerry Tedrow
  • Semiconductor storage device and sense amplifier circuit
    Patent number: 9564182
    Abstract: A cross-coupled circuit provided between first and second bit lines that form a bit line pair includes first to fourth fin transistors of p-channel type. The first transistor has its source connected to a first power supply and its gate connected to the second bit line. The second transistor has its source connected to the first power supply and its gate connected to the first bit line. The third transistor has its source connected to the first transistor's drain and its drain connected to the first bit line. The fourth transistor has its source connected to the second transistor's drain and its drain connected to the second bit line.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: February 7, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Tsuyoshi Koike, Yoshinobu Yamagami
  • Sense amplifier having a timing circuit for a presearch and a main search
    Patent number: 9564183
    Abstract: A line sense amplifier comprises: a presearch block, a main search block, and a timing circuit. The presearch block is coupled to a presearch line for sensing the presearch line. The main search block is coupled to a main line for sensing the main line. The timing circuit operates the presearch block and the main search block for charging and sensing of the presearch line and the main line. The timing circuit initiates the main search block to determine a match condition for the main line based on whether a match condition is determined for the presearch line.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: February 7, 2017
    Assignee: Invecas, Inc.
    Inventor: John Edward Barth, Jr.
  • Sense amplifier for single-ended sensing
    Patent number: 9564184
    Abstract: A single ended line sense amplifier having an input coupled to a single ended line having a near end and a far end device comprises a plurality of nFET stacks coupled between the near end of the single ended line and the far end of the single ended line, a single ended line comparator coupled to the near end of the single ended line configured to compare a voltage at the near end of the single ended line to provide a logic state output, and a charge transistor coupled to the single ended line at a point that is between the near end of the single ended line and the far end of the single ended line to shift occurrence of snap back from strong charging of the single ended line.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: February 7, 2017
    Assignee: Invecas, Inc.
    Inventor: John Edward Barth, Jr.
  • Semiconductor memory device
    Patent number: 9564185
    Abstract: According to one embodiment, a semiconductor memory device includes a memory including a memory cell array, and an input/output pin configured to transfer data, a command, and an address from an external to the memory. The memory includes a termination circuit provided between the input/output pin and the memory cell array, and configured to supply a first voltage having a first amplitude in a first transfer mode and supply a second voltage having a second amplitude in a second transfer mode, a first intermediate value of the first amplitude being different from a second intermediate value of the second amplitude.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kosuke Yanagidaira
  • Method and apparatus for memory access
    Patent number: 9564186
    Abstract: Aspects of the disclosure provide an integrated circuit that includes a first memory controller, a second memory controller and at least a functional circuit coupled to the second memory controller. The first memory controller is configured to control memory access to a first memory. The second memory controller is configured to control memory access to a second memory that is able to be turned on/off. The functional circuit is configured to operate based on the second memory. The second memory controller is configured to cause the second memory to be turned on when an application requires an operation of the functional circuit.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: February 7, 2017
    Assignee: Marvell International Ltd.
    Inventors: Zhou Zhu, Xinyan Wu, Xiaofan Tian, Jiaquan Su
  • Predicting saturation in a shift operation
    Patent number: 9564187
    Abstract: Apparatus for data processing and a method of data processing are provided. Shift circuitry performs a shift operation in response to a shift instruction, shifting bits of an input data value in a direction specified by the shift instruction. Bit location indicator generation circuitry and comparison circuitry operate in parallel with the shift circuitry. The bit location indicator indicates at least one bit location in the input data value which must not have a bit set if the shifted data value is not to saturate. Comparison circuitry compares the bit location indicator with the input data value and indicates a saturation condition if any bits are indicated by the bit position indicator for bit locations which hold set bits in the input data value. A faster indication of the saturation condition thus results.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: February 7, 2017
    Assignee: ARM Limited
    Inventors: David Raymond Lutz, Neil Burgess
  • Current-mode sense amplifier and reference current circuitry
    Patent number: 9564188
    Abstract: An electronic circuit comprising is provided with a current sense amplifier. The amplifier comprises a reference current input terminal, a sense current input terminal, and a first output terminal. The electronic circuit includes a reference current source. The reference current source includes two reference n-FET stacks connected in series, and the reference current input terminal is coupled to a ground terminal via the two reference n-FET stacks. The electronic circuit includes a plurality of memory cells each coupled in parallel via a respective sense n-FET stack to the sense current input terminal. The amplifier is configured to generate a first logical value at the first output terminal of the amplifier in response to a sense current of the sense current input terminal being lower than a reference current of the reference current input terminal.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Alexander Fritsch, Gerhard Hellner, Michael Kugel, Rolf Sautter
  • Memory system including semiconductor memory device and program method thereof
    Patent number: 9564189
    Abstract: A method of programming a memory system includes: reading a target page included in a selected memory block in response to a program request when at least one of the pages included in the selected memory block contains data; and performing a program for the target page when, among the data bits included in the data read from the target page, the number of data bits having a first logic value is equal to or less than a preset value.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: February 7, 2017
    Assignee: SK Hynix Inc.
    Inventor: Ju Hyeon Han
  • Semiconductor memory device with a delay locked loop circuit and a method for controlling an operation thereof
    Patent number: 9564190
    Abstract: An operation control method of a semiconductor memory device includes executing a Delay Locked Loop (DLL) locking in response to a DLL reset signal and measuring a loop delay of a DLL. The operation control method further includes storing measured loop delay information and DLL locking information; and performing a delay control of a command path using the stored loop delay information and DLL locking information independent of the DLL, during a latency control operation.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: February 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hangi Jung
  • Signal compensation circuit and semiconductor apparatus using the same
    Patent number: 9564191
    Abstract: A signal compensation circuit includes a first path configured to cause a source signal to pass therethrough and be outputted as a first signal; a delay block configured to output a second signal by delaying the source signal by a predetermined time; a second path configured to cause the second signal to pass therethrough and be outputted as a third signal; and a signal combination block configured to generate a compensated signal by combining the first signal and the third signal.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: February 7, 2017
    Assignee: SK HYNIX INC.
    Inventors: Jung Hwan Ji, Ki Chon Park
  • Memory controller for strobe-based memory systems
    Patent number: 9564192
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: February 7, 2017
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Circuit to generate a sense amplifier enable signal
    Patent number: 9564193
    Abstract: A circuit includes a tracking bit line, a tracking unit connected to the tracking bit line and a detection unit. The tracking unit is configured to receive a first control signal and configured to selectively charge or discharge a voltage on the tracking bit line in response to the first control signal. The detection unit is coupled to the tracking bit line and configured to generate a sense amplifier enable (SAE) signal in response to the voltage level on the tracking bit line.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: February 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Ping Yang, Chih-Chieh Chiu, Fu-An Wu, Chia-En Huang, I-Han Huang
  • Input apparatus and semiconductor memory apparatus having the input apparatus
    Patent number: 9564194
    Abstract: An input apparatus of a semiconductor memory may be provided. The input apparatus may include a first storage circuit configured to receive at least a portion of an input signal provided based on a pin reduction command which is enabled before an operation command through a pin and store the at least a portion of the input signal. The input apparatus may include a second storage circuit configured to receive a remaining portion of the input signal provided based on the operation command through the pin and store the remaining portion of the input signal. The input apparatus may include an arrangement circuit configured to control an output timing of the input signal stored in the first storage circuit and the second storage circuit.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: February 7, 2017
    Assignee: SK HYNIX INC.
    Inventors: Seung Geun Baek, Jae Il Kim
  • Address comparator circuit for generating transmission control signal, memory device and memory system including the same
    Patent number: 9564195
    Abstract: An address comparator circuit includes a first determination unit suitable for activating a first control signal when a first address corresponding to a previous read command is identical with a second address corresponding to a current read command; a second determination unit suitable for activating a second control signal when the previous and current read commands are consecutively inputted to the address comparator circuit with an interval of a specific number of clocks or less; and a blocking signal generation unit suitable for generating a blocking signal that blocks data transmission between a memory array and an external device based on the first and the second control signals.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: February 7, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jung-Hwan Ji, Ki-Chon Park
  • Semiconductor memory device and data writing method using a checkerboard pattern utilizing existing data supply bit addresses
    Patent number: 9564196
    Abstract: To provide a semiconductor memory device capable of writing a checkerboard pattern for interference and investigation by three writings regardless of the magnitude of memory capacity by making a change of a simple circuit configuration free from the need of a data holding circuit and a voltage converting circuit large in circuit area in a memory array in which the order of arrangement of bits is reversedly arranged between data words adjacent in a row direction. A row decoder and a column decoder are respectively configured to enable operation switching to an all selection mode and an even/odd-based selection mode in addition to a single address selection mode of a memory array by a control signal from a control circuit.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: February 7, 2017
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Tomotsugu Goto
  • Ferromagnetic device providing high domain wall velocities
    Patent number: 9564197
    Abstract: The invention is directed to a method of manufacturing a ferromagnetic device (10), having an elongated structure extending along a longitudinal direction (11), comprising a ferromagnetic material, wherein a transverse cross section (20) of the ferromagnetic material, perpendicular to said longitudinal direction, is designed to provide a domain wall velocity above the Walker breakdown limit of the ferromagnetic material. In particular, at least a portion (21-23) of a peripheral contour of the ferromagnetic material forms, in the transverse cross-section (20), a non-orthogonal convex set. For example, the whole peripheral contour may realize a (non-orthogonal) convex polygon.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Rolf Allenspach, Carl Zinoni
  • Six-transistor SRAM semiconductor structures and methods of fabrication
    Patent number: 9564198
    Abstract: A two-transistor memory cell based upon a thyristor for an SRAM integrated circuit is described together with a process for fabricating it. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: February 7, 2017
    Assignee: Kilopass Technology, Inc.
    Inventors: Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng, Christophe J. Chevallier