Patents Issued in February 21, 2017
  • Patent number: 9577118
    Abstract: The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage Vth of 0.3 V to 0.7 V and a leakage current Jr of 1×10?9 A/cm2 to 1×10?4 A/cm2 in a rated voltage VR.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: February 21, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Masatoshi Aketa, Yuta Yokotsuji
  • Patent number: 9577119
    Abstract: A solar module with a front side surface and a rear side surface, has a front side encapsulation element which forms the front side surface of the solar module, a multiplicity of solar cells which are connected electrically to one another, a rear side encapsulation element which forms the rear side surface of the solar module with a rear side surface plane and has a polymer plastic film, and at least one plug-in device connecting to a complementary structure. The plug-in device is at least partially laminated into the rear side encapsulation element, in the region of an overlapping section, wherein the rear site encapsulation element has an opening and the plug-in device is arranged at least partially in the opening. The plug-in device projects beyond the rear side surface plane of the solar module by a maximum of 15 mm.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: February 21, 2017
    Assignee: HANWHA Q.CELLS GMBH
    Inventors: Andreas Pfennig, Maximilian Scherff
  • Patent number: 9577120
    Abstract: A multilayer anti-reflection structure for a backside contact solar cell. The anti-reflection structure may be formed on a front side of the backside contact solar cell. The anti-reflection structure may include a passivation level, a high optical absorption layer over the passivation level, and a low optical absorption layer over the high optical absorption layer. The passivation level may include silicon dioxide thermally grown on a textured surface of the solar cell substrate, which may be an N-type silicon substrate. The high optical absorption layer may be configured to block at least 10% of UV radiation coming into the substrate. The high optical absorption layer may comprise high-k silicon nitride and the low optical absorption layer may comprise low-k silicon nitride.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: February 21, 2017
    Assignee: SunPower Corporation
    Inventors: Hsin-Chiao Luan, Denis De Ceuster
  • Patent number: 9577121
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 21, 2017
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 9577122
    Abstract: A conductive paste is provided which can form electrodes in crystalline silicon solar cells at low cost while ensuring that the electrodes exhibit low contact resistance with respect to both p-type and n-type impurity diffusion layers. The conductive paste for forming a solar cell electrode includes a silver powder, a glass frit, an additive particle and an organic vehicle, the glass frit having a glass transition point of 150 to 440° C., the additive particle including an alloy material containing 20 to 98 mass % aluminum, the conductive paste including the additive particle in an amount of 2 to 30 parts by weight with respect to 100 parts by weight of the silver powder.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: February 21, 2017
    Assignee: NAMICS CORPORATION
    Inventors: Noriyuki Sakai, Taeko Semba
  • Patent number: 9577123
    Abstract: Provided are nanostructures and optical devices having the nanostructures. The nanostructure may include a carbon nanomaterial layer, a nanopattern formed on the carbon nanomaterial layer, and a metal layer formed on a surface of the nanopattern. The nanostructure may be formed in a ring shape, and the metal layer may include a plurality of metal layers formed of different metals.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: February 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIST (Ulsan National Institute of Science and Technology)
    Inventors: Unjeong Kim, Younggeun Roh, Jineun Kim, Soojin Park, Yeonsang Park, Chanwook Baik, Seungmin Yoo, Jaesoong Lee, Sangmo Cheon
  • Patent number: 9577124
    Abstract: A filter member includes a first lead terminal, an optical filter, and a first mold member, and a light incidence surface and a light emission surface of the optical filter is exposed from the first mold member. A sensor member includes an IR sensor element, a second lead terminal and a second mold member. A light-receiving surface of the IR sensor element is exposed from the second mole member. The filter member is disposed on the sensor member so that the light emission surface of the optical filter faces the light-receiving surface of the IR sensor element in the sensor member.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: February 21, 2017
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Toshiaki Fukunaka, Yasutaka Myoraku
  • Patent number: 9577125
    Abstract: The present invention is based on a unique design of a novel structure, which incorporates two quantum dots of a different bandgap separated by a tunneling barrier. Upconversion is expected to occur by the sequential absorption of two photons. In broad terms, the first photon excites an electron-hole pair via intraband absorption in the lower bandgap dot, leaving a confined hole and a relatively delocalized electron. The second absorbed photon can lead, either directly or indirectly, to further excitation of the hole, enabling it to then cross the barrier layer. This, in turn, is followed by radiative recombination with the delocalized electron.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: February 21, 2017
    Assignee: YEDA RESEARCH AND DEVELOPMENT CO. LTD.
    Inventors: Dan Oron, Zvi Deutsch, Lior Neeman
  • Patent number: 9577126
    Abstract: Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a back contact solar cell includes a crystalline silicon substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region is disposed above the crystalline silicon substrate. The first polycrystalline silicon emitter region is doped with dopant impurity species of a first conductivity type and further includes ancillary impurity species different from the dopant impurity species of the first conductivity type. A second polycrystalline silicon emitter region is disposed above the crystalline silicon substrate and is adjacent to but separated from the first polycrystalline silicon emitter region. The second polycrystalline silicon emitter region is doped with dopant impurity species of a second, opposite, conductivity type.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 21, 2017
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Timothy Weidman, Staffan Westerberg
  • Patent number: 9577127
    Abstract: A composite material for fluorescent quantum dot micro-nano packaging. The composite material comprises fluorescent quantum dots, a mesoporous particle material having a nanometer lattice structure, and a barrier layer, wherein the fluorescent quantum dots are distributed in the mesoporous particle material, and the barrier layer is coated on the outer surface of the mesoporous particle material. In the composite material according to the invention, the quantum dot aggregation can be effectively retarded, with the barrier layer coated on the surface the water-oxygen micromolecule erosion is prevented, the compatibility and stability of the composite fluorescent particles is improved, and the service life of the composite material for fluorescent quantum dot micro-nano packaging is thus greatly improved.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 21, 2017
    Assignee: Tianjin Zhonghuan Quantum Tech Co., Ltd.
    Inventors: Kai Wang, Wei Chen, Junjie Hao, Xinhai Zhang, Xiaowei Sun
  • Patent number: 9577128
    Abstract: The present invention relates to a substrate for a thin film photovoltaic module, characterized in that it is a cementitious product with average surface roughness Ra not higher than 500 nm. The invention also relates to the cementitious product as such, the thin film photovoltaic module comprising it, and a method of molding both of them.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: February 21, 2017
    Assignee: ITALCEMENTI S.P A.
    Inventors: Roberta Alfani, Claudia Capone, Marco Plebani
  • Patent number: 9577129
    Abstract: A method of bonding solar cell component to a support and the solar cell assembly thus obtained. The method of bonding solar cell component to a support comprises: disposing metallized traces on the support; dispensing bonding adhesive on front of the support or on back of the solar cell component; and laying down the solar cell component on the support and soldering the solar cell component to the metallized traces on the support. The support is a glass support with integrated circuits.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: February 21, 2017
    Assignee: SolAero Technologies Corp.
    Inventor: Benjamin C. Richards
  • Patent number: 9577130
    Abstract: Embodiments relate to a thin film solar cell backside contact. A planar substrate is provided and an associated backside of the substrate is modified to form one or more pedestals. The modified substrate is layered with multiple layers of material, including a conducting layer, a reflective layer, and a passivation layer. The layered backside substrate is polished to expose portions of the conducting layer at discrete locations on the backside of the substrate. The exposed portions of the conducting layer maintain direct electrical communication between an absorber layer deposited on the layered backside substrate and the conducting layer.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: February 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hans-Juergen Eickelmann, Ruediger Kellmann, Hartmut Kuehl, Markus Schmidt
  • Patent number: 9577131
    Abstract: A concentrator photovoltaic module including: a flexible printed circuit provided in contact with a bottom surface of a housing; and a primary concentrating portion formed by a plurality of lens elements being arranged, each lens element concentrating sunlight, wherein the flexible printed circuit includes: an insulating base material and a conductive pattern; a plurality of power generating elements provided on the pattern, so as to correspond to the lens elements, respectively; a cover lay as a covering layer having insulating property and a low water absorption not higher than a predetermined value, the cover lay covering and sealing a conductive portion including the pattern on the insulating base material; and an adhesive layer having insulating property and a low water absorption not higher than the predetermined value, the adhesive layer bonding the insulating base material and the covering layer together.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: February 21, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kenji Saito, Takashi Iwasaki, Kazumasa Toya, Yoshiya Abiko, Kenichi Hirotsu, Youichi Nagai, Hideaki Nakahata, Rui Mikami
  • Patent number: 9577132
    Abstract: A solar cell module includes a plurality of solar cells each including a substrate, an emitter region positioned at a back surface of the substrate, first electrodes electrically connected to the emitter region, second electrodes electrically connected to the substrate, a first current collector positioned at ends of the first electrodes, and a second current collector at ends of the second electrodes, and a first connector connecting a first current collector of a first solar cell of the plurality of solar cells to a second current collector of a second solar cell adjacent to the first solar cell. The first current collector of the first solar cell and the second current collector of the second solar cell each have a different polarity.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: February 21, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Myungjun Shin, Haejong Cho, Minho Choi, Seongeun Lee
  • Patent number: 9577133
    Abstract: Provided are novel Building Integrable Photovoltaic (BIPV) modules having one or more connectors that are movable between extended and retracted positions. Connector adjustment may be performed in the field, for example, during installation of a module. In certain embodiments, a connector includes a connector body and extension body. The extension body flexibly attaches the connector body to the module and allows the connector body to move with respect to the module edge. In an extended position, the connector body is positioned closer to the edge and is configured to make electrical connections to a joiner connector for interconnecting with an adjacent module. In a retracted positioned, the connector body is positioned further from the edge and is configured to make electrical connections to a jumper for interconnecting the conductive elements of the connector. In certain embodiments, a jumper does not protrude beyond the edge when connected to the connector body.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: February 21, 2017
    Assignee: BEIJING APOLLO DING RONG SOLAR TECHNOLOGY CO., LTD.
    Inventor: Adam C. Sherman
  • Patent number: 9577134
    Abstract: Methods of fabricating solar cell emitter regions using self-aligned implant and cap, and the resulting solar cells, are described. In an example, a method of fabricating an emitter region of a solar cell involves forming a silicon layer above a substrate. The method also involves implanting, through a stencil mask, dopant impurity atoms in the silicon layer to form implanted regions of the silicon layer with adjacent non-implanted regions. The method also involves forming, through the stencil mask, a capping layer on and substantially in alignment with the implanted regions of the silicon layer. The method also involves removing the non-implanted regions of the silicon layer, wherein the capping layer protects the implanted regions of the silicon layer during the removing. The method also involves annealing the implanted regions of the silicon layer to form doped polycrystalline silicon emitter regions.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: February 21, 2017
    Assignee: SunPower Corporation
    Inventor: Timothy Weidman
  • Patent number: 9577135
    Abstract: The ultraviolet sensor device comprises a semiconductor substrate, a dielectric layer above the substrate, a surface of the dielectric layer that is provided for the incidence of ultraviolet radiation, a floating gate electrode in the dielectric layer and an electrically conductive control gate electrode near the floating gate electrode. The control gate electrode is insulated from the floating gate electrode. A sensor layer is formed by an electrically conductive further layer that is electrically conductively connected to the floating gate electrode. The control gate electrode is arranged outside a region that is located between the sensor layer and the surface provided for the incidence of ultraviolet radiation. The sensor layer is discharged by incident UV radiation and can be charged or discharged electrically by charging or discharging the floating gate electrode.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: February 21, 2017
    Assignee: AMS AG
    Inventor: Friedrich Peter Leisenberger
  • Patent number: 9577136
    Abstract: The present invention pertains to a semiconductor light-receiving element and a method for manufacturing the same, enabling operation in a wide wavelength bandwidth and achieving fast response and high response efficiency. A PIN type photodiode made by sequentially layering on top of the substrate a Si layer of a first conductivity type, a non-doped Ge layer and a Ge layer of a second conductivity type that is the opposite type of the first conductivity type and a Ge current-blocking mechanism is provided in at least part of the periphery of the PIN type photodiode.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: February 21, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Shigekazu Okumura
  • Patent number: 9577137
    Abstract: One aspect of the present invention relates to a photovoltaic cell. In one embodiment, the photovoltaic cell includes a first conductive layer, an N-doped semiconductor layer formed on the first conductive layer, a first silicon layer formed on the N-doped semiconductor layer, a nanocrystalline silicon (nc-Si) layer formed on a first silicon layer, a second silicon layer formed on the nc-Si layer, a P-doped semiconductor layer on the second silicon layer, and a second conductive layer formed on the P-doped semiconductor layer, where one of the first silicon layer and the second silicon layer is formed of amorphous silicon, and the other of the first silicon layer and the second silicon layer formed of polycrystalline silicon.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: February 21, 2017
    Assignee: AU OPTRONICS CORPORATION
    Inventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Kun-Chih Lin
  • Patent number: 9577138
    Abstract: A solar cell is formed to have a silicon semiconductor substrate of a first conductive type; an emitter layer having a second conductive type opposite the first conductive type and formed on a first surface of the silicon semiconductor substrate; a back surface field layer having the first conductive type and formed on a second surface of the silicon semiconductor substrate opposite to the first surface; and wherein the emitter layer includes at least a first shallow doping area and the back surface field layer includes at least a second shallow doping area, and wherein a thickness of the first shallow doping area of the emitter layer is different from a thickness of the second shallow doping area of the back surface field layer.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 21, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Yoonsil Jin, Hyunjung Park, Youngho Choe, Changseo Park
  • Patent number: 9577139
    Abstract: A method for fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a first metal layer on the dielectric region. The method can also include forming a second metal layer on the first metal layer and locally heating a particular region of the second metal layer, where heating includes forming a metal bond between the first and second metal layer and forming a contact between the first metal layer and the solar cell structure. The method can include forming an adhesive layer on the first metal layer and forming a second metal layer on the adhesive layer, where the adhesive layer mechanically couples the second metal layer to the first metal layer and allows for an electrical connection between the second metal layer to the first metal layer.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: February 21, 2017
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Matthieu Moors, Taeseok Kim
  • Patent number: 9577140
    Abstract: Methods for fabricating busbar and finger metallization over TCO are disclosed. Rather than using expensive and relatively resistive silver paste, a high conductivity and relatively low cost copper is used. Methods for enabling the use of copper as busbar and fingers over a TCO are disclosed, providing good adhesion while preventing migration of the copper into the TCO. Also, provisions are made for easy soldering contacts to the copper busbars.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: February 21, 2017
    Inventors: Ashok Sinha, Roman Milter, Robert Broesler
  • Patent number: 9577141
    Abstract: A method for forming contacts on a photovoltaic device includes forming a heterojunction cell including a substrate, a passivation layer and a doped layer and forming a transparent conductor on the cell. A patterned barrier layer is formed on the transparent conductor and has openings therein wherein the transparent conductor is exposed through the openings in the barrier layer. A conductive contact is grown through the openings in the patterned barrier layer by a selective plating process.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: February 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Warren S. Rieutort-Louis
  • Patent number: 9577142
    Abstract: A method to produce a semiconductor laser diode (LD) including a sampled grating (SG) is disclosed. The method prepares various resist patterns each including grating regions and space regions alternately arranged along an optical axis. The grating regions and the space region in respective cavity types have total widths same with the others but the grating regions in respective types has widths different from others. After the formation of the grating patterns based on the resist patterns, only one of the grating patterns is used for subsequent processes.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: February 21, 2017
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Masami Ishiura
  • Patent number: 9577143
    Abstract: A backflow liner in an epitaxial growth system is provided in order to control gas flow and protect the surface of substrates throughout an epitaxial growth cycle. The backflow liner provides critical protection during the warming time prior to substrate pre-treatment, while the growth environment reaches steady state condition between the pre-treatment and the growth process, during pauses between the layer depositions in case of multilayer structure growth, and during the cooling process. The direction of the gas flow through the backflow liner is counter to the deposition gas flows directed from the source end of the growth system. The backflow liner is therefore designed to shape the flow of gases to prevent formation of the vortex-type streams in the growth system that may negatively affect the growth process.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: February 21, 2017
    Assignee: Ostendo Technologies, Inc.
    Inventors: Lisa Shapovalov, Oleg Kovalenkov, Vladimir Ivantsov, Alexander Syrkin
  • Patent number: 9577144
    Abstract: Disclosed is an ultraviolet light-emitting device. The light-emitting device includes: an n-type contact layer including a GaN layer; a p-type contact layer including an AlGaN or AlInGaN layer; and an active region of multiple quantum well structure positioned between the n-type contact layer and the p-type contact layer. In addition, the active region of multiple quantum well structure includes a GaN or InGaN layer with a thickness less than 2 nm, radiating an ultraviolet ray with a peak wavelength of 340 nm to 360 nm.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 21, 2017
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Hyo Shik Choi, Jung Hwan Hwang, Chang Suk Han
  • Patent number: 9577145
    Abstract: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a second electrode layer; a light emitting structure comprising a plurality of compound semiconductor layers under the second electrode layer; at least one dividing groove that divides inner areas of the lower layers of the light emitting structure into a plurality of areas; and a first electrode under the light emitting structure.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: February 21, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hwan Hee Jeong
  • Patent number: 9577146
    Abstract: A light-emitting element comprises: a first semiconductor stack having a first conductivity type; an active layer formed on the first semiconductor stack; a second semiconductor stack having a second conductivity type formed on the active layer; and a first current-spreading layer having the first conductivity type interposed in the second semiconductor stack.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: February 21, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Po Yuan Chen, Wen Ming Tsao, Chih Chun Ke
  • Patent number: 9577147
    Abstract: A light emitting device (LED) package and a manufacturing method thereof are provided. The LED package includes an LED including a first electrode pad and a second electrode pad disposed on one surface thereof; a bonding insulating pattern layer configured to expose the first electrode pad and the second electrode pad; a substrate including a via hole bored from a first surface to a second surface and a wiring metal layer formed on an inner surface of the via hole to extend to a part of the second surface; and a bonding metal pattern layer bonded to the wiring metal layer exposed through the via hole at the first surface of the substrate and also bonded to the first electrode pad and the second electrode pad.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: February 21, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Hyun Lee, Seong Deok Hwang
  • Patent number: 9577148
    Abstract: An n-type GaN layer made of n-type gallium nitride (GaN) is formed on a sapphire substrate. A plurality of island-phased layered structures are formed in random sizes between the n-type GaN layer and a p-type GaN layer that is made of p-type GaN. Each of the layered structures is configured by stacking multiple AlN layers made of aluminum nitride (AlN) and multiple InGaN layers made of indium gallium nitride (InGaN) on an AlN base layer. The respective layered structures emit lights of different wavelengths. This accordingly allows for emission of light in a wider wavelength range.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: February 21, 2017
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Masakazu Sugiyama, Manish Mathew, Yoshiaki Nakano, Hassanet Sodabanlu
  • Patent number: 9577149
    Abstract: The invention relates to a continuous-flow synthesis process for the preparation of high quality indium phosphide/zinc sulfide core/shell semiconduting nanocrystals in particular quantum dots (QD) conducted in a micro-reaction system comprising at least one mixing chamber connected to one reaction chamber.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: February 21, 2017
    Assignee: Quantum Materials Corporation
    Inventors: Huachang Lu, Werner Hoheisel, Leslaw Mleczko, Stephan Nowak
  • Patent number: 9577150
    Abstract: Disclosed are a light emitting device and a light emitting device package. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer, an adhesive layer contacting a top surface of the first conductive semiconductor layer, a first electrode contacting a top surface of the first conductive semiconductor and a top surface of the adhesive layer, and a second electrode contacting the second conductive semiconductor layer, wherein the adhesive layer contacting the first electrode is spaced apart from the second electrode.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: February 21, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Hwan Hee Jeong, Sang Youl Lee, June O. Song, Ji Hyung Moon, Kwang Ki Choi
  • Patent number: 9577151
    Abstract: Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A metal n-contact is connected to the n-type region. A metal p-contact is in direct contact with the p-type region. An interconnect is electrically connected to one of the n-contact and the p-contact. The interconnect is disposed adjacent to the semiconductor structure.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: February 21, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Toni Lopez, Mark Melvin Butterworth, Theodoros Mihopoulos
  • Patent number: 9577152
    Abstract: A light emitting element having; a first and a second conductivity type semiconductor layers, a first and a second electrodes formed on the first and second conductivity type semiconductor layer, the first and the second electrodes being disposed on the same face side of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, in plan view, the first electrode having a first connecting portion, a first extending portion, and two second extending portions, the second electrode having a second connecting portion and two third extending portions, the first extending portion of the first electrode extending linearly from the first connecting portion toward the second connecting portion, and the two second extending portions extending parallel to the first extending portion on two sides of the first extending portion, the two third extending portions of the second electrode extending parallel to the first extending portion between the first extending portion and the two
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: February 21, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Kosuke Sato, Keiji Emura
  • Patent number: 9577153
    Abstract: A light emission device includes: an insulating substrate; a light emitting section including a plurality of LED chips mounted on the insulating substrate; and land electrodes for supplying power to the LED chips. At least a surface of each of the land electrodes is made of a conductive material which is harder than Au and Ag and which has sulfurization resistance to such an extent that secures conduction of each land electrode when a current in a working current range is applied on the land electrode.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: February 21, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Makoto Agatani, Makoto Matsuda
  • Patent number: 9577154
    Abstract: A light emitting chip includes a light emitting unit, a eutectic layer and a surface passivation layer. The eutectic layer has a first surface and a second surface opposite to each other. The light emitting chip connects to the first surface of the eutectic layer. The surface passivation layer covers the second surface of the eutectic layer. A material of the surface passivation layer includes at least a metal of an oxidation potential from ?0.2 volts to ?1.8 volts.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: February 21, 2017
    Assignee: Genesis Photonics Inc.
    Inventors: Yu-Yun Lo, Yi-Fan Li, Chih-Ling Wu, Yi-Ru Huang, Jing-En Huang, Shao-Ying Ting
  • Patent number: 9577155
    Abstract: A light emitting device includes at least one layer below or above a reflective layer to prevent delamination of the reflective layer from a layer below and/or above the reflective layer.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: February 21, 2017
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seok Beom Choi
  • Patent number: 9577156
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device in which the production method is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a production method therefor. The production method comprises steps of forming a first electrode, forming a second electrode, and forming a second electrode side barrier metal layer on the second electrode. Moreover, the second electrode has an electrode layer containing at least one of Ag and Al. In forming the first electrode and the second electrode side barrier metal layer, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited are deposited in the same layered structure.
    Type: Grant
    Filed: September 12, 2015
    Date of Patent: February 21, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventor: Shingo Totani
  • Patent number: 9577157
    Abstract: A light-emitting diode package, including a package body and leads, the package body including a mounting surface, a light-emitting structure disposed on the mounting surface, the light-emitting structure including an active layer disposed between a first conductive-type semiconductor layer and a second conductive-type semiconductor layer, a phosphor layer disposed on the light-emitting structure, and a distributed Bragg reflector disposed between the light-emitting structure and the mounting surface. The distributed Bragg reflector includes a first distributed Bragg reflector and a second distributed Bragg reflector, and an optical thickness of material layers within the first distributed Bragg reflector is greater than an optical thickness of material layers within the second distributed Bragg reflector.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: February 21, 2017
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Sum Geun Lee, Sang Ki Jin, Jin Cheol Shin, Jong Kyu Kim, So Ra Lee, Chung Hoon Lee
  • Patent number: 9577158
    Abstract: A phosphor sheet-forming resin composition uses a low-cost resin material having high light fastness and low visible light absorption and is capable of providing a phosphor sheet at low cost with deterioration of a phosphor due to moisture being suppressed. The phosphor sheet-forming resin composition contains a film-forming resin composition and a powdery phosphor that emits fluorescence when irradiated with excitation light. The film-forming resin composition contains a hydrogenated styrene-based copolymer, and uses a sulfide-based phosphor as the phosphor. Examples of the hydrogenated styrene-based copolymer include hydrogenated products of styrene-ethylene-butylene-styrene block copolymers. CaS:Eu is used as a preferred sulfide-based phosphor.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: February 21, 2017
    Assignee: DEXERIALS CORPORATION
    Inventors: Yasushi Ito, Yoshifumi Ueno, Hirofumi Tani
  • Patent number: 9577159
    Abstract: A fluorescent material-containing sealing resin (20) production method of the present invention includes: a kneading step of kneading a powder mixture (24), which has been obtained by mixing a powder of silicone resins (21) and a powder of fluorescent materials (22) together, while melting the powder mixture (24) by heat, so that a kneaded mixture (25) is obtained; and an extruding step of extruding the kneaded mixture (25) in a form of a cord from an output port (37b) of a twin screw extruder (37).
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: February 21, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masahiro Konishi
  • Patent number: 9577160
    Abstract: A light-emitting device includes a light-emitting element emitting blue light, a green phosphor emitting green light when being excited by the blue light, and a red phosphor emitting red light when being excited by the blue light. An emission spectral peak wavelength of the green light emitted by the green phosphor is greater than or equal to 520 nm and less than or equal to 540 nm.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: February 21, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenichi Yoshimura, Tatsuya Ryohwa, Makoto Izumi, Junichi Kinomoto
  • Patent number: 9577161
    Abstract: The light emitting device includes a light emitting element, a wavelength converter, and a light guider. The light emitting element has an element upper surface, an element lower surface, and an element side surface. The wavelength converter has a converter lower surface. The wavelength is provided to be connected to the light emitting element. The converter lower surface has an exposed region that does not face the element upper surface. The light guider guides light from the light emitting element to the wavelength converter. The light guider covers the element side surface and the exposed region. The wavelength converter includes first and second wavelength converter parts. The first wavelength converter part faces the element upper surface and has a first thickness. The second wavelength converter part does not face the element upper surface and has a second thickness thinner than the first thickness.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 21, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Daisuke Sato, Atsushi Hashizume, Toshiki Nishihama, Shimpei Maeda
  • Patent number: 9577163
    Abstract: The present disclosure provides a light emitting diode package including a substrate, a first electrode and a second electrode located on a first surface of the substrate, a plurality of light emitting diodes (LEDs) located between the first electrode and the second electrode, a plurality of retaining ring located on the first surface of the substrate. The LEDs are surrounded by the retaining ring therein. An encapsulation layer is mounted in the retaining ring and covers the LEDs therein. The encapsulation layer includes a first surface and an side surface extending from edges of the first surface. The side of the encapsulation layer contacts an inner surface of the retaining ring. The present disclosre also provides a method for manufacturing the above light emitting diode package.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: February 21, 2017
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9577164
    Abstract: A semiconductor light emitting device, which can endure a dicing step for singulation, is superior in resistance to a high/low thermal cycle, and exhibits a high light extraction efficiency, and an optical film, which can be used favorably for producing the semiconductor light emitting device, are to be provided.
    Type: Grant
    Filed: September 1, 2014
    Date of Patent: February 21, 2017
    Assignee: ASAHI KASEI E-MATERIALS CORPORATION
    Inventors: Hiroyuki Tsujimoto, Atsushi Suzuki, Junji Kato, Shozo Takada
  • Patent number: 9577165
    Abstract: A light emitting diode chip includes a semiconductor layer sequence having an active layer that generates electromagnetic radiation, wherein the light emitting diode chip has a radiation exit area at a front side, the light emitting diode chip has a mirror layer at least in regions at a rear side situated opposite the radiation exit area, said mirror layer containing silver, a protective layer is arranged on the mirror layer, and the protective layer comprises a transparent conductive oxide.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: February 21, 2017
    Assignee: OSRAM Opto Semiconductor GmbH
    Inventors: Korbinian Perzlmaier, Kai Gehrke, Robert Walter, Karl Engl, Guido Weiss, Markus Maute, Stefanie Rammelsberger
  • Patent number: 9577166
    Abstract: Provided are a light emitting device package and a lighting system including the light emitting device package. The light emitting device package includes a package body, at least one electrode on the package body, a light emitting device on the package body, a reflective structure around the light emitting device on the package body and a lens on the light emitting device and the electrode.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 21, 2017
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yon Tae Moon, Yun Soo Song, Kwang Kyu Choi
  • Patent number: 9577167
    Abstract: A semiconductor light emitting device including a plurality of light emitting elements can be miniaturized while enabling to emit light with high luminance. The semiconductor light emitting device can include a mounting substrate, and a plurality of semiconductor light emitting elements mounted on the mounting substrate side by side, each of the semiconductor light emitting elements having a semiconductor structure layer that can include a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type opposite to the first conductivity type, which are layered in that order. Each of the semiconductor light emitting elements can have a resonator constituted by end surfaces of the semiconductor structure layer opposite to each other, and also has a recessed portion recessed from the surface of the second semiconductor layer toward the active layer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: February 21, 2017
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventor: Tatsuma Saito
  • Patent number: 9577168
    Abstract: Solid state lighting (SSL) devices and methods of manufacturing such devices. One embodiment of an SSL device comprises a support and an emitter array having a plurality of SSL emitters carried by the support. The emitter array has a central region and a peripheral region outward from the central region. Individual SSL emitters in both the central and the peripheral regions have a primary emission direction along which an intensity of light from the SSL emitters is highest, and the primary emission direction of the SSL emitters in the central region is at least substantially the same direction as the primary emission direction of the SSL emitters in the peripheral region. Additionally, a first coverage area ratio of the SSL emitters in the central region is different than a second coverage area ratio of the SSL emitters in the peripheral region.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: February 21, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Zhang Xin