Abstract: A nonvolatile memory cell includes a semiconductor substrate, a first OD region, a second OD region, an isolation region separating the first OD region from the second OD region, a PMOS select transistor disposed on the first OD region, and a PMOS floating gate transistor serially connected to the select transistor and disposed on the first OD region. The PMOS floating gate transistor includes a floating gate overlying the first OD region. A memory P well is disposed in the semiconductor substrate. A memory N well is disposed in the memory P well. The memory P well overlaps with the first OD region and the second OD region. The memory P well has a junction depth that is deeper than a trench depth of the isolation region. The memory N well has a junction depth that is shallower than the trench depth of the isolation region.

Abstract: A high speed voltage mode sensing is provided for a digital multibit non-volatile memory integrated system. An embodiment has a local source follower stage followed by a high speed common source stage. Another embodiment has a local source follower stage followed by a high speed source follower stage. Another embodiment has a common source stage followed by a source follower. An auto zeroing scheme is used. A capacitor sensing scheme is used. Multilevel parallel operation is described.

Abstract: A method of operating a memory system includes storing data received from an external device in a buffer memory of the memory system, programming the data stored in the buffer memory to a first storage area of a nonvolatile memory of the memory system in response to a mode of the memory system being in a guarantee mode and to a second storage area of the nonvolatile memory in response to the mode of the memory system being in other than the guarantee mode, and programming the data stored in the first storage area to the second storage area during an idle time.

Abstract: According to one embodiment, the semiconductor memory device includes a first memory cell and a word line. The first memory cell is capable of storing two or more bits of data. The word line is coupled with the first memory cell. a write operation repeat a program loop. The program loop includes a program operation and a verification operation. A program voltage is applied to the word line in the program operation. The write operation includes a first program loop and a second program loop subsequent to the first program loop. Program voltage is applied a first number of times in the first program loop. Program voltage is applied a second number of times in the second program loop. The second number of times is larger than the first number of times.

Abstract: Provided herein is a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array, peripheral circuits, and a control logic. The memory cell array may include memory cells grouped into a plurality of pages. The peripheral circuits may perform a program operation for the plurality of pages. The control logic may control the peripheral circuits to perform the program operation by applying program voltages gradually increasing by a first step voltage to a selected page of the plurality of pages and by applying pass voltages gradually increasing by second step voltages to unselected pages of the plurality of pages. The second step voltages may vary depending on a position of the memory cells of the unselected pages in the memory cell array.

Abstract: When a control circuit has received a first erase command, the control circuit controls performing a first pre-write process to allow a first storage device and a second storage device to have threshold voltages, respectively, both increased, and the control circuit thereafter controls performing an erase process to allow the first storage device and the second storage device to have their respective threshold voltages both decreased to be smaller than a prescribed erase verify level. When the control circuit has received a second erase command, the control circuit controls performing a second pre-write process to allow one of the first storage device and the second storage device to have its threshold voltage increased, and control circuit subsequently controls performing the erase process.

Abstract: A data storage device includes a nonvolatile memory device including: memory cells of a first area grouped by page, and memory cells of a second area respectively corresponding to pages, and suitable for storing information representing whether each page of the first area is in an erased state; and a controller suitable for providing the nonvolatile memory device with a search command for searching an erased page and a search address of a page, wherein the nonvolatile memory device provides the controller with a state of at least one memory cell of the second area corresponding to the search address in response to the search command.

Abstract: A semiconductor memory device according to an embodiment comprises: a memory cell array, the memory cell array including a memory block, the memory block including a memory cell, the memory cell including a semiconductor layer, a conductive layer, and a charge accumulation layer, the charge accumulation layer being disposed between the semiconductor layer and the conductive layer; and a control circuit that executes an access operation on the memory cell, the control circuit, triggered by the access operation, detecting a leak current of the conductive layer, and when the leak current is a certain value or more, executing a faulty memory block processing that registers as an access-prohibited region the memory block including the conductive layer.

Abstract: Systems and methods are described for reading a storage element of a memory. In a particular embodiment, a method, in a data storage device including a controller and a non-volatile memory, where the non-volatile memory includes a plurality of storage elements, includes performing multiple read operations at a storage element of the non-volatile memory. Each read operation of the multiple read operations is performed using the same reading voltage. The method further includes determining a read value of the storage element based on the multiple read operations.

Abstract: A low-dropout regulator includes an error amplifier to provide a control signal, a first transistor, and a second transistor. The first transistor receives the control signal and has a source-drain path electrically coupled between a supply voltage node and a load, the first transistor to power the load in response to a voltage on the supply voltage node rising above an absolute value of a threshold voltage of the first transistor. The second transistor has a source-drain path electrically coupled between the supply voltage node and the load, the second transistor to receive the control signal in response to the voltage on the supply voltage node rising above a particular voltage.

Abstract: In a semiconductor device, the reset command input process may be executed by a simple method and circuit in a short period of time when a reset command is inputted compared to conventional art. A control circuit for the semiconductor device is adapted to control a clock generator for generating a system clock having a changeable frequency, wherein, in a normal operating mode of the semiconductor device, the control circuit changes the frequency of the system clock generated by the clock generator from a first frequency to a second frequency that is higher than the first frequency according to a reset command, and performs an interrupt process on the semiconductor device, so as to enter a reset sequence mode from the normal operating mode.

Abstract: Techniques are provided for preventing program disturb when programming a memory device. Hot electron injection program disturb is prevented or reduced. Voltage boosting of the NAND channel of a program inhibited NAND string may be controlled in a manner to reduce or eliminate a lateral electric field that could possibly accelerate electrons in the NAND channel. If the electrons gain enough energy due to the lateral electric field, they could potentially be injected into the charge storage region of a memory cell, thereby causing program disturb. Thus, the voltage boosting can prevent or reduce injection of hot electrons from the NAND channel to a charge storage region of a NAND memory cell during a programming operation, thereby preventing or reducing program disturb.

Abstract: A semiconductor memory device includes word lines, bit lines, and memory cells at intersections of the word lines and the bit lines. A driver is configured to a voltage to a selected word line. A sense amplifier is configured to detect data of the memory cells. A controller is configured to control the driver and the sense amplifier. A writing sequence of writing data to a selected memory cell connected to the selected word line includes a plurality of writing loops including a write operation and a verify operation. The controller is configured to perform the write operation on the selected memory cell a predetermined number of times corresponding to write data to be written to the selected memory cell, without the verify operation, after a threshold voltage of the selected memory cell connected to the selected word line reaches a first level.

Abstract: A one-time memory control apparatus is obtained that prevents erroneous opening of a fuse from causing logic conversion and enhances the reliability. The one-time memory control apparatus includes an opening current creation fuse C opening switch and an opening current creation fuse D opening switch that each allow a fuse opening current from a fuse opening current creation circuit to flow in response to an opening enable signal, and a fuse opening permission signal creation circuit that receives respective logic signals corresponding to the states of fuse opening currents that flow through an opening current creation fuse C and an opening current creation fuse D, and that creates a fuse opening permission signal.

Abstract: The present disclosure relates to the technical field of communication. There is provided a shift register unit and a gate driving circuit for decreasing noise interferences, enhancing stability of the shift register unit, and at the same reducing the size of the shift register unit.

Abstract: A system avoids false sampling due to reflections from previous commands or other noise on a data strobe line. The system uses a normalizer circuit or leaker circuit, and the data strobe line is not optimally terminated or is unterminated. The data strobe line is to receive a burst of data sample pulses or edges and sample a data line based on the edges. The receiving device includes logic that generates a count triggered from an initial edge on the data strobe line, and identifies, based on the count, an initial valid edge of the burst. Any false strobes due to noise or reflections that are received prior to the actual burst can be rejected.

Abstract: An apparatus includes an output driver circuit and a trimming circuit. The output driver circuit may be configured to (i) receive an input signal and a first control signal and (ii) generate an output signal. The output signal may be a delayed version of the input signal. A length of delay between the input signal and the output signal is determined in response to the first control signal. The trimming circuit may be configured to generate the first control signal in response to a second control signal. The trimming circuit is generally enabled to vary a value of the first control signal to minimize a phase difference between the output signal and an output clock signal.

Abstract: A system-on-chip (SOC) (10) is interfaced with a memory (20) formed by a plurality of stacked memory integrated circuit dies (20a-20n). The SOC (10) includes a memory controller (100) that has a built-in self-test (BIST) system (1000) for performing the testing and repair of memory (20). BIST system (1000) includes a microcode processor (1130) that communicates externally to the SOC (10) through a Joint Test Action Group interface (120) and is coupled to a BIST state machine (1140) for executing a memory specific test sequence to detect faults in memory (20). The microcode processor (1130) further communicates with a repair state machine (1150) to execute memory specific repair procedures responsive to memory faults being detected.

Abstract: Aspects of the present disclosure involve insertion of power domain aware memory testing logic into integrated circuit designs to enable efficient testing of the memories embedded therein. In example embodiments, each power domain of the integrated circuit, and the memories included therein, are associated with dedicated test data register (TDR) set and instruction set. Each instruction set causes memory test logic circuitry in the integrated circuit to test the memories included in the corresponding power domain in parallel. Once testing of memories within a particular power domain is over, the test circuitry tests memories belonging to another power domain in parallel, and so on.

Abstract: A memory system includes: a memory device including a plurality of blocks each block including a plurality of pages, suitable for performing an operation in response to a command and an address; and a controller suitable for determining whether a block in which a read fail has occurred is an open block including an unprogrammed page, performing a restoration operation for the unprogrammed page of the open block based on at least one of operation temperature information and a read count, when it is determined that the block in which the read fail has occurred is the open block, and generating the command for performing a read retry operation.

Abstract: A method of testing a microelectronic package configured to provide memory access can include energizing terminals of the microelectronic package, the terminals including first terminals configured to carry address information and second terminals configured to carry data signals. The method can also include applying read and write test data signals simultaneously to the first and second sets of second terminals, so as to simultaneously test read and write operation in first and second microelectronic elements of the microelectronic package. The first and second microelectronic elements can be configured to provide access to memory storage array locations in the first and second microelectronic elements. The terminals can also include third terminals configured to receive a test mode input that reconfigures the first and second microelectronic elements to permit simultaneous access to memory storage array locations in the first and second microelectronic elements.

Abstract: Nuclear reactor systems and methods are described having many unique features tailored to address the special conditions and needs of emerging markets. The fast neutron spectrum nuclear reactor system may include a reactor having a reactor tank. A reactor core may be located within the reactor tank. The reactor core may include a fuel column of metal or cermet fuel using liquid sodium as a heat transfer medium. A pump may circulate the liquid sodium through a heat exchanger. The system may include a balance of plant with no nuclear safety function. The reactor may be modular, and may produce approximately 100 MWe.

Abstract: A controller for producing a nuclear reactor shutdown system trip signal in response to at least one detector signal. The controller includes a signal conditioning module receiving the at least one detector signal and outputting a measured flux signal. A rate module generates a rate signal from the measured flux signal. A comparator circuit compares the rate signal to a trip setpoint and generates a first trip signal.

Abstract: Provided are a probe and an apparatus for measuring a thickness of an oxide layer of a fuel rod, capable of testing claddings of inner and outer fuel rods of a nuclear fuel assembly without disassembling the nuclear fuel assembly. The probe includes a fuel rod transfer region on which an eddy current sensor capable of continuously testing claddings of outer fuel rods of a fixed nuclear fuel assembly is mounted. Further, the apparatus includes a frame in which a cylinder driven in upward and downward directions is mounted, a first probe connected to one side of the cylinder in order to test claddings of outer fuel rods of a nuclear fuel assembly, and a second probe connected to the other side of the cylinder in order to test claddings of inner fuel rods of the nuclear fuel assembly.

Abstract: An apparatus for cooling a spent fuel pool having a heat exchanger includes a cooling water pool positioned above the spent fuel pool; a floating device configured to be elevated according to a water level of a cooling water in the spent fuel pool; and an emergency cooling water supply pipe configured to form a path through which the cooling water of the cooling water pool is moved to the spent fuel pool and configured to include a floating valve that opens or closes a flow passage of the cooling water in connection with the elevation of the floating device.

Abstract: A screen made of radiation shielding material for protecting an operator from ionizing radiation, includes: (i) a lower part equipped with a front wall made of radiation shielding material, having an upper border; (ii) an upper part equipped with a front wall made of a radiation shielding material, at least one part of which is transparent, which front wall includes a lower border; and (iii) at least one passage for the arms of the operator. The front walls of the upper part and of the lower part are separable from each other, the upper part being borne by supporting elements allowing the screen to be reversibly maneuvered either into an active radiation shielding position in which the upper and lower borders are juxtaposed, or into a retracted position in which the upper and lower borders are separated from each other, in order to free a space above the lower part.

Abstract: A pliable multilayer blanket configured as a particle radiation shield, the blanket including multiple layers. A first layer of the multiple layers is composed of a first material and a second layer of the multiple layers is composed of a second material, different from the first material, each layer being less than 20 mils thick. At least one of the first material and the second material is a metal or metal alloy having an atomic number (Z) of at least 29.

Abstract: A fuel storage system for storing and drying nuclear fuel rods includes a vertically oriented capsule defining an internal cavity. A plurality of fuel rod storage tubes is disposed in the cavity. In one embodiment, each storage tube has a transverse cross section configured and dimensioned to hold no more than one fuel rod. Intact or damaged fuel rods may be stored in the storage tubes. After the fuel rods are loaded into the capsule, a lid is attached to a previously open top end of the capsule. In one embodiment, the lid may be sealed welded to the capsule for forming a gas tight enclosure. The interior of the capsule and multiple fuel rods contained therein may be dried together simultaneously via flow conduits formed in the lid that can be fluidly connected to a suitable drying process such as a forced gas dehydration system.

Abstract: A solid state electrical generator that is responsive to a relatively low level radiation field to power emergency equipment in a nuclear powered generating facility. The electricity is generated from materials, that are not initially radioactive, that are able to produce electrical power when placed inside a relatively low neutron and/or gamma radiation field and will essentially breed material to enhance the power produced by the device sufficiently to allow the device to provide sufficient power to the emergency equipment, even though the reactor or other source of neutron and/or gamma radiation has shut down.

Abstract: A compound x-ray lens and method of fabricating these lenses are disclosed. These compound lenses use multiple zone plate stacking to achieve a pitch frequency increase for the resulting combined zone plate. The compound equivalent zone plate includes a first zone plate having an initial pitch frequency stacked onto a second zone plate to form an equivalent compound zone plate. The equivalent zone plate has a pitch frequency that is at least twice the initial pitch frequency. Also, in one example, the equivalent zone plate has a mark-to-space ratio of 1:1.

Abstract: X-ray diffraction apparatus includes a flat graded multilayer 8 which may be used in a SAXS configuration for a sample 6. The apparatus may be adapted for Bragg-Brentano measurements by a collimator 16 without the need for alternate beam paths or complex arrangements.

Abstract: The invention relates to a grating arrangement and a method for spectral filtering of an X-ray beam (B), the grating arrangement comprising: a dispersive element (10) comprising a prism configured to diffract the X-ray beam (B) into a first beam component (BC1) comprising a first direction (D1) and a second beam component comprising (BC2) a second direction (D2), tilted with respect to the first direction; a first grating (20) configured to generate a first diffraction pattern (DP1) of the first beam component (BC1) and a second diffraction pattern (DP2) of the second beam component (BC2), the second diffraction pattern (DP2) shifted with respect to the first diffraction patter (DP1); and a second grating (30) comprising at least one opening (31) which is aligned along a line (d) from a maximum (MA) to a minimum (MI) of intensity of the first diffraction pattern (DP1) or of the second diffraction pattern (DP2).

Abstract: The present invention provides a single-layer multi-point touch-control conductive film and a method for producing the same.

Abstract: The present disclosure relates to an aluminum electrode, a method of forming an aluminum electrode and an electronic device therewith. An aluminum electrode according to one aspect of the present disclosure comprises: a bottom layer consisting of molybdenum; a top layer consisting of molybdenum; and an aluminum layer located between the bottom layer and the top layer, wherein the bottom layer, the top layer and the aluminum layer are formed at a temperature below 120° C. An aluminum electrode according to one embodiment of the present disclosure eliminates the mouse bite phenomenon. An aluminum electrode according to another aspect of the present disclosure comprises: a bottom layer consisting of a metal or metal-alloy nitride; a top layer consisting of molybdenum; and an aluminum layer located between the bottom layer and the top layer, wherein the bottom layer, the top layer and the aluminum layer are formed at a temperature below 120° C.

Abstract: The present invention relates to an electroconductive polymer dispersion liquid characterized in containing a ?-conjugated electrically conductive polymer, a polyanion, a compound represented by the following chemical formula (1), and a dispersion medium. In accordance with the present invention, an electroconductive polymer dispersion liquid capable of readily forming an electroconductive coating having excellent electrical conductivity, heat resistance, moist-heat resistance, and substrate adhesion property can be provided. [Chemical formula 1] CH2?C(R1)—CO—NH—R2—O—CO—NH—R3—Si(OR4)3??(1) In chemical formula (1), R1 represents a hydrogen atom or a methyl group, R2 and R3 each independently represent an arbitrary substituent group, and R4 represents a methyl group or an ethyl group.

Abstract: A process for the production of a composition comprising one or more conductive nano-filler(s), one or more polyarylethersulphone thermoplastic polymer(s) (A), one or more uncured thermoset resin precursor(s) (P), and optionally one or more curing agent(s) therefor, wherein said process comprises mixing or dispersing a first composition comprising one or more conductive nano-filler(s) and one or more polyarylethersulphone thermoplastic polymer(s) (A) with or into one or more uncured thermoset resin precursor(s) (P), and optionally one or more curing agent(s) therefor.

Abstract: The present invention relates to a silver paste composition for forming an electrode, and a silicon solar cell using the same. More particularly, the present invention relates to a silver paste composition for forming an electrode, which includes carbon black having specific parameter characteristics to improve rheological properties of the paste and printability, thereby achieving a high aspect ratio and improving electrical characteristics, and a silicon solar cell using the same.

Abstract: A crosslinked resin compound includes a resin compound including 0.1 to 20 parts by mass of one material selected from the group consisting of monomer having an epoxy group, acid anhydride and silane coupling agent with respect to 100 parts by mass of ethylene-based copolymer, and the resin compound is crosslinked.

Abstract: A cable apparatus and method for preventing discoloration to a cable is disclosed. The apparatus includes a conductor. An exterior layer surrounds the conductor. A thin film material is removably positioned over an exterior surface of the exterior layer. At least one film removal area is positioned within the thin film material, wherein the at least one film removal area is positioned along a length of the exterior layer.

Abstract: An electric wire includes a conductor having a cross-sectional area of not less than 135 mm2 and not more than 165 mm2, an insulation provided so as to cover the outer periphery of the conductor, and a wire sheath provided so as to cover the outer periphery of the insulation. The amount of deflection is not less than 250 mm when, at 23° C., one end of the electric wire is fixed to a fixture table so that another end horizontally protrudes 400 mm from the fixture table and a weight of 2 kg is attached to the other end, and cracks and breaks do not occur when wound with a bending diameter of three times the diameter at ?40° C.

Abstract: A cable with a molded resin includes a cable including an electric wire and a sheath covering the electric wire, the electric wire including a central conductor and an insulation covering the central conductor, and a molded resin covering a part of the electric wire protruding from the sheath in a longitudinal direction thereof, the molded resin being apart from the sheath. The electric wire is bent at not less than one bent part in the molded resin.

Abstract: A bundle of cables includes at least two underwater cables and a fastener for fastening the underwater cables together. The fastener is water-soluble, biologically decomposable and/or chemically decomposable. A method of laying at least two underwater cables simultaneously from a vessel and a method of using a water-soluble, biologically decomposable and/or chemically decomposable fastener to fasten at least two underwater cables together to form a bundle of cables are also described.

Abstract: Disclosed is a ceramic laminate sheet comprising a ceramic sheet having a plurality of cracks and a polymer resin layer disposed on one side or both sides of the ceramic sheet, wherein the plurality of cracks pass through the ceramic sheet from one side to the other side thereof, the cracks divide the ceramic sheet into a plurality of pieces, grooves for formation of the cracks are not provided in one side and the other side of the ceramic sheet.

Abstract: A method for producing a sintered rare-earth magnet characterized by sintering a raw material that includes a ribbon-shaped polycrystalline phase with an average grain size of 10 to 200 nm fabricated by rapid solidification of an alloy melt having a rare-earth magnet composition, and a low-melting point phase formed on the surface of the polycrystalline phase and having a melting point lower than the polycrystalline phase.

Abstract: A ferromagnetic powder composition is provided comprising soft magnetic iron-based core particles having an apparent density of 3.2-3.7 g/ml, and wherein the surface of the core particles is provided with a phosphorus-based inorganic insulating layer and at least one metal-organic layer, located outside the first phosphorus-based inorganic insulating layer. A process further is provided for producing the composition and a method for the manufacturing of soft magnetic composite components prepared from the composition, as well as the obtained component.

Abstract: A transformer in which the high-voltage and low-voltage coils are easily laminated when they are alternately laminated in their axial directions, improving power efficiency. The transformer includes: a high-voltage coil including a wire wound around a cylindrical winding drum of a bobbin which is provided with flanges on both ends of the winding drum; a low-voltage coil formed of a flat plate member having an open ring shape, the low-voltage and high-voltage coils being alternately laminated in their axial directions; and a cover member which has a ring plate shape and is coaxially laminated on an outside of a laminate in an axial direction. The low-voltage coil is between the high-voltage coil and the cover member, and a wall portion protruding in the axial direction from the bobbin of the high-voltage coil and a wall portion protruding in the axial direction of the cover member are alternately disposed.

Abstract: A high temperature superconducting (HTS) magnet coil disposed within a cryostat is configured with a thermo-siphon cooling system containing a liquid cryogen. The cooling system is configured to indirectly conduction cool the HTS magnet coil by nucleate boiling of the liquid cryogen that is circulated by the thermo-siphon in a cooling tube attached to a heat exchanger bonded to the outside surface of the HTS magnet coil. A supply dewar is configured with a re-condenser cryocooler coldhead to recondense boiloff vapors generated during the nucleate boiling process.

Abstract: A DC reactor consisting of a coil formed of a superconducting material is provided. It is possible to reduce leakage reactance and to increase critical current by using a coil formed of a high temperature superconducting material and forming a first bobbin of the DC reactor as a toroid shape.

Abstract: A cryogenic coil assembly including a coil substrate with a flat surface, and a number of radial channels cut into a region of the flat surface. The cryogenic coil assembly also includes a spiral coil covering the radial channels, and a chemical bonding agent for bonding the spiral coil to the coil substrate. The chemical bonding agent is present within the radial channels.

Abstract: Systems and methods for controlling a solenoid may include measuring a current flowing through a solenoid, and detecting characteristics of the current flowing through the solenoid. The characteristics may be used to determine a state of the solenoid. Characteristics of the current comprise may include local extrema of the current, rate of change of the current, and/or discrete values of the current. The solenoid may comprise a bistable device.