Abstract: An electrical contact structure (10) for a semiconductor component (100) is specified, comprising a transparent electrically conductive contact layer (1), on which a first metallic contact layer (2) is applied, a second metallic contact layer (3), which completely covers the first metallic contact layer (2), and a separating layer (4), which is arranged between the transparent electrically conductive contact layer (1) and the second metallic contact layer (3) and which separates the second metallic contact layer (3) from the transparent electrically conductive contact layer (1). Furthermore, a semiconductor component (100) comprising a contact structure (10) is specified.

Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes a semiconductor layer sequence having a bottom face and a top face, wherein the semiconductor layer sequence comprises a first layer of a first conductivity type, an active layer for generating electromagnetic radiation, and a second layer of a second conductivity type and a bottom contact element located at the bottom face and a top contact element located at the top face for injecting current into the semiconductor layer sequence. The chip further includes a current distribution element located at the bottom face, the current distribution element distributes current along the bottom face during operation and a plurality of vias extending from the current distribution element through the first layer and through the active layer into the semiconductor layer sequence, wherein the vias are not in direct electrical contact with the active layer.

Abstract: Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.

Abstract: Exemplary embodiments provide a light emitting diode that includes: at least one lower electrode providing a passage for electric current; a light emitting structure placed over the at least one lower electrode to be electrically connected to the lower electrode, the light emitting structure is disposed to form at least one via-hole; a reflective electrode layer placed between the at least one lower electrode and the light emitting structure; and an electrode pattern formed around the light emitting structure and electrically connecting the lower electrode to the light emitting structure through the via-hole.

Abstract: A light-emitting diode is provided to include: a transparent substrate having a first surface, a second surface, and a side surface; a first conductive semiconductor layer positioned on the first surface of the transparent substrate; a second conductive semiconductor layer positioned on the first conductive semiconductor layer; an active layer positioned between the first conductive semiconductor layer and the second conductive semiconductor layer; a first pad electrically connected to the first conductive semiconductor layer; and a second pad electrically connected to the second conductive semiconductor layer, wherein the transparent substrate is configured to discharge light generated by the active layer through the second surface of the transparent substrate, and the light-emitting diode has a beam angle of at least 140 degrees or more. Accordingly, a light-emitting diode suitable for a backlight unit or a surface lighting apparatus can be provided.

Abstract: The invention provides ultraviolet (UV) light-emitting diodes (LEDs). The UV LEDs can comprise abase layer including p-type SiC or p-type AlGaN, an active layer, and an n-AlGaN layer, wherein the active layer is disposed between the base layer and the n-AlGaN layer. In some embodiments, the absorption losses in p-SiC can be decreased or prevented by incorporating a conductive AlGaN Distributed Bragg Reflector (DBR) between the p-type SiC layer and the active layer. In some embodiments, the n-AlGaN layer can be textured to increase the extraction efficiency (EE). In some embodiments, the external quantum efficiency of the LEDs can be 20-30% or more.

Abstract: A manufacturing method of a light-emitting device is disclosed. The method includes: providing a semiconductor wafer, including a substrate having a first surface and a second surface opposite to the first surface; and a semiconductor stack on the first surface; removing a portion of the semiconductor stack to form an exposed region; forming a first reflective structure on the exposed region; and providing a radiation on the second surface corresponding to a position of the first reflective structure.

Abstract: An LED package structure includes a conductive frame assembly, a reflective housing, an UV LED chip disposed on the conductive frame assembly, and a die-attach adhesive for bonding the UV LED chip to the conductive frame assembly. The reflective housing includes Silicone Molding Compound (SMC) and filler mixed in the SMC. The energy gap of the filler is greater than or equal to 4 eV. The energy gap of the filler thereof can be chosen by the following formulas. When the refractive index difference between the filler and the SMC is less than or equal to 0.2, the energy gap of the filler is satisfied the following formula. E?1240 (nm·eV)/(??150(nm)). When the refractive index difference between the filler and the SMC is greater than 0.2, the energy gap of the filler is satisfied the following formula. E?1240(nm·eV)/(??50(nm)).

Abstract: A light emitting device includes a base body, a light emitting element and a sealing member. The base body includes a base material and a pair of connection terminals on at least a first main surface of the base material. The light emitting element is connected to the connection terminals. The sealing member seals the light emitting element. The sealing member includes a light transmissive member disposed on an upper surface of the light emitting element, and a light shielding member sealing an end surface of the light emitting element and an end surface of the light transmissive member. The base material has a linear expansion coefficient within ±10 ppm/° C. of a linear expansion coefficient of the light emitting element.

Abstract: An optoelectronic semiconductor component is disclosed. In an embodiment, the semiconductor component includes at least one optoelectronic semiconductor chip for generating primary radiation in a near-ultraviolet or in a visible spectral range, at least one phosphor for partial or complete conversion of the primary radiation into a longer-waved secondary radiation which is in the visible spectral range and at least one filter substance for partial absorption of the secondary radiation, wherein the phosphor and the filter substance are closely connected to the semiconductor chip.

Abstract: A chip-scale packaging (CSP) LED device, comprising an LED semiconductor die and a packaging structure, is disclosed. The LED semiconductor die is encapsulated by the packaging structure, wherein the lower surface of the packaging structure has a recessed space underneath. A manufacturing method of the CPS LED device is also disclosed.

Abstract: The present application relates to a light-emitting film, a method of manufacturing the same, a lighting device and a display device. The present application may provide a light-emitting film capable of providing a lighting device having excellent color purity and efficiency and an excellent color characteristic. The characteristics of the light-emitting film of the present application may be stably and excellently maintained for a long time. The light-emitting film of the present application may be used for various uses including photovoltaic applications, an optical filter or an optical converter, as well as various lighting devices.

Abstract: There is proposed an illuminating device, comprising (a) a luminous element, (b) a support, and (c) a primary optical element, characterized in that (i) said luminous element (a) is present on the support (b), and (ii) said primary optical element (c) is arranged on the composite of luminous element (a) and support (b) in such a way that it takes up, directs and emits the radiation emerging from the luminous element in the desired light distribution, wherein (iii) said primary optical element (c) is fabricated from a high refractive index glass and (iv) attached to the support by direct bonding.

Abstract: A method for manufacturing a light-emitting device includes providing a soluble member to cover at least one lateral surface of a light-emitting element. The soluble member includes a material soluble in a first solvent. A light-shielding member is provided to cover at least one lateral surface of the soluble member. The light-shielding member includes a light-shielding resin less soluble in the first solvent than the soluble member. The soluble member is removed with the first solvent. A first light-transmissive member is provided in a space formed by removing the soluble member.

Abstract: An embodiment comprises: a substrate having a chip mounting region; first and second wiring layers disposed on the substrate around the chip mounting region so as to be spaced apart from each other; and a plurality of light emitting chips disposed on the chip mounting region, wherein the first wiring layer comprises a first wiring pattern disposed at one side of a reference line and having a first concave part, and a first extending pattern extending from the first wiring pattern to the other side of the reference line, the second wiring layer comprises a second wiring pattern disposed at the other side of the reference line and having a second concave part, and a second extending pattern extending from the second wiring pattern to one side of the reference line, and the reference line is a straight line passing through the center of the chip mounting region.

Abstract: An optoelectronic component includes a carrier strip and an optoelectronic semiconductor chip, a first electrical connection surface formed on a front side of the chip and a second electrical connection surface is formed on a rear side of the chip, first and second electrically conductive contact regions are formed on the strip, the first region is arranged on a folding section of the strip, the rear side of the chip faces toward an upper side of the strip, the upper side faces toward the front side of the chip, the first electrical connection surface electrically conductively connects to the first region, the second electrical connection surface electrically conductively connects to the second region by a second connecting material, the strip has a second through-opening that lies next to the second region, and the second connecting material extends through the second contact opening to a lower side of the strip.

Abstract: Provided is an LED package which is unlikely to cause the attenuation of emitted light from an LED element by bonding wires for electrical connection of the LED element. The LED package includes a board including a pair of connection electrodes formed thereon, an LED element mounted on the board, a bonding wire electrically connecting the LED element to the pair of connection electrodes, and a covering layer containing a phosphor and covering the bonding wire, wherein the phosphor is excited by emitted light from the LED element to emit light having an absorbance in the bonding wire lower than that of the emitted light and a wavelength longer than that of the emitted light.

Abstract: Disclosed herein are technologies for forming a plurality of known good die (KGD)-light emitting diode (LED) components into a larger size optically coherent LED chips or devices.

Abstract: A package includes a first electrode, a second electrode, a wall, and a flange. The polarity of the second electrode is different from that of the first electrode, and at least one of the first electrode and the second electrode has an outer lead component that has a recess formed at a distal end. The wall fixes the first electrode and the second electrode, constitutes a side wall of a bottomed concave component in which at least part of a bottom surface of the bottomed concave component is constituted by the first electrode and the second electrode, and has the outer lead component protruded therefrom. The flange protrudes outward from the wall, and is provided with the same thickness as the outer lead component, on two sides of the outer lead component in plan view where the recess is not formed.

Abstract: Dices of integrated Z-device structures on a substrate wafer of a 3D integrated thermo-electric generator (iTEG) may be stacked in a tri-dimensional heterogeneous integration mode, without or with interposer wafer dices, in coherent thermal coupling among them. Through silicon vias (TSVs) holes through the thickness of the semiconductor crystal of substrate of the dices of integrated Z-device structures in geometrical projection correspondence with valley bottom metal junction contacts, and through silicon vias (TSVs) holes through the thickness of the semiconductor crystal of interposer dices, in geometrical projection correspondence with the hill-top metal junction contacts of the coupled Z-device structures, have a copper or other good heat conductor filler, form low thermal resistance heat conduction paths through the stacked Z-device structures. Thermoelectrically generated current is gathered from every integrated Z-device of a multi-tier iTEG operating in an out-of-plane heat flux configuration.

Abstract: A thermoelectric energy harvesting device including a first thermal-coupling interface, a second thermal-coupling interface, and a membrane. The membrane arranged between the first thermal-coupling interface and the second thermal-coupling interface and connected to the first thermal-coupling interface by a supporting frame. A thermal bridge between the second thermal-coupling interface and a thermal-coupling portion of the membrane. A thermoelectric converter on the membrane configured to supply an electrical quantity as a function of a temperature difference between the thermal-coupling portion of the membrane and the supporting frame.

Abstract: An electronic device and control method thereof are provided. The electronic device includes a first layer disposed on a surface of the electronic device and configured to be touched or gripped by a user and to generate a signal corresponding to a touch or grip area of the user, a second layer disposed on the first layer and configured to have a surface of the second layer deformed, and a processor configured to detect a user's touch or grip based on the generated signal, and control the second layer to deform a surface of the second layer to have a protrusion pattern on the touch or grip area of the second layer based on the generated signal.

Abstract: In a method of manufacturing a piezoelectric device, during an isolation formation step, a supporting substrate has a piezoelectric thin film formed on its front with a compressive stress film present on its back. The compressive stress film compresses the surface on a piezoelectric single crystal substrate side of the supporting substrate, and the piezoelectric thin film compresses the back of the supporting substrate, which is opposite to the surface on the piezoelectric single crystal substrate side. Thus, the compressive stress produced by the compressive stress film and that produced by the piezoelectric thin film are balanced in the supporting substrate, which causes the supporting substrate to be free of warpage and remain flat. A driving force that induces isolation in the isolation formation step is gasification of the implanted ionized element rather than the compressive stress to the isolation plane produced by the piezoelectric thin film.

Abstract: An electronic device includes a semiconductor memory, wherein the semiconductor memory includes a variable resistance element formed over a substrate, and a multi-layer passivation layer positioned over sidewalls of the variable resistance element and having two or more insulating layers formed over the sidewalls of the variable resistance element.

Abstract: Embodiments of the present disclosure describe configurations and techniques to increase interfacial anisotropy of magnetic tunnel junctions. In embodiments, a magnetic tunnel junction may include a cap layer, a tunnel barrier, and a magnetic layer disposed between the cap layer and the tunnel barrier. A buffer layer may, in some embodiments, be disposed between the magnetic layer and a selected one of the cap layer or the tunnel barrier. In such embodiments, the interfacial anisotropy of the buffer layer and the selected one of the cap layer or the tunnel barrier may be greater than an interfacial anisotropy of the magnetic layer and the selected one of the cap layer or the tunnel barrier. Other embodiments may be described and/or claimed.

Abstract: The present invention relates to a magnetic memory device comprising: a fixed magnetic layer; an insulation layer arranged on the fixed magnetic layer; a free magnetic layer arranged on the insulation layer; a second non-magnetic layer arranged on the free magnetic layer; and a first non-magnetic layer arranged on the second non-magnetic layer, wherein the second non-magnetic layer may include an element in the Periodic Table III-V periods.

Abstract: In one embodiment, a method for etching a workpiece including a lower electrode and a multi-layer film disposed on the lower electrode, the multi-layer film including a first magnetic layer, a second magnetic layer, and an insulating layer interposed between the first magnetic layer and the second magnetic layer, through a mask, is provided. The method includes exposing the workpiece to plasma of first processing gas which contains first rare gas and second rare gas having an atomic number larger than that of the first rare gas, and does not contain hydrogen gas.

Abstract: A magnetic cell includes an attracter material proximate to a magnetic region (e.g., a free region). The attracter material is formulated to have a higher chemical affinity for a diffusible species of a magnetic material, from which the magnetic region is formed, compared to a chemical affinity between the diffusible species and at least another species of the magnetic material. Thus, the diffusible species is removed from the magnetic material to the attracter material. The removal accommodates crystallization of the depleted magnetic material. The crystallized, depleted magnetic material enables a high tunnel magnetoresistance, high energy barrier, and high energy barrier ratio. The magnetic region may be formed as a continuous magnetic material, thus enabling a high exchange stiffness, and positioning the magnetic region between two magnetic anisotropy-inducing oxide regions enables a high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.

Abstract: A switching device includes a first electrode and a second electrode, and an electrolyte layer disposed between the first electrode and the second electrode. The electrolyte layer includes a first layer charged with negative charges and a second layer charged with positive charges.

Abstract: The present invention relates to a method for manufacturing a transistor according selective printing of a dopant. For the manufacture of a transistor, a semiconductor layer is formed on a substrate, and a dopant layer is formed on the semiconductor layer. In the formation of the dopant layer, an inkjet printing is used to selectively print an n type dopant or a p type dopant.

Abstract: An OLED display device and fabrication method thereof, a display panel and a display device are provided, and the method includes: providing a substrate having an anode layer and a hole injection layer; providing a first molding substrate and a second molding substrate, with a first cavity block being formed on the first molding substrate and a second cavity block being formed on the second molding substrate by a micro mechanical electro system technology, wherein the first cavity block is configured for preparing a hole transport layer corresponding to a sub-pixel of the pixel unit, and the second cavity block is configured for preparing an organic light emitting layer corresponding to a sub-pixel of the pixel unit; filling the first cavity block with a solution of a hole transport material (13) by soaking technology, solidifying to obtain a hole transport layer, and filling the second cavity block with a solution of an organic light emitting material by soaking technology, solidifying to obtain an organic l

Abstract: [Problem] To provide a technology that allows a film or glass to be bonded to a transport substrate and to be easily separated during the manufacture of a substrate. [Solution] Provided is a method for manufacturing a substrate having an electronic device formed on a surface, the method comprising a formation step for forming an inorganic material layer on at least one of a bonding surface by which the substrate having an electronic device formed on a surface is to be bonded to a transport substrate, and a bonding surface on the transport substrate for transporting the substrate; a bonding step for pressing the substrate and the transport substrate against each other and bonding the substrate and the transport substrate by the inorganic material layer; and a separation step for separating the substrate and the transport substrate.

Abstract: Embodiments of the invention include methods and materials for preparing organic semiconducting layers, for example one used in an organic semiconductor device including a substrate with a nanostructured surface and an organic semiconductor film overlying the nanostructured surface. The semiconductor film is typically formed from macroscopically ordered polymer fibers made from selected conjugate polymer compounds. Such polymer fibers synthesized from selected conjugated polymer compounds and directionally aligned in organic semiconductor devices can provide these devices improved functional properties, including for example, unexpectedly high field effect saturation mobilities.

Abstract: There is disclosed a compound having Formula I In Formula I: Ar1 and Ar3 are the same or different and are aryl groups; Ar2 and Ar4 are the same or different and are aryl groups; L is the same or different at each occurrence and can be H, D, halogen, aryl, arylamino, crosslinkable groups, deuterated aryl, deuterated arylamino, or deuterated crosslinkable groups; R1-R4 are the same or different and can be H, D, alkyl, alkoxy, aryl, aryloxy, silyl, deuterated alkyl, deuterated alkoxy, deuterated aryl, deuterated aryloxy, or deuterated silyl; R5-R8 are the same or different and can be D, F, alkyl, aryl, alkoxy, aryloxy, silyl, crosslinkable groups, deuterated alkyl, deuterated alkoxy, deuterated aryl, deuterated aryloxy, or deuterated silyl, where adjacent R5-R8 groups can be joined together to form an aromatic ring; a and b are the same or different and are an integer from 0-3; c and d are the same or different at each occurrence and are an integer from 0-4; m and q are the same or different and are an inte

Abstract: The present disclosure demonstrates that the introduction of electron deficient fullerene acceptors into thin films comprised of the high-mobility semiconducting polymers suppresses an undesirable “double-slope” in the current-voltage characteristics, improves operational stability, and changes ambipolar transport to unipolar transport. Examination of a variety of high ? polymers shows general applicability. The present disclosure also shows that instability is further reduced by tuning the relative electron affinity of the polymer and fullerene by creating blends containing different fullerene derivatives and semiconductor polymers. One can obtain hole ? values up to 5.6 cm2 V?1 s?1 that are remarkably stable over multiple bias-sweeping cycles. The results provide a simple, solution-processable route to dictate transport properties and improve semiconductor performance in systems that display similar non-idealities.

Abstract: The present invention relates to a solution or ink composition for fabricating high-performance thin-film transistors. The solution or ink comprises an organic semiconductor and a mediating polymer such as polyacrylonitrile, polystyrene, or the like or mixture thereof, in an organic solvent such as chlorobenzene or dichlorobenzene. The percentage ratio by weight of semiconductor:mediating polymer ranges from 5:95 to 95:5, and preferably from 20:80 to 80:20. The solution or ink is used to fabricate via solution coating or printing a semiconductor film, followed by drying and thermal annealing if necessary to provide a channel semiconductor for organic thin-film transistors (OTFTs). The resulting OTFT device with said channel semiconductor has afforded OTFT performance, particularly field-effect mobility and current on/off ratio that are superior to those OTFTs with channel semiconductors fabricated without a mediating polymer.

Abstract: The present invention relates to a solution or ink composition for fabricating high-performance thin-film transistors. The solution or ink comprises an organic semiconductor and a mediating polymer such as polyacrylonitrile, polystyrene, or the like or mixture thereof, in an organic solvent such as chlorobenzene or dichlorobenzene. The percentage ratio by weight of semiconductor:mediating polymer ranges from 5:95 to 95:5, and preferably from 20:80 to 80:20. The solution or ink is used to fabricate via solution coating or printing a semiconductor film, followed by drying and thermal annealing if necessary to provide a channel semiconductor for organic thin-film transistors (OTFTs). The resulting OTFT device with said channel semiconductor has afforded OTFT performance, particularly field-effect mobility and current on/off ratio that are superior to those OTFTs with channel semiconductors fabricated without a mediating polymer.

Abstract: Provided are a fluorine-atom-containing polymer that is a condensation polymer of a fluorine-atom-containing triphenylamine derivative giving a repeating unit represented by formula (1) and a fluorine derivative giving a repeating unit represented by formula (2) and the use of this fluorine-atom-containing polymer. (In the formulas, A represents a fluoroalkanediyl group, at least one of R1 and R2 represents any of an alkoxyl group, an alkenyloxy group, an alkynyloxy group, an aryloxy group, a heteroaryloxy group, and an alkyl group including at least one ether structure, R3-R6 represent prescribed substituents, m1 and m2 each independently represent an integer of 0-4, n1 and n2 represent an integer of 0-3.

Abstract: The present invention relates to a carbon nanotube organic semiconductor, a manufacturing method thereof, and a thin film transistor for chemical sensor using the same. More specifically, the present invention provides a carbon nanotube organic semiconductor, a manufacturing method thereof, and a thin film transistor for chemical sensor using the same, where the carbon nanotube organic semiconductor is an organic semiconductor layer constituting an organic thin film transistor and comprising a conjugated polymer and a single-walled carbon nanotube, the single-walled carbon nanotube displaying semiconducting properties and being wrapped with the conjugated polymer.

Abstract: An organic light-emitting device is provided.

Abstract: There is provided a compound having Formula I. In Formula I: R3-R18 are the same or different and are H, D, alkyl, silyl, aryl, deuterated alkyl, denterated silyl, or deuterated aryl, where no more than two R1-R16 are biphenyl and where at least two of R1-R16 have Formula II. In Formula II: Ar is phenyl, naphthyl, heteroaryl, spirofluorenyl, or a deuterated analog thereof; R11 is the same or different at each occurrence and is D, alkyl, silyl, aryl, deuterated alkyl, deuterated silyl, or deuterated aryl, where adjacent R11 groups can join to form a fused aromatic ring or fused deuterated aromatic ring; m is an integer form 0-4; n is an integer from 1-5; and the asterick represents a point of attachment.

Abstract: To provide a light-emitting element which emits light in a near-infrared region and has high efficiency and long life, and a light-emitting device, an authentication device, and an electronic apparatus, each of which includes this light-emitting element. A light-emitting device 100 of the invention includes a light-emitting element 1A including an anode 3, a cathode 8, and a light-emitting layer 5 which is provided between the anode 3 and the cathode 8 and emits light in a near-infrared region by applying a current between the anode 3 and the cathode 8, wherein the device emits visible light with a luminance of 5 cd/m2 or more when a current is applied between the anode 3 and the cathode 8 at a current density of 300 A/cm2 or less.

Abstract: A compound represented by the following Chemical Formula 1, an organic optoelectric device including the same and a display device including the organic optoelectric device are disclosed. The detailed descriptions of Chemical Formula 1 are the same as defined in the specification.

Abstract: The present invention provides a compound, and an organic electronic element and an electronic device using the same, the compound capable of improving light-emitting efficiency, lowering drive voltage, and increasing lifespan of an element.

Abstract: The present invention relates to an organic electroluminescent compound and an organic electroluminescent device comprising the same. By using the organic electroluminescent compound according to the present invention, it is possible to produce an organic electroluminescent device having improved lifespan characteristics.

Abstract: A condensed cyclic compound represented by Formula 1 and an organic light-emitting device including the same.

Abstract: The present invention provides novel two-dimensional van der Waals materials and stacks of those materials. Also provided are methods of making and using such materials.

Abstract: The present invention provides an organic metal complex having high heat resistance while making it possible to realize electroluminescence with high quantum efficiency as a light-emitting material for organic electroluminescent (EL) element. The present invention relates to an organic iridium complex for an organic EL element, wherein a C—N ligand including a substituent of a tricyclic-based structure obtained by condensing a heterocyclic ring and two benzene rings, and a ?-diketone ligand composed of a propane-1,3-dione having two tert-butyl-substituted phenyl groups are coordinated with an iridium atom. The complex of the present invention has high heat resistance and contributes to lifetime prolongation of the organic EL element.

Abstract: A method of producing a light emitting device which exhibits excellent light emission efficiency is provided. The light emitting device contains an anode, a cathode, a light emitting layer disposed between the anode and the cathode, and an encapsulating layer, and the method involves forming the light emitting layer by an application method using an iridium complex having an iridium atom as the central metal, forming the anode or the cathode, and forming the encapsulating layer. For the whole process, from initiation of the formation of the light emitting layer to completion of the formation of the encapsulating layer, during which the light emitting device in production is exposed to ozone, the average value of the ozone concentration: A ppb and the time interval: B min satisfy the formula: 0?A×B?1000.

Abstract: A field effect transistor having a channel that comprises three-dimensional graphene foam. The subject matter of the invention concerns a three dimensional field-effect transistor having a channel based on graphene foam and the use of ionic liquid as a gate. The graphene foam is made of a three-dimensional network of single and double layer graphene that extends in all the three dimensions. Metal contacts on either end of the graphene foam form the drain and source contacts of the transistor.