Abstract: The present invention provides a thick-film paste for printing the front side of a solar cell device having one or more insulating layers. The thick film paste comprises an electrically conductive metal, and a lead-tellurium-lithium-oxide dispersed in an organic medium.

Abstract: A solar cell includes a photoelectric conversion section having first and second principal surfaces, and a collecting electrode formed on the first principal surface. The collecting electrode includes first and second electroconductive layers in this order from the photoelectric conversion section side, and includes an insulating layer between the first and second electroconductive layers. The insulating layer is provided with an opening, and the first and second electroconductive layers are in conduction with each other via the opening provided in the insulating layer. The solar cell has, on the first principal surface, the second principal surface or a side surface of the photoelectric conversion section, an insulating region freed of a short circuit of front and back sides of the photoelectric conversion section, and the surface of the insulating region is at least partially covered with the insulating layer.

Abstract: In general, the invention relates to electro-conductive pastes comprising a glass which comprises molybdenum and lead as a constituent of a solar cell paste, and the use of such in the preparation of photovoltaic solar cells. More specifically, the invention relates to electroconductive pastes, precursors, processes for preparation of solar cells, solar cells and solar modules. The invention relates to an electro-conductive paste at least comprising as paste constituents: a) metallic particles; b) a glass; c) an organic vehicle; and d) an additive; wherein the glass comprises the following: i) Pb in the range from about 1 to about 94 wt. %; ii) Mo in the range from about 2 to about 30 wt. %; iii) O in the range from about 1 to about 50 wt. %; with the wt. % in each case being based on the total weight of the glass.

Abstract: Thermal compression bonding approaches for foil-based metallization of solar cells, and the resulting solar cells, are described. For example, a method of fabricating a solar cell includes placing a metal foil over a metalized surface of a wafer of the solar cell. The method also includes locating the metal foil with the metalized surface of the wafer. The method also includes, subsequent to the locating, applying a force to the metal foil such that a shear force appears between the metal foil and the metallized surface of the wafer to electrically connect a substantial portion of the metal foil with the metalized surface of the wafer.

Abstract: Disclosed are a solar cell and a method for manufacturing the same. A solar cell includes a semiconductor substrate, a tunnel layer on the first surface of the semiconductor substrate, a first conductive type semiconductor region on the tunnel layer and includes impurities of a first conductive type, a second conductive type semiconductor region on a second surface and includes impurities of a second conductive type opposite the first conductive type, a first passivation film on the first conductive type semiconductor region, a first electrode formed on the first passivation film and connected to the first conductive type semiconductor region through an opening portion formed in the first passivation film, a second passivation film on the second conductive type semiconductor region, and a second electrode formed on the second passivation film and connected to the second conductive type semiconductor region through an opening portion formed in the second passivation film.

Abstract: Approaches for forming solar cells with a converted seed layer as a buffer material and the resulting solar cells are described. In an example, a method of fabricating a solar cell includes converting regions of a seed layer disposed on a plurality of p-n junctions of the solar cell to form a pattern of interdigitated converted regions. The converted regions are configured to electrically insulate non-converted regions of the seed layer from each other and provide a barrier to a laser that is, in fabricating the solar cell, directed towards the seed layer such that the barrier substantially avoids degradation of at least the plurality of p-n junctions from the laser.

Abstract: The invention relates to the manufacturing process of a solar cell (1) with back contact and passivated emitter, comprising a dielectric stack (10) of at least two layers consisting of at least a first dielectric layer (11) made of AlOx in contact with a p-type silicon layer (3), and a second dielectric layer (13) deposited on the first dielectric layer (11). Besides, the method of manufacturing comprising a formation step of at least one partial opening (15) preferably by laser ablation into the dielectric stack (10), sparing at least partially the aforementioned first dielectric layer.

Abstract: A photoelectric conversion device according to an exemplary embodiment includes a pixel which includes a photoelectric conversion unit, an amplifier transistor that outputs a signal from the photoelectric conversion unit, and a reset transistor that supplies a reset voltage to the amplifier transistor. The photoelectric conversion unit includes a first electrode, a second electrode electrically connected to the amplifier transistor, a photoelectric conversion layer, and an insulating layer disposed between the photoelectric conversion layer and the second electrode. The pixel includes a first capacitor electrically connected to the second electrode. The capacitance value of the first capacitor, the capacitance value of a second capacitor between the first electrode and the second electrode, and a voltage supplied to the pixel satisfy a certain relationship.

Abstract: A photodetector with a plasmon structure includes a semiconductor substrate, a plurality of light-receiving elements that are formed in a predetermined pattern, protruding from the semiconductor substrate, and a nanostructure that is placed in contact with a surface of the semiconductor substrate among the light-receiving elements and which induces a plasmon phenomenon thereon.

Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.

Abstract: Plasmonic graphene is fabricated using thermally assisted self-assembly of plasmonic nanostructure on graphene. Silver nanostructures were deposited on graphene as an example.

Abstract: In one embodiment, a method for surface passivation for CdTe devices is provided. The method includes adjusting a stoichiometry of a surface of a CdTe material layer such that the surface becomes at least one of stoichiometric or Cd-rich; and reconstructing a crystalline lattice at the surface of the CdTe material layer by annealing the adjusted surface.

Abstract: Methods and semiconductor materials produced by such methods that are suitable for use in photovoltaic cells, solar cells fabricated with such methods, and solar panels composed thereof. Such methods include a wet-chemical synthesis method capable of producing a Group I-III-VI2 semiconductor material by forming a solution containing an organic solvent, at least one Group I precursor of at least one Group I element, and at least one Group III precursor of at least one Group III element. The Group I precursor is present in the solution in an amount of less than 120% of a stoichiometric ratio of the Group I element in the Group I-III-VI2 semiconductor material, and the Group III precursor is present in the solution in an amount of greater than 55% of a stoichiometric ratio of the Group III element in the Group I-III-VI2 semiconductor material.

Abstract: A multilayer stack including a substrate, an active layer, and a tetradymite buffer layer positioned between the substrate and the active layer is disclosed. A method for fabricating a multilayer stack including a substrate, a tetradymite buffer layer and an active layer is also disclosed. Use of such stacks may be in photovoltaics, solar cells, light emitting diodes, and night vision arrays, among other applications.

Abstract: A photovoltaic cell mounting substrate includes a substrate; and a plurality of grooves provided at one surface of the photovoltaic cell mounting substrate, the plurality of grooves including a first groove and a second groove that is placed at a circumferential side of the first groove, at the one surface of the substrate, the second groove being formed deeper than the first groove, with respect to the one surface of the substrate.

Abstract: The disclosure provides a solar cell encapsulating module including a first substrate, a first encapsulating material layer, a metal particle layer, multiple solar cells, a routing layer, a second encapsulating material layer and a second substrate. The first substrate is formed from a light transmittance material. The first encapsulating material layer is formed on the first substrate. The metal particle layer is formed on the first encapsulating material layer. The solar cells are disposed on the metal particle layer. The routing layer is disposed on the solar cells for being electrically connected to the plurality of solar cells. The second encapsulating material layer is formed on the routing layer. The second substrate is disposed on the second encapsulating material layer. The routing layer is disposed on only one side of the solar cells.

Abstract: Disclosed is a solar cell apparatus. The solar cell apparatus includes a solar cell panel; a protective substrate formed on the solar cell panel such that a step difference is formed between the protective substrate and the solar cell panel; and a sealing member at a lateral side of the solar cell panel and on a bottom surface of the protective substrate.

Abstract: The disclosure relates to solar cell, and especially to a method for manufacturing a crystalline silicon solar cell module. The method includes: a) providing a solar cell module to be laminated, including a back plate, a first bonding layer, a crystalline silicon solar cell component, a second bonding layer and a top plate in contact in sequence, where the crystalline silicon solar cell component is a crystalline silicon solar cell or a cell string formed by connecting multiple crystalline silicon solar cells; b) laminating the solar cell module to be laminated under current injection, to obtain a laminated solar cell module; and c) installing a frame and a junction box on the laminated solar cell module, to obtain a crystalline silicon solar cell module. The crystalline silicon solar cell module is under the current injection during the laminating process, improving the performance against light-induced degradation.

Abstract: A method for the production of a photovoltaic module comprising back-contact solar cells. A lower encapsulating layer, followed by an alignment and an application of the lower encapsulating layer to the inner surface of the back-contact back-sheet. The lower encapsulating layer, comprises a lower surface facing the back-contact back-sheet and an upper surface opposite the lower surface. The method includes adhesion of one or more predetermined portions of the lower surface of the encapsulating layer to the back-contact back-sheet, having each portion a predetermined superficial area which is lower than the total area of the lower surface of the lower encapsulating layer. The adhesion of the lower encapsulating layer is followed by the application of the lower encapsulating layer to the back-contact back-sheet.

Abstract: A plurality of solar cell assembly series of a solar cell panel are so arranged that any two adjacent solar cells in the plurality of solar cell assembly series have a potential difference which does not exceed V volts which is a maximum output voltage of the plurality of solar cell assembly series.

Abstract: A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.

Abstract: The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (?,X) beam irradiation and suitable thermal treatment and is industrially easily available.

Abstract: Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is used to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included.

Abstract: A solar cell of an embodiment has a first solar cell, a second solar cell, and an intermediate layer between the first and second solar cells. The first solar cell has a Si layer as a light absorbing layer. The second solar cell has as a light absorbing layer one of a group I-III-VI2 compound layer and a group I2-II-IV-VI4 compound layer. The intermediate layer has an n+-type Si sublayer and at least one selected from a p+-type Si sublayer, a metal compound sublayer, and a graphene sublayer. The metal compound sublayer is represented by MX where M denotes at least one type of element selected from Nb, Mo, Pd, Ta, W, and Pt and X denotes at least one type of element selected from S, Se, and Te.

Abstract: An optical radiation detection system (100) comprising: an optical medium (1) structured to define a region (5) suitable for transmitting an optical radiation and being associated to at least one electric parameter varying as a function of the optical radiation concerning said region; at least one electrode (2, 3) electrically coupled to the optical medium (1), and spaced from said region (5), an electric power generator (4) connected to said at least one electrode (2) and structured to provide an electric signal (Se) to be applied to the optical medium. Further, the system comprises an electric measuring circuit (50) connected to said at least one electrode (2) and structured to provide a measuring electric signal (SM) representing a variation of said at least one electric parameter.

Abstract: A radiation sensor includes a fin structure including semiconductor material formed on a substrate, a gate formed on an inner side of the fin structure, and a charge collector dielectric layer formed on an outer side of the fin structure.

Abstract: A photoconductive device that generates or detects terahertz radiation includes a semiconductor layer; a structure portion; and an electrode. The semiconductor layer has a thickness no less than a first propagation distance and no greater than a second propagation distance, the first propagation distance being a distance that the surface plasmon wave propagates through the semiconductor layer in a perpendicular direction of an interface between the semiconductor layer and the structure portion until an electric field intensity of the surface plasmon wave becomes 1/e times the electric field intensity of the surface plasmon wave at the interface, the second propagation distance being a distance that a terahertz wave having an optical phonon absorption frequency of the semiconductor layer propagates through the semiconductor layer in the perpendicular direction until an electric field intensity of the terahertz wave becomes 1/e2 times the electric field intensity of the terahertz wave at the interface.

Abstract: A mounting member includes: an insulating substrate, a first die pad unit, first and second terminals. The insulating substrate has a rectangular first surface, a second surface, a first side surface, a second side surface, a third side surface, and a fourth side surface. A through hole is provided from the first surface to the second surface. The first die pad unit is provided on the first surface. The first terminal has a conductive region covering the first side surface, the first surface, and the second surface. The second terminal has a conductive region covering the second side surface and the second surface, connected to the first die pad unit by conductive material provided in the through hole or on a side wall of the through hole. The first die pad unit, the first terminal, and the second terminal are apart from one another.

Abstract: [Problem] To provide a solar power system and a solar panel installation method with which, by using a positioning configuration which is not prone to visible vertical misalignment while preserving sunlight lighting efficiency in the positioning of a plurality of solar panels, solar panel installation is easy, and which is suitable to installing a large solar power system on a hill, in wetlands, etc. [Solution] A solar power system comprises a solar panel group (2) in which a plurality of vertically oriented rectangular solar panels (21) are inclined in the same direction, either left or right, at a prescribed angle of inclination (theta), and the lighting faces (22) of each of the solar panels (21) are arrayed in the same plane.

Abstract: A method of processing a solar cell is disclosed, where a chained patterned ion implant is performed to create a workpiece having a lightly doped surface having more heavily doped regions. This configuration may be used in various embodiments, such as for selective emitter solar cells. Additionally, various mask sets that can be used to create this desired pattern are also disclosed. The mask set may include one or more masks that have an open portion and a patterned portion, where the union of the open portions of the masks comprises the entirety of the surface to be implanted. The patterned portions of the masks combine to create the desired pattern of heavily doped regions.

Abstract: A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.

Abstract: A highly doped layer for interconnecting tunnel junctions in multijunction solar cells is presented. The highly doped layer is a delta doped layer in one or both layers of a tunnel diode junction used to connect two or more p-on-n or n-on-p solar cells in a multijunction solar cell. A delta doped layer is made by interrupting the epitaxial growth of one of the layers of the tunnel diode, depositing a delta dopant at a concentration substantially greater than the concentration used in growing the layer of the tunnel diode, and then continuing to epitaxially grow the remaining tunnel diode.

Abstract: A method of processing quantum dots is disclosed. The method comprises applying energy to excite the quantum dots to emit light and placing the quantum dots under vacuum after excitation of the quantum dots. Also disclosed is a method of processing a component including quantum dots comprising applying energy to the component including quantum dots to excite the quantum dots to emit light; and placing the component including quantum dots under vacuum after excitation. A method for processing a device is further disclosed, the method comprising applying energy to the device to excite the quantum dots to emit light; and placing the device under vacuum after excitation of the quantum dots. A method for preparing a device is also disclosed. Quantum dots, component, and devices of the methods are also disclosed.

Abstract: A method for transferring a semiconductor structure is provided.

Abstract: A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

Abstract: An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.

Abstract: A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface though which light is emitted. A copper layer has a first portion electrically connected to and opposing the bottom surface of the p-type layer. A dielectric wall extends through the copper layer to isolate a second portion of the copper layer from the first portion. A metal shunt electrically connects the second portion of the copper layer to the top surface of the n-type layer. P-metal electrodes electrically connect to the first portion, and n-metal electrodes electrically connect to the second portion, wherein the LED structure forms a flip chip. Other embodiments of the methods and structures are also described.

Abstract: Embodiments of the invention are directed to a method of separating a wafer of light emitting devices. The method includes scribing a first groove on a dicing street on the wafer and checking the alignment of the wafer using a location of the first groove relative to a feature on the wafer. After checking the alignment, a second groove is scribed on the dicing street.

Abstract: A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.

Abstract: An optoelectronic semiconductor chip includes a p-type semiconductor region, an n-type semiconductor region, and an active layer embodied as a multi-quantum well structure arranged between the p-type semiconductor region and the n-type semiconductor region. The multi-quantum well structure includes a plurality of alternating quantum well layers and barrier layers. At least one barrier layer, which is arranged closer to the p-type semiconductor region than to the n-type semiconductor region, is a high barrier layer that has an electronic band gap that is greater than an electronic band gap of the remaining barrier layers.

Abstract: An optoelectronic semiconductor element may include at least one LED chip which emits infrared radiation via a top side during operation. The radiation has a global intensity maximum at wavelengths between 800 nm and 1100 nm. The radiation has, at most 5% of the intensity of the intensity maximum at a limit wavelength of 750 nm. The radiation has a visible red light component. The semiconductor element may further include a filter element, which is arranged directly or indirectly on the top side of the LED chip and which has a transmissivity of at most 5% for the visible red light component of the LED chip, wherein the transmissivity of the filter element is at least 80%, at least in part, for wavelengths between the limit wavelength and 1100 nm, and a radiation exit surface provided for emitting the filtered radiation.

Abstract: An LED die includes a substrate, a pre-growth layer, a first insulating layer and a light emitting structure. The pre-growth layer, the first insulating layer and the light emitting structure are formed on the structure that order. The substrate includes a first electrode, a second electrode and an insulating part. The insulating part is formed between the first electrode and the second electrode. The LED die further includes a second insulating layer and a metal layer which are formed around the pre-growth layer. The present disclosure includes a method for manufacturing the LED die.

Abstract: According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.

Abstract: Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage (e.g., V<kBT/q) can be accomplished by injecting phonons generated by non-radiative recombination back into the LED's semiconductor lattice. This raises the temperature of the LED's active rejection, resulting in thermally assisted injection of holes and carriers into the LED's active region. This phonon recycling or thermo-electric pumping process can be promoted by heating the LED with an external source (e.g., exhaust gases or waste heat from other electrical components). It can also be achieved via internal heat generation, e.g., by thermally insulating the LED's diode structure to prevent (rather than promote) heat dissipation. In other words, trapping heat generated by the LED within the LED increases LED efficiency under certain bias conditions.

Abstract: Light emitting devices and methods for their manufacture are provided. According to one aspect, a light emitting device is provided that comprises a substrate having a recess, and an interlayer dielectric layer located on the substrate. The interlayer dielectric layer may have a first hole and a second hole, the first hole opening over the recess of the substrate. The light emitting device may further include first and second micro LEDs, the first micro LED having a thickness greater than the second micro LED. The first micro LED and the second micro LED may be placed in the first hole and the second hole, respectively.

Abstract: There are provided a phosphor film, a method of manufacturing the same, and a method of coating an LED chip with a phosphor layer. The phosphor film includes: a base film; a phosphor layer formed on the base film and obtained by mixing phosphor particles in a partially cured resin material; and a cover film formed on the phosphor layer to protect the phosphor layer.

Abstract: Networks of semiconductor structures with fused insulator coatings and methods of fabricating networks of semiconductor structures with fused insulator coatings are described. In an example, a semiconductor structure includes an insulator network. A plurality of discrete semiconductor nanocrystals is disposed in the insulator network. Each of the plurality of discrete semiconductor nanocrystals is spaced apart from one another by the insulator network.

Abstract: A semiconductor light emitting device comprising a light emitting layer disposed between an n-type region and a p-type region is combined with a ceramic layer which is disposed in a path of light emitted by the light emitting layer. The ceramic layer is composed of or includes a wavelength converting material such as a phosphor. Luminescent ceramic layers according to embodiments of the invention may be more robust and less sensitive to temperature than prior art phosphor layers. In addition, luminescent ceramics may exhibit less scattering and may therefore increase the conversion efficiency over prior art phosphor layers.

Abstract: A light-emitting device includes a light-emitting element for emitting primary light, and a wavelength conversion unit for absorbing part of the primary light and emitting secondary light having a wavelength longer than that of the primary light, wherein the wavelength conversion unit includes plural kinds of phosphors having light absorption characteristics different from each other, and then at least one kind of phosphor among the plural kinds of phosphors has an absorption characteristic that can absorb the secondary light emitted from at least another kind of phosphor among the plural kinds of phosphors.

Abstract: To provide an illumination method and a light-emitting device which are capable of achieving, under an indoor illumination environment where illuminance is around 5000 lx or lower when performing detailed work and generally around 1500 lx or lower, a color appearance or an object appearance as perceived by a person, will be as natural, vivid, highly visible, and comfortable as though perceived outdoors in a high-illuminance environment, regardless of scores of various color rendition metric. Light emitted from the light-emitting device illuminates an object such that light measured at a position of the object satisfies specific requirements. A feature of the light-emitting device is that light emitted by the light-emitting device in a main radiant direction satisfies specific requirements.