Abstract: Some embodiments include methods of forming vertical memory strings. A trench is formed to extend through a stack of alternating electrically conductive levels and electrically insulative levels. An electrically insulative panel is formed within the trench. Some sections of the panel are removed to form openings. Each opening has a first pair of opposing sides along the stack, and has a second pair of opposing sides along remaining sections of the panel. Cavities are formed to extend into the electrically conductive levels along the first pair of opposing sides of the openings. Charge blocking material and charge-storage material is formed within the cavities. Channel material is formed within the openings and is spaced from the charge-storage material by gate dielectric material. Some embodiments include semiconductor constructions, and some embodiments include methods of forming vertically-stacked structures.

Abstract: A JFET is formed with vertical and horizontal elements made from a high band-gap semiconductor material such as silicon carbide via triple implantation of a substrate comprising an upper drift region and a lower drain region, the triple implantation forming a lower gate, a horizontal channel, and an upper gate, in a portion of the drift region. A source region may be formed through a portion of the top gate, and the top and bottom gates are connected. A vertical channel region is formed adjacent to the planar JFET region and extending through the top gate, horizontal channel, and bottom gate to connect to the drift, such that the lower gate modulates the vertical channel as well as the horizontal channel, and current from the sources flows first through the horizontal channel and then through the vertical channel into the drift.

Abstract: It is an object of the present invention to provide a semiconductor device capable of adjusting a VF-EREC trade-off characteristic without a life-time control and a power conversion device having the semiconductor device. A semiconductor device according to the present invention includes a p?-type anode layer including a donor impurity and an acceptor impurity. An acceptor impurity concentration of the p-type anode layer is equal to or larger than a donor impurity concentration of the p?-type anode layer, an acceptor impurity concentration of the p?-type anode layer is equal to or larger than a donor impurity concentration of the p?-type anode layer, and a donor impurity concentration of the p?-type anode layer is equal to or larger than a donor impurity concentration of the n-type drift layer.

Abstract: It is the object of the invention to provide a power semiconductor rectifier with a low on-state-voltage and high blocking capability. The object is attained by a power semiconductor rectifier comprising: a drift layer having a first conductivity type; and an electrode layer forming a Schottky contact with the drift layer, wherein the drift layer includes a base layer having a peak net doping concentration, below 1·1016 cm?3 and a barrier modulation layer which is in direct contact with the electrode layer to form at least a part of the Schottky contact, wherein a net doping concentration of the barrier modulation layer is in a range between 1·1016cm?3 and 1·1019 cm?3 and wherein the barrier modulation layer has a layer thickness in a direction vertical to the interface between the electrode layer and the barrier modulation, layer of at least 1 nm and less than 0.2 ?m.

Abstract: A photovoltaic system including a cell connection piece coupled to a plurality of photovoltaic cells and a terminal of a junction box. The cell connection piece includes an interconnect bus, a plurality of bus tabs unitarily formed with the interconnect bus, and a terminal bus coupled with the interconnect bus. The plurality of bus tabs extend from the interconnect bus. The terminal bus includes a nonlinear portion.

Abstract: The present invention is premised upon a connector device and method that can more easily electrically connect a plurality of PV arrays and/or locate these arrays upon a building or structure. It also can optionally provide some additional components (e.g. a bypass diode and/or an indicator means) and can enhance the serviceability of the array.

Abstract: Methods and structures of photodetectors are described. The structure may include a readout integrated circuit substrate having an internally integrated capacitor. The structure may additionally include an external capacitor overlying the readout integrated circuit substrate. The external capacitor may be coupled with the internally integrated capacitor of the readout integrated circuit substrate, and configured to operate in parallel with the internally integrated capacitor of the readout integrated circuit substrate. The structure may also include a detector overlying the external capacitor.

Abstract: A solar photovoltaic module safety shutdown system includes a module-on switch coupled with a first circuit having a photovoltaic module and a System-Monitor device. The System-Monitor device couples to the module-on switch through a second circuit and to the photovoltaic module and an AC main panelboard through the first circuit. A module-off switch operatively couples with the photovoltaic module and the module-on switch. The System-Monitor device supplies a System-on signal to the module-on switch through the second circuit. The module-on switch disables the photovoltaic module by shorting it or disconnecting it from the first circuit in response to the System-On signal not being received by the module-on switch from the System-Monitor device. The module-off switch disables the photovoltaic module by shorting it in response to the System-On signal not being received by the module-on switch when the photovoltaic module is irradiated with light.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: A method for manufacturing a solar cell includes forming a passivation layer on a rear surface of a substrate of a first conductivity type; forming connecting electrodes having a plurality of electrical contacts that are in contact with the rear surface of the substrate by using a first paste for a first temperature firing on portions of the passivation layer; and forming a rear electrode layer by using a second paste for a second temperature firing on the passivation layer and the plurality of electrical contacts, wherein a temperature of the second temperature firing is lower than a temperature of the first temperature firing.

Abstract: A solar cell according to an embodiment comprises: a support substrate; a rear electrode layer formed on the support substrate; a first through groove formed on the rear electrode layer; an optical absorption layer formed on the rear electrode layer; and a front electrode layer formed on the optical absorption layer, wherein the average surface roughness (Ra1) of the support substrate, which is exposed by the first through groove, is in a range of 28 nm to 100 nm.

Abstract: A solar cell includes: a base substrate that has a principle surface; a first semiconductor layer provided in a first region on the principle surface; a second semiconductor layer provided in a second region on the principle surface; an n-side electrode provided on the first semiconductor layer; a p-side electrode provided on the second semiconductor layer; and grooves that separate the n-side electrode and the p-side electrode from each other. The respective widths of the grooves in a direction in which the n-side electrode and the p-side electrode are spaced apart are set to be wider in the outer peripheral region than in the inner region.

Abstract: The present disclosure relates to an optical module. In an embodiment, the optical module includes a carrier, a light source, a light detector, and a first polarizer. The light source and the light detector are disposed adjacent to a first surface of the carrier. The first polarizer is disposed on the light detector. The optical module is configured to polarize light emitted from the light source into a first polarization direction substantially perpendicular to a second polarization direction of light permitted through the first polarizer.

Abstract: The physical and chemical properties of surfaces can be controlled by bonding nanoparticles, microspheres, or nanotextures to the surface via inorganic precursors. Surfaces can acquire a variety of desirable properties such as antireflection or reflection, antifogging, antifrosting, UV blocking, and IR absorption, while maintaining transparency to visible light. Micro or nanomaterials can also be used as etching masks to texture a surface and control its physical and chemical properties via its micro or nanotexture.

Abstract: A photovoltaic device includes a substrate, a first electrode formed on the substrate and a p-type absorber layer including a chalcogenide compound. An n-type layer includes a zinc oxysulfide material having a sulfur content adjusted to match a feature of the absorber layer. A transparent contact is formed on the n-type layer.

Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.

Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.

Abstract: The present invention relates to a laminate including an alkali metal-doped layer. The laminate is processable at high temperatures of at least 550° C. and has excellent durability and barrier properties. Due to these advantages, the laminate can be used to fabricate a thin film solar cell with high flexibility and improved energy conversion efficiency. The present invention also relates to a thin film solar cell including the laminate.

Abstract: The invention relates a thin-film solar cell. In the related art, a buffer layer, a transparent electrode, and a grid electrode are formed on a light absorption layer, but in the invention, the buffer layer and the transparent electrode are not formed on a light absorption layer, and the buffer layer, the transparent electrode, and the grid electrode are formed under a CIGS face such that solar light is directly input to the light absorption layer without obstacles, and the first electrode and the buffer layer are patterned in a saw-toothed structure to engage with each other to reduce a distance by which electrons or holes generated by absorbing light energy move to the electrode or the buffer layer.

Abstract: Textured transparent layers are formed on the incident light receiving surface of thin film solar cells to increase their efficiency by altering the incident light path and capturing a portion of the light reflected at the MLA. The textured transparent layer is an array of lenses of micrometer proportions such as hemispheres, hemi-ellipsoids, partial-spheres, partial-ellipsoids, cones, pyramids, prisms, half cylinders, or combinations thereof. A method of forming the textured transparent layer to the light incident surface of the solar cell is by forming an array of lenses from a photocurable resin and its subsequent curing. The photocurable resin can be applied by inkjet printing or can be applied by roll to roll imprinting or stamping with a mold.

Abstract: A method for detecting W-band and terahertz radiations is disclosed. The method provides a graphene-Si Schottky diode that includes a graphene monolayer having an Ohmic contact with a source electrode supported on a top surface of a doped silicon substrate by an insulating layer, and extends over an edge of the source electrode and contacts the top surface, in a manner forming a Schottky junction. The method stores reference current-voltage (I-V) characteristics of the Schottky junction in a reverse biased mode, then measures I-V characteristics of the Schottky junction in the reverse biased mode, and detects W-band and terahertz radiation by comparing the measured I-V characteristics of the Schottky junction to the stored reference I-V characteristics.

Abstract: A provided semiconductor device includes a Ge photodiode having proper diode characteristics. A groove is provided on a germanium growth protective film, a p-type silicon layer, and a first insulating film from the top surface of the germanium growth protective film without reaching the major surface of a semiconductor substrate. An i-type germanium layer and an n-type germanium layer are embedded in the groove with a seed layer interposed between the layers and the groove, the seed layer being made of amorphous silicon, polysilicon, or silicon germanium. The i-type germanium layer and the n-type germanium layer do not protrude from the top surface of the germanium growth protective film, thereby forming a flat second insulating film having a substantially even thickness on the n-type germanium layer and the germanium growth protective film.

Abstract: The present disclosure relates to a process of manufacturing a photomultiplier microcell. The process comprises providing an insulating layer over an active region; and implanting a dopant through the insulating layer to form a photosensitive diode in the active region. The insulating layer once formed is retained over the active region throughout the manufacturing process.

Abstract: A light receiving and emitting element module includes a substrate; a light emitting element and a light receiving element on an upper surface of the substrate; a frame-shaped outer wall that on the upper surface of the substrate; and a light shielding wall that is positioned inside the outer wall and partitions an internal space of the outer wall into spaces respectively corresponding to the light emitting element and the light receiving element. The light shielding wall includes a light emitting element-side shading surface on the light emitting element side, a light receiving element-side shading surface on the light receiving element side, and a lower surface that is connected to each of the light emitting element-side shading surface and the light receiving element-side shading surface, and that faces the substrate. The lower surface has an inclined surface inclined with respect to the upper surface of the substrate.

Abstract: The present invention includes a mist generator that generates a mist of a raw material of a film to be formed, and a mist jet nozzle that jets the mist generated by the mist generator to a substrate on which a film is to be formed. The mist jet nozzle includes: a main body having a hollow portion; a mist supply port that supplies the mist; a spout that jets the mist to the outside; a carrier gas supply port that supplies a carrier gas; and a shower plate having a plurality of holes formed therein. By the arrangement of the shower plate, the hollow portion is divided into a first space connected to the carrier gas supply port and a second space connected to the spout. The mist supply port is connected to the second space.

Abstract: A device includes a substrate with a tunnel barrier disposed on active region defined on the substrate, a monolayer of graphene disposed on the tunnel barrier, a dielectric material disposed on the graphene, and an electrode disposed over a region of the dielectric material. A first voltage is applied across the electrode and the graphene to adjust a Fermi level within the graphene to a Fermi level position within the valence band of the graphene based upon a predetermined emission wavelength. A current is injected into the graphene's conduction band to cause the graphene to emit a broadband hot electron luminescence (HEL) spectrum of photons peaked at the predetermined emission wavelength. The device may be configured as a vertical-tunneling light-emitting hot-electron transistor. The broadband HEL photon emission spectrum emanating from the graphene may be voltage-tunable within the electromagnetic spectrum from UV to THz.

Abstract: The present disclosure discloses a method forming a semiconductor light-emitting unit, comprising the steps of providing a semiconductor substrate; epitaxially growing a reaction layer on the semiconductor substrate; and epitaxially growing a buffer layer on the reaction layer; wherein the buffer layer and the semiconductor substrate are lattice-mismatched, and a dislocation density of the buffer layer is smaller than smaller than 1*109 cm?2.

Abstract: There is provided a method for manufacturing a semiconductor light emitting device package including steps of disposing a plurality of light emitting structures on a support substrate, each light emitting structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer, shaping a mixture containing a wavelength conversion material and a glass composition on the plurality of light emitting structures, sintering the mixture to form a wavelength conversion part, removing the support substrate, and cutting the plurality of light emitting structures into individual device units.

Abstract: A method for fabrication of three-dimensional nanostructures on top of the surface of a first solid state material is disclosed, which includes steps of (i) deposition of a layer of a second solid state material forming a stable layer-like coverage of the surface, (ii) the subsequent deposition of a third solid state material, having a stronger binding energy with the first solid state material than the second solid state material, (iii) wherein the third solid state material replaces the second solid state material forming an interface with the first material and thus reduces the energy of the system, and (iv) where the resulting excess second solid state material forms three-dimensional nanostructures. The structure can be covered with another (fourth) solid state material, which eventually can be the same as the first material or a different one, and the three dimensional nanostructures form capped quantum dots or quantum wires.

Abstract: An optoelectronic semiconductor chip including a multi-quantum well including at least one high barrier layer is disclosed. In an embodiment, the chip includes a p-type semiconductor region, an n-type semiconductor region and an active layer suitable for emission of radiation arranged between the p-type region and the n-type region, wherein the active layer is in the form of a multiple quantum well structure. The multiple quantum well structure has a plurality of alternating quantum well layers and barrier layers, wherein a barrier layer arranged closer to the p-type region than to the n-type region is a high barrier layer having an electronic band gap Ehb that is larger than electronic band gaps Eb of other barrier layers, and wherein a quantum well layer that adjoins the high barrier layer on a side facing towards the p-type region has a thickness that is greater than thicknesses of other quantum well layers.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: A light source module is provided. The light source module includes a flexible printed circuit board, plural light-emitting diodes and plural first light-absorbing portions. The flexible printed circuit board has a first edge and a second edge opposite to the first edge. The light-emitting diodes are disposed on the flexible printed circuit board near the first edge. The first light-absorbing portions are disposed on the flexible printed circuit board near the second edge, in which the first light-absorbing portions are alternately arranged with the light-emitting diodes.

Abstract: A semiconductor light-emitting device may include an emission structure, a protection pattern layer on a limited region of the emission structure, and an insulating pattern layer on the emission structure. The protection pattern layer may expose a separate remaining region of the emission structure, and the first insulating pattern layer may cover at least the remaining region of the emission structure. The insulating layer may include an opening that exposes at least a portion of a surface of the protection pattern layer, such that the emission structure remains covered by at least one of the insulating layer and the protection pattern layer.

Abstract: Disclosed is a semiconductor light emitting device, wherein the semiconductor light emitting device includes: a first conductive electrode and a second conductive electrode; a first conductive semiconductor layer having the first conductive electrode; a second conductive semiconductor layer overlapped with the first conductive semiconductor layer, and having the second conductive electrode; and a passivation layer formed to enclose the semiconductor light emitting device, wherein one surface of the first conductive semiconductor layer is divided into a first region where the first conductive electrode is disposed, and a second region covered by the passivation layer, and wherein the passivation layer is provided with a plurality of layers having different refractive indexes, such that light is reflected from the second region.

Abstract: A light source device having: a blue light emitting element that emits blue light having an emission peak in a wavelength region of 440 nm to 460 nm; a green phosphor that absorbs part of the blue light emitted by the blue light emitting element and thereby emits green light having an emission peak in a wavelength region of 500 nm to 575 nm; a red phosphor that absorbs at least one of part of the blue light emitted by the blue light emitting element and part of the green light emitted by the green phosphor, and thereby emits red light having an emission peak in a wavelength region of 600 nm to 690 nm; and an absorbent containing neodymium fluoride that absorbs part of the green light and part of the red light.

Abstract: A package includes an element placement region, a pair of leads and a resin molded body. The resin molded body holds the pair of leads. The resin molded body includes a black resin part, and a light reflective foam part arranged at least on a part of a surface of the black resin part in a light irradiation region configured to be irradiated by light from a light emitting element placed in the element placement region.

Abstract: A light emitting package base structure includes a carrier, a light emitting chip, a light transmission unit and a dam. The carrier has a supporting surface and an outer surface surrounding the supporting surface. The light emitting chip is disposed on the supporting surface and electrically connected to the carrier. The light transmission unit is disposed on the carrier and has a through hole. The dam is disposed between the carrier and the light transmission unit, and a hermetic receiving space is formed between the dam, the light transmission unit and the carrier. The light emitting chip is located in the hermetic receiving space and the dam has a side surface away from the hermetic receiving space. A gap is formed between the side surface and the outer surface, and the through hole is corresponded to a location between the side surface and the outer surface.

Abstract: A method is provided for making optical semiconductor devices collectively. LED chips are arranged on a material substrate, and the substrate is sandwiched by a common mold and a first cooperating mold formed with a cavity. A light-transmitting resin is injected into the cavity and solidified to form a light-transmitting resin member including body portions for sealing the LED chips and connecting portions each connecting adjacent body portions. Then, the substrate is sandwiched by the common mold and a second cooperating mold formed with another cavity. A light-shielding resin is injected into the cavity and solidified to form a light-shielding resin member filling the gaps between the body portions. The body portions are separated from each other by making cuts in the material substrate and the light-shielding resin member.

Abstract: A semiconductor light emitting device includes: a package body having a cavity, and having a first wiring electrode and a second wiring electrode disposed on a bottom surface of the cavity; a light emitting diode (LED) chip having a first surface with a first electrode and a second electrode thereon, a second surface, and lateral surfaces, the LED chip being mounted in the cavity such that the first surface faces the bottom surface, a wavelength conversion film on the second surface of the LED chip, and including a first wavelength conversion material, and a reflective resin portion in the cavity that surrounds the LED chip.

Abstract: A light emitting device includes a light emitting element, a terminal substrate and a fixing member. The light emitting element is a semiconductor laminate having a first semiconductor layer, a light emitting layer, and a second semiconductor layer that are laminated in that order, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer. The terminal substrate includes a pair of terminals connected to the first electrode and the second electrode, and an insulator layer that fixes the terminals. At least a part of the outer edges of the terminal substrate is disposed more to a center of the light emitting device than the outer edges of the semiconductor laminate. The fixing member fixes the light emitting element and the terminal substrate.

Abstract: Flexible LED assemblies (300) are described. More particularly, flexible LED (320) assemblies having flexible substrates (302) with conductive features (304, 306) positioned on or in the substrate, and layers of ceramic (310) positioned over exposed portions of the substrate to protect against UV degradation, as well as methods of making such assembles, are described.

Abstract: A light emitting device includes: a package forming a recess, having a first lead and a second lead arranged on a bottom surface of the recess and a resin section on a lateral wall of the recess to fix the leads, and being in a substantially rectangular shape surrounded by upper sides of the lateral walls of the recess; a light emitting element arranged on the first lead and being in a parallelogram shape; a second wire electrically connecting the light emitting element to the second lead; and reflective members covering inner surfaces of the lateral walls on a diagonal line at corners in the recess, wherein one side of the light emitting element adjacent to the second lead is substantially in parallel to one side of the first lead or the second lead.

Abstract: A light emitting device includes a resin molded body, which includes a front surface having an opening, a bottom surface opposite to the opening a front-rear direction of the light emitting device, and first and second wall portions extending from the bottom surface to the front surface. A first lead includes a first bottom portion provided on the bottom surface, first and second side portions provided in the first and second wall portions, respectively. A second lead include a second bottom portion provided on the bottom surface apart from the first lead to provide a first resin region, third and fourth side portions provided in the first and second wall portions apart from the first lead to provide second and third resin regions, respectively. The first resin region is provided between the second resin region and the third resin region viewed in the front-rear direction.

Abstract: Lightweight solid state light sources with common light emitting and heat dissipating surfaces consisting of light emitting diodes (LED) in thermal contact to light transmitting thermally conductive elements and combined with a reflector element to form a light recycling cavity, provide both convective and radiative cooling from their light emitting surfaces, eliminating the need for appended heatsinks. The lightweight self-cooling solid state light sources integrate the electrical interconnect of the LEDs and other semiconductor devices to a single substrate that is both the heatsink and the light emitting element. The elimination of heavy appended heatsinks enables these sources to be easily moved, attached and mounted on suspended ceilings without requiring separate supporting means. The low profile and nonflammable properties of the light sources allow their use on fire barrier surfaces or partitions. The light sources can easily be integrated into ceilings, ceiling grids or ceiling tiles.

Abstract: In a light-emitting device substrate (2), a light reflecting surface covered with an anodized aluminum layer (12) is formed on one side of a base (14), and a glass-based insulator layer (11) and electrode patterns (5?6) disposed on the first insulating layer (11) are formed on the one side of the base (14) in a region not covered with the anodized aluminum layer (12). A glass-based insulator layer (13) is formed at least on the other side of the base (14) that is opposite the one side of the base (14). Therefore, a light-emitting device substrate having high reflectivity, high heat dissipation capability, dielectric withstand capability, and long-term reliability and excellent in mass productivity can be realized.

Abstract: Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a solution of the same, a method for making the same from a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, imaging devices, phase change layers, and sensor devices.

Abstract: The present invention provides a thermoelectric conversion material represented by the following chemical formula Mg3+mAaBbD2-eEe. The element A represents at least one selected from the group consisting of Ca, Sr, Ba and Yb. The element B represents at least one selected from the group consisting of Mn and Zn. The value of m is not less than ?0.39 and not more than 0.42. The value of a is not less than 0 and not more than 0.12. The value of b is not less than 0 and not more than 0.48. The element D represents at least one selected from the group consisting of Sb and Bi. The element E represents at least one selected from the group consisting of Se and Te. The value of e is not less than 0.001 and not more than 0.06. The thermoelectric conversion material has a La2O3 crystalline structure. The thermoelectric conversion material is of n-type. The present invention provides a novel thermoelectric conversion material.

Abstract: Disclosed is a thermoelement including a body including a plurality of joint portions, at least two of the plurality of joint portions being rotatably connected to each other, a shaft provided to the body and configured to provide a center of rotation of the plurality of joint portions, and a thermoelectric material provided between the plurality of joint portions.

Abstract: An object of the present invention is to provide a persistent current switch with high heating efficiency by simplifying the configuration of the persistent current switch and reducing the heat capacity. To achieve the object, a superconducting magnet in accordance with the present invention includes a superconducting coil, a persistent current switch, and one of an alternating-current power supply, a pulsed power supply, or a charge/discharge circuit. The one of the alternating-current power supply, the pulsed power supply, or the charge/discharge circuit is connected to a loop circuit of the superconducting coil and the persistent current switch such that it is in parallel with the persistent current switch.

Abstract: An electroacoustic transducer includes: a polygonal-shaped laminated piezoelectric element including alternately stacked piezoelectric layers and electrode layers, with the piezoelectric layers placed between at least one pair of electrode layers having different polarities; and a circular vibration plate on which the laminated piezoelectric element is placed. Of the piezoelectric layers sandwiched between the at least one pair of electrode layers, the total volume (V) of those effective layers that overlap the at least one pair of electrode layers as viewed from the stacking direction satisfies the condition below: 0.2?R2×ts?V?2.0?R2×ts wherein ? represents the ratio of the circumference of a circle to its diameter, R represents the radius of the vibration plate, and ts represents the thickness of the vibration plate.