Abstract: A laminated ceramic electronic component that includes a laminate having a plurality of dielectric layers and a plurality of internal electrode layers laminated together. External electrodes having underlying electrode layers and plating layers are formed on both end surfaces of the laminate. When a cross-section including the underlying electrode layers is observed, the underlying electrode layers contain a plurality of Cu crystals and glass, and an average value of lengths of demarcation lines of the Cu crystals having different crystal orientations is 3 ?m or less.

Abstract: An electrolyte for an aluminum electrolysis capacitor and the aluminum electrolysis capacitor using the electrolyte are provided. The electrolyte comprises a primary solute, a primary solvent, and an additive as shown in a structural formula 1, wherein, R1 and R2are each independently selected from —CH3, —CH2CH3or —OH; R3 and R4 are each in selected from —(CH2CH2O)mH or —H, and n and m are integrals ranging from 1 to 10000, respectively. The electrolyte has excellent anti-corrosive performance and is capable of maintaining long load service life under the condition of relatively high chlorine ion content, and there is no evidence of corrosion in the capacitor after it is disassembled.

Abstract: Provided herein is a rechargeable power source that can be quickly charged and used for charging mobile and cordless devices. The power source includes an ultracapacitor which comprises a composite structure including, for example open graphene structures or graphene nanoribbons attached to an oxide layer. The oxide layer is on a metal foil surface. The oxide layer includes more than one metal atom.

Abstract: An ultracapacitor that includes an energy storage cell immersed in an electrolyte and disposed within an hermetically sealed housing, the cell electrically coupled to a positive contact and a negative contact, wherein the ultracapacitor has a gel or polymer based electrolyte and is configured to output electrical energy at temperatures between about ?40° C. and about 250° C. Methods of fabrication and use are provided.

Abstract: An apparatus includes a circuit interrupting device installed in a cabinet. The circuit interrupting device has an actuator configured for rotation about a switching axis to switch the device between ON and OFF conditions. The apparatus further includes a front access hub supported for rotation about an axis orthogonal to the switching axis. A handle is coupled to the front access hub to rotate the front access hub about the orthogonal axis. A mechanism interconnects the front access hub with the actuator to rotate the actuator in response to rotation of the front access hub.

Abstract: A system and method for hardware tamper detection and mitigation for a circuit breaker. The method includes detecting and mitigating a breach to a circuit breaker of an electrical power management system, wherein the circuit breaker includes a housing, an electrical circuit, and switch coupled to and controllable by the electrical circuit. An alert identifying a detected breach event at the circuit breaker is generated and transmitted to a computing device. The circuit breaker device experiencing the detected breach event is disabled in response to the alert. An electrical power management system includes a plurality of circuit breakers each having a breach detector coupled to an electrical circuit, and a switch coupled to and controllable by the electrical circuit. A circuit breaker controller controls the state of the circuit breaker as determined by the breach detector.

Abstract: A luminous keyboard includes an illumination module, a keycap and plural light-guiding structures. The illumination module generates a light beam. The keycap includes a character/symbol region. The plural light-guiding structures are disposed on a bottom surface of the specified keycap and aligned with the character/symbol region. The light beam to be projected to the specified keycap is guided to the character/symbol region by the light-guiding structures. The light-guiding structures of the luminous keyboard are arranged according to the layout of the character/symbol regions in different countries. It is not necessary to change the light-guiding structures of the light guide plate according to the layout of the character/symbol regions of different countries.

Abstract: The invention relates to an electric rocker switch with an actuating element designed as a rocker. The rocker is thereby moveable back and forth between two positions, namely between an on position and an off position. The rocker is pivotably mounted on the housing for this purpose. The rocker interacts with a leaf spring, the upper end of the leaf spring is firmly clamped at the rocker via a longitudinal area and the lower end of the leaf spring is tiltably arranged on a contact element. The leaf spring has one stable arch shape in the on position and another stable arch shape in the off position with a curve oriented opposite the arch shape. The electric rocker switch according to the invention shows in an advantageous way symmetrical haptics for the on position and also for the off position, wherein the position of the rocker indicates the corresponding position.

Abstract: To improve cooling performances of quenching gas in a gas blast switch comprising a gas channel connecting an arcing region to a gas storage chamber delimited by radially opposite inner and outer walls and axially opposite first and second end walls, a flow guiding radial wall extends in the gas storage chamber spaced from each wall delimiting the chamber, an opening of the gas channel into the gas storage chamber through the first end wall faces a space between the flow guiding radial wall and the inner wall, the outer wall includes a deflecting portion protruding in the gas storage chamber and facing the second end wall, and at least part of the deflecting portion is offset from the flow guiding radial wall in an axial direction oriented from the gas channel towards the gas storage chamber.

Abstract: The invention comprises a method and a circuit design to control a bi-stable contactor in such a way that contactor coils can be energized in the event of sudden and unexpected loss of battery power. The invention also includes a component redundancy scheme designed to survive any single component failure SHORT or OPEN as required by industry safety standards UL1973 and UL991.

Abstract: A fuse employing a plurality of tuning fork terminal configurations with an improved current capacity within a smaller footprint and a housing design to provide the terminals with insert protection and strain relief.

Abstract: A charged particle beam writing method includes forming an aperture image by making a charged particle beam pass through an aperture substrate, changing, in the state where a plurality of crossover positions of the charged particle beam and positions of all of one or more intermediate images of the aperture image are adjusted to matching positions with respect to the aperture image with the first magnification, magnification of the aperture image from the first magnification to the second magnification by using a plurality of lenses while maintaining the last crossover position of the charged particle beam and the position of the last intermediate image of the aperture image to be fixed, and forming, using an objective lens, the aperture image whose magnification has been changed to the second magnification on the surface of the target object, and writing the aperture image.

Abstract: A low profile extraction electrode assembly including an insulator having a main body, a plurality of spaced apart mounting legs extending from a first face of the main body, a plurality of spaced apart mounting legs extending from a second face of the main body opposite the first face, the plurality of spaced apart mounting legs extending from the second face offset from the plurality of spaced apart mounting legs extending from the first face in a direction orthogonal to an axis of the main body, the low profile extraction electrode assembly further comprising a ground electrode fastened to the mounting legs extending from the first face, and a suppression electrode fastened to the mounting legs extending from the second face, wherein a tracking distance between the ground electrode and the suppression electrode is greater than a focal distance between the ground electrode and the suppression electrode.

Abstract: Disclosed is a charged particle optical apparatus. The charged particle optical apparatus has a liner electrode in a first vacuum zone. The liner electrode is used to generate an electrostatic objective lens field. The apparatus has a second electrode which surrounds at least a section of the primary particle beam path. The section extends in the first vacuum zone and downstream of the liner electrode. A third electrode is provided having a differential pressure aperture through which the particle beam path exits from the first vacuum zone. A particle detector is configured for detecting emitted particles, which are emitted from the object and which pass through the differential pressure aperture of the third electrode. The liner electrode, the second and third electrodes are operable at different potentials relative to each other.

Abstract: An ion milling apparatus includes an ion irradiation source, a sample holder, a sample stage, a rotation mechanism, and a slide mechanism. The sample holder holds a sample such that the sample protrudes from a shielding plate in a direction perpendicular to an optical axis of an ion beam. The rotation mechanism is disposed such that a rotation center of a rotation shaft is perpendicular to the optical axis of the ion beam and parallel to a direction in which the sample protrudes from the shielding plate. The rotation mechanism supports the sample stage such that the sample stage is rotatable. The slide mechanism supports the sample held by the sample holder such that the sample is movable along the optical axis of the ion beam.

Abstract: A distortion measurement method for an electron microscope image includes: loading a distortion measurement specimen having structures arranged in a lattice to a specimen plane of an electron microscope or a plane conjugate to the specimen plane in order to obtain an electron microscope image of the distortion measurement specimen; and measuring a distortion from the obtained electron microscope image of the distortion measurement specimen.

Abstract: In one embodiment, a charged particle beam writing apparatus includes a storage unit storing a polynomial and a correction map for correcting deviations of writing positions, a correction processing unit correcting pattern positions in a writing area of a writing target substrate by using the polynomial and correcting the pattern positions in a specific region included in the writing area by using the correction map, and a writing unit writing patterns on a substrate by using a charged particle beam in accordance with the pattern positions corrected by the correction processing unit.

Abstract: A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distribution port to deliver a processing gas to the plasma chamber, a workpiece support to hold a workpiece, an antenna array comprising a plurality of monopole antennas extending partially into the plasma chamber, and an AC power source to supply a first AC power to the plurality of monopole antennas. The plurality of monopole antennas are divided into a plurality of groups of monopole antennas, and the AC power source is configured to generate AC power on a plurality of power supply lines at a plurality of different phases, and different groups of monopole antennas are coupled to different power supply lines.

Abstract: A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distribution port to deliver a processing gas to the plasma chamber, a workpiece support to hold a workpiece, an antenna array comprising a plurality of monopole antennas extending partially into the plasma chamber, and an AC power source to supply a first AC power to the plurality of monopole antennas.

Abstract: A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distribution port to deliver a processing gas to the plasma chamber, a workpiece support to hold a workpiece, an antenna array comprising a plurality of monopole antennas extending partially into the plasma chamber, and an AC power source to supply a first AC power to the plurality of monopole antennas. The plurality of monopole antennas can extend through a first gas distribution plate. A grid filter can be positioned between the workpiece support and the plurality of monopole antennas.

Abstract: Embodiments of the disclosure relate to apparatus and method for tunable a plasma process within a plasma processing chamber. In one embodiment of the disclosure, a heater assembly for a plasma processing chamber is disclosed. The heater assembly includes a resistive heating element, a first lead coupling the resistive heating element to an RF filter and a tunable circuit element operable to adjust an impedance between the resistive heating element and the RF filter. Another embodiment provides a method for controlling a plasma process in a plasma processing chamber by forming a plasma from a process gas present inside the plasma processing chamber and adjusting an impedance between a resistive heating element and an RF filter coupled between the resistive heating element and a power source for the resistive heating element, while the plasma is present in the plasma processing chamber.

Abstract: A plasma gate device comprises a housing, a gas inlet, first and second dielectrics, and first, second, and third electrodes. The housing includes an internal reactor chamber. The gas inlet receives a source gas that flows to the reactor chamber. The first and second dielectrics are spaced apart from one another, with each dielectric including an upper surface and a lower surface. The two dielectrics are oriented such that the lower surface of the first dielectric faces the upper surface of the second dielectric. The first and second dielectrics form boundaries of the reactor chamber. The first electrode receives a first electric voltage. The second electrode receives a second electric voltage. The first and second electric voltages in combination generate an electric field in the reactor chamber through which the source gas flows creating a positive ion plasma and a cloud of electrons. The third electrode attracts the electrons.

Abstract: An apparatus includes a reactive species source, a spectral measurement volume, a light source to emit a light beam into the spectral measurement volume, a spectrometer to receive the light beam from the spectral measurement volume. The apparatus includes an a controller configured to, when a reactive species is present in the spectral measurement volume, control the light source to emit the light beam into the spectral measurement volume and the spectrometer to determine an environment spectrum using the light beam, and when the reactive species is not present in the spectral measurement volume, control the light source to emit the light beam into the spectral measurement volume and the spectrometer to determine a baseline spectrum using the light beam, calculate a net spectrum based on a difference between the environment spectrum and the baseline spectrum, and estimate a concentration of the reactive species based on the net spectrum.

Abstract: Implementations of the present disclosure relate to a sputtering target for a sputtering chamber used to process a substrate. In one implementation, a sputtering target for a sputtering chamber is provided. The sputtering target comprises a sputtering plate with a backside surface having radially inner, middle and outer regions and an annular-shaped backing plate mounted to the sputtering plate. The backside surface has a plurality of circular grooves which are spaced apart from one another and at least one arcuate channel cutting through the circular grooves and extending from the radially inner region to the radially outer region of sputtering plate. The annular-shaped backing plate defines an open annulus exposing the backside surface of the sputtering plate.

Abstract: A system and method are described for depositing a material onto a receiving surface, where the material is formed by use of a plasma to modify a source material in-transit to the receiving surface. The system comprises a microwave generator electronics stage. The system further includes a microwave applicator stage including a cavity resonator structure. The cavity resonator structure includes an outer conductor, an inner conductor, and a resonator cavity interposed between the outer conductor and the inner conductor. The system also includes a multi-component flow assembly including a laminar flow nozzle providing a shield gas, a zonal flow nozzle providing a functional process gas, and a source material flow nozzle configured to deliver the source material. The source material flow nozzle and zonal flow nozzle facilitate a reaction between the source material and the functional process gas within a plasma region.

Abstract: The present invention relates to an apparatus (1) for particle measurement. The apparatus (1) comprising a mixing chamber (16) having a sample inlet (14), an ionized gas outlet (12) for feeding ionized clean gas into the mixing chamber (16), and a mixing chamber outlet (18) for discharging mixed sample aerosol formed in the mixing chamber (16). The apparatus further comprises a sample channel (34) connected to the sample inlet (14) and extending in a first supply direction, a sample supply connection (50) arranged to supply sample aerosol to the sample channel (34) and a sample supply channel (52) connected to the sample supply connection (50) in a second supply direction transverse to the first supply direction. The sample supply connection (50) is arranged to supply the sample aerosol from the sample supply channel (52) to the sample channel (34) as a swirling sample aerosol flow.

Abstract: Processes and methods for modeling non-linear calibration behavior resulting from isotopic interference between a target analyte and an internal standard during a mass spectrometry operation are disclosed and described. In some embodiments, a correction to instrument data obtained during the mass spectrometry operation can be made. Such a correction may entail determining, in some cases experimentally determining, one or two constants, and a single adjustable parameter for each analyte/internal standard pair.

Abstract: The invention generally relates to systems and methods for conducting neutral loss scans in a single ion trap. In certain aspects, the invention provides systems that include a mass spectrometer having a single ion trap, and a central processing unit (CPU), and storage coupled to the CPU for storing instructions that when executed by the CPU cause the system to apply a scan function that excites a precursor ion, rejects the precursor ion after its excitation, and ejects a product ion in the single ion trap.

Abstract: A monocrystalline semiconductor wafers have an average roughness Ra of at most 0.8 nm at a limiting wavelength of 250 ?m, and an ESFQRavg of 8 nm or less given an edge exclusion of 1 mm. The wafers are advantageously produced by a method comprising the following steps in the indicated order: simultaneous double-side polishing of the semiconductor wafer, b) local material-removing processing of at least one part of at least one side of the semiconductor wafer using a fluid jet which contains suspended hard substance particles and which is directed onto a small region of the surface with the aid of a nozzle, wherein the nozzle is moved over that part of the surface which is to be treated in such a way that a predefined geometry parameter of the semiconductor wafer is improved, and c) polishing of the at least one surface of the semiconductor wafer.

Abstract: Methods and systems relating to processes for treating a silicon nitride film on a workpiece including supporting the workpiece in a chamber, introducing an amine gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the silicon nitride film on the workpiece to the amine gas while the pressure in the chamber is at least 5 atmospheres.

Abstract: There is provided a method of forming a silicon nitride film including: arranging substrates in a process vessel; and forming a silicon nitride film on the substrates in a batch by repeating a cycle including: a first purge step of purging the process vessel while heating the process vessel and making an interior of the process vessel be in a predetermined depressurized state; a film-forming raw material gas adsorbing step of adsorbing a chlorine-containing silicon compound to the substrates by supplying a film-forming raw material gas composed of the chlorine-containing silicon compound into the process vessel; a second purge step of purging the process vessel; and a nitriding step of nitriding the substrates by supplying a nitriding gas into the process vessel, and wherein in each of the cycle, a hydrogen radical purge step is performed between the film-forming raw material gas adsorbing step and the nitriding step.

Abstract: A photosensitive resin composition which contains a compound represented by general formula (1). (In general formula (1), R1-R4 may be the same or different, and each represents a hydrogen atom or an organic group having 1-4 carbon atoms; and X represents a tetravalent organic group having two or more structural units represented by general formula (2) in the main chain.) (In general formula (2), R5 represents a hydrogen atom or an alkyl group having 1-20 carbon atoms, and a plurality of R5s in the same molecule may be the same or different.) Provided is a photosensitive resin composition which enables the achievement of a cured film having low stress after being heated and fired, and which has excellent long-term stability, high sensitivity and high resolution.

Abstract: A pattern-forming method includes: forming a pattern on an upper face side of a substrate; applying a first composition to a sidewall of the pattern; forming a resin layer by applying a second composition to an inner face side of the sidewall of the pattern coated with the first composition; allowing the resin layer to separate into a plurality of phases; and removing at least one of the plurality of phases. The first composition contains a first polymer. The second composition contains a second polymer. The second polymer includes a first block having a first structural unit and a second block having a second structural unit. The polarity of the second structural unit is higher than the polarity of the first structural unit. Immediately before forming of the resin layer, a static contact angle ? (°) of water on the sidewall of the pattern satisfies inequality (1).

Abstract: Embodiments of the disclosure relate to methods of selectively depositing organic and hybrid organic/inorganic layers. More particularly, embodiments of the disclosure are directed to methods of modifying hydroxyl terminated surfaces for selective deposition of molecular layer organic and hybrid organic/inorganic films. Additional embodiments of the disclosure relate to cyclic compounds for use in molecular layer deposition processes.

Abstract: Dielectric composite films characterized by a dielectric constant (k) of less than about 7 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers. The dielectric composite film in one embodiment includes Al, Si, and O and has a thickness of between about 10-100 ?. The dielectric composite film can reside between two layers of inter-layer dielectric, and may be in contact with metal layers. An apparatus for depositing such dielectric composite films includes a process chamber, a conduit for delivering an aluminum containing precursor to the process chamber, a second conduit for delivering a silicon-containing precursor to the process chamber and a controller having program instructions for depositing the dielectric composite film from these precursors, e.g., by reacting the precursors adsorbed to the substrate with an oxygen-containing species.

Abstract: Described herein are functionalized cyclosilazane precursor compounds and compositions and methods comprising same to deposit a silicon-containing film such as, without limitation, silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, silicon oxycarbonitride, or carbon-doped silicon oxide via a thermal atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD) process, or a combination thereof.

Abstract: A method of forming a thin film and an integrated circuit device, including forming a first reaction inhibiting layer chemisorbed on a first portion of a lower film by supplying a reaction inhibiting compound having a carbonyl group to an exposed surface of the lower film at a temperature of about 300° C. to about 600° C.; forming a first precursor layer of a first material chemisorbed on a second portion of the lower film at a temperature of about 300° C. to about 600° C., the second portion being exposed through the first reaction inhibiting layer; and forming a first monolayer containing the first material on the lower film by supplying a reactive gas to the first reaction inhibiting layer and the first precursor layer and removing the first reaction inhibiting layer from the surface of the lower film, and thus exposing the first portion.

Abstract: In one aspect, a method for forming a doped III-V semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element, wherein a dopant is selectively introduced only during formation of the second monolayer, and wherein steps (a) and (b) are performed using atomic layer epitaxy. Doped III-V semiconductor materials are also provided.

Abstract: This application relates to the technical field of semiconductors, and teaches methods for manufacturing a semiconductor structure. One implementation of a method includes: forming a semiconductor layer at a surface of a to-be-etched material layer on a substrate; forming an amorphous carbon layer on the semiconductor layer; forming a patterned mask layer on the amorphous carbon layer; and etching the amorphous carbon layer, the semiconductor layer, and the to-be-etched material layer using the patterned mask layer as a mask. This application may improve uniformity of the amorphous carbon layer, so that a position of a pattern that is formed after the to-be-etched material layer is etched does not deviate from an expected position, and a shape of the pattern is an expected shape.

Abstract: A manufacturing method of a semiconductor structure includes the following steps. A first polysilicon layer is formed on a substrate. A planarization process to the first polysilicon layer is performed. A first etching back process to the first polysilicon layer is performed after the planarization process. A second etching back process to the first polysilicon layer is performed after the first etching back process. A first wet clean process to the first polysilicon layer is performed after the first etching back process and before the second etching back process.

Abstract: Embodiments of the disclosure relate to selective metal silicide deposition methods. In one embodiment, a substrate having a silicon containing surface is heated and the silicon containing surface is hydrogen terminated. The substrate is exposed to sequential cycles of a MoF6 precursor and a Si2H6 precursor which is followed by an additional Si2H6 overdose exposure to selectively deposit a MoSix material comprising MoSi2 on the silicon containing surface of the substrate.

Abstract: Methods and systems relating to processes for treating a tungsten film on a workpiece including supporting the workpiece in a chamber, introducing hydrogen gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the tungsten film on the workpiece to the hydrogen gas while the pressure in the chamber is at least 5 atmospheres.

Abstract: A laser doping device includes: a solution supply system configured to supply a solution containing dopant to a doping region; a pulse laser system configured to output pulse laser light including a plurality of pulses, the pulse laser light transmitting through the solution; a first control unit configured to control a number of pulses of the pulse laser light for allowing the doping region to be irradiated, and to control a fluence of the pulse laser light in the doping region; and a second control unit configured to control a flow velocity of the solution so as to move bubbles, from the doping region, occurring in the solution every time of irradiation with the pulse.

Abstract: A wafer processing method for processing a wafer includes an annular groove forming step, a close contact making step, a protective member fixing step, a grinding step, and a peeling step. The wafer has a device area and a peripheral marginal area surrounding the device area on the front side, and devices each having asperities are formed in the device area. In the annular groove forming step, an annular groove is formed on the front side of the wafer along the inner circumference of the peripheral marginal area. In the close contact making step, the device area and the annular groove are covered with a protective film, and the protective film is bring into close contact with the front side of the wafer.

Abstract: A method for patterning a substrate including multiple layers using a sulfur-based mask includes providing a substrate including a first layer and a second layer arranged on the first layer. The first layer includes a material selected from a group consisting of germanium, silicon germanium and type III/V materials. The method includes depositing a mask layer including sulfur species on sidewalls of the first layer and the second layer by exposing the substrate to a first wet chemistry. The method includes removing the mask layer on the sidewalls of the second layer while not completely removing the mask layer on the sidewalls of the first layer by exposing the substrate to a second wet chemistry. The method includes selectively etching the second layer relative to the first layer and the mask layer on the sidewalls of the first layer by exposing the substrate to a third wet chemistry.

Abstract: A method for manufacturing a semiconductor device includes: forming a multilayered epitaxial structure on a substrate; applying a novolac-based resist on the multilayered epitaxial structure and patterning the resist through transfer; tapering a shape of the patterned resist by baking; dry-etching the multilayered epitaxial structure using the tapered resist as a mask; and after the dry etching, removing the resist and forming a coating film on the multilayered epitaxial structure, wherein an etching selection ratio between the resist and the multilayered epitaxial structure in the dry etching is controlled to 0.8 to 1.2 so that an inclination is formed in the multilayered epitaxial structure.

Abstract: An etching method includes a loading step of loading into a chamber a target substrate in which a mask film is laminated on an organic film; a first etching step of etching the organic film below the mask film by plasma of a processing gas in which a flow rate ratio of a second gas containing sulfur to a first gas containing oxygen is set to a first flow rate ratio; and a second etching step of further etching the organic film by plasma of a processing gas in which a flow rate ratio of the second gas to the first gas is set to a second flow rate ratio different from the first flow rate ratio. The first etching step and the second etching step are alternately performed multiple times.

Abstract: A method for producing a solar cell, which produces a single-crystal silicon solar cell by using a single-crystal silicon substrate, including: a high-temperature heat treatment process in which the single-crystal silicon substrate is subjected to heat treatment at 800° C. or higher and 1200° C. or lower, wherein the high-temperature heat treatment process includes a conveying step of loading the single-crystal silicon substrate into a heat treatment apparatus, a heating step of heating the single-crystal silicon substrate, a temperature keeping step of keeping the single-crystal silicon substrate at a predetermined temperature of 800° C. or higher and 1200° C. or lower, and a cooling step of cooling the single-crystal silicon substrate, and, in the high-temperature heat treatment process, the length of time during which the temperature of the single-crystal silicon substrate is 400° C. or higher and 650° C. or lower is set at 5 minutes or less throughout the conveying step and the heating step.

Abstract: A process to selectively etch a substrate surface comprising multiple metal oxides comprising exposing the substrate surface to a halogenation agent, and then exposing the substrate surface to a ligand transfer agent. The etch rate of the metals in the multiple metal oxides is substantially uniform.

Abstract: A packaging structure and a method of forming a packaging structure are provided. The packaging structure, such as an interposer, is formed by optionally bonding two carrier substrates together and simultaneously processing two carrier substrates. The processing includes forming a sacrificial layer over the carrier substrates. Openings are formed in the sacrificial layers and pillars are formed in the openings. Substrates are attached to the sacrificial layer. Redistribution lines may be formed on an opposing side of the substrates and vias may be formed to provide electrical contacts to the pillars. A debond process may be performed to separate the carrier substrates. Integrated circuit dies may be attached to one side of the redistribution lines and the sacrificial layer is removed.