Abstract: A current sensor is configured by at least one magnetoelectric conversion element, a conductor, and a signal processing IC being encapsulated by an encapsulating portion. The current sensor includes a pair of first lead terminals that is partially exposed outside of the encapsulating portion, is electrically connected to the conductor, inputs the measurement current to the conductor, and outputs the measurement current from the conductor; a metal member that is partially exposed outside the encapsulating portion and is spaced apart from the conductor; and a supporting portion that supports the at least one magnetoelectric conversion element, the signal processing IC, and the metal member on a first surface, is separated from the conductor, and is separate from the metal member.

Abstract: A system for generation of electrical power including an inverter connected to a photovoltaic source including a theft prevention and detection feature. A first memory is permanently attached to the photovoltaic source. The first memory is configured to store a first code. A second memory is attached to the inverter. The second memory configured to store a second code. During manufacture or installation of the system, the first code is stored in the first memory attached to the photovoltaic source. The second code based on the first code is stored in the second memory. Prior to operation of the inverter, the first code is compared to the second code and based on the comparison; the generation of the electrical power is enabled or disabled.

Abstract: A sensor device coupled to a communication interface bus, the sensor device includes: a current source having a first terminal operable to receive a supply current, a second terminal operable to provide a supply current, and a control terminal, wherein an operating voltage is supplied by a current through the current source; a voltage clamp having a first terminal coupled to the second terminal of the current source, a second terminal coupled to a power supply terminal, and an output terminal operable to provide a current sense signal; and a control circuit having an input terminal coupled to the output terminal of the voltage clamp and an output terminal coupled to the control terminal of the current source operable to provide an adjustment signal responsive to the current sense signal, wherein the current source is configured to adjust the current through the current source responsive to the adjustment signal.

Abstract: A method for measuring the hardware and operational state of a dual-circuit solenoid valve including first and second coaxial coils each associated with a circuit is disclosed. The method includes the steps of injecting a sinusoidal current into the first coil; measuring the voltage induced across the terminals of the second coil; and plotting at least one curve of a first magnitude proportional to the measured induced voltage as a function of a second magnitude proportional to the injected sinusoidal current.

Abstract: An output voltage protection controller includes a comparator circuit and a voltage adjustment circuit. The comparator circuit compares a first voltage signal with a second voltage signal to generate a control signal that controls output voltage protection of a voltage regulator, wherein one of the first voltage signal and the second voltage signal is a feedback voltage derived from an output voltage of the voltage regulator, and another of the first voltage signal and the second voltage signal is a voltage detection threshold. The voltage adjustment circuit injects an offset voltage to the second voltage signal for dynamically adjusting the second voltage signal during a period in which a target regulated voltage level of the output voltage is a constant.

Abstract: A method of generating an analytical signal for signal analysis. The method includes obtaining a digital signal, sectioning the digital signal into a series of overlapping windows in time domain, generating a plurality of energy pulses by evaluating a function that describes energy information within each window or set of windows, and generating a time-dependent analytical signal by generating an oscillating signal by multiplying each of the plurality of energy pulses by an oscillating function; and integrating the oscillating function across a band pass frequency filter.

Abstract: Various embodiments are directed to apparatuses and methods for testing an electrical circuit related to an electrical circuit. The electrical testing meter may generate electrical measurement data based at least in part on electrical signals received via at least one electrical measurement terminal in contact with one or more references points of the electrical circuit. Electrical circuit characteristic data may be generated based at least in part on the electrical measurement data. The electrical measurement data and/or the electrical circuit characteristic data may be transmitted to one or more remote computing entities to generate a consolidated record of electrical measurement data for the electrical circuit, which may be rendered for display at the one or more remote computing entities. The transmitted data may be stored for future reproduction and/or analysis.

Abstract: A method and transmitter for determining voltage standing wave ratios, VSWR, of an antenna array having multiple subarrays, each subarray having two branches. According to one aspect, a method includes grouping the branches of the 5 antenna array to form a number of groups, each group being formed so that nearest branches in group are separated by at least one branch not in the group. For each group, the method includes combining reflected signals from the branches of the group to produce a first signal YREFL and combining forward signals from the 10 branches of the group to produce a second signal YFWD; calculating a reflected power PREFL and a forward power PFWD and calculating a VSWR for the group based on the reflected power PREFL and the forward power PFWD.

Abstract: A load-pull measurement system uses a PC controller, interface, calibration method and at least one new two-probe, waveguide slide screw impedance tuner; the tuner probes share the same waveguide section; they are inserted diametrically at fixed depth into facing each other slots on opposite broad walls of the waveguide. The tuner does not have cumbersome adjustable vertical axes controlling the penetration of the probes and its low profile is optimized for on-wafer operations. The carriages holding the probes are moved along the waveguide using electric stepper motors or linear actuators.

Abstract: According to one embodiment, a detection apparatus includes a pair of conductors configured to detect an electromagnetic wave occurring due to a discharge phenomenon in a target apparatus, wherein the pair of conductors are arranged in a near field region of the target apparatus in which the electromagnetic wave occurs.

Abstract: An apparatus for a mmWave RF scanner system is described that enables multiple modes of operation. The disclosed RF scanner may be configured to perform a variety of independent tasks, including antenna measurement in far-field or near-field mode, active array characterization, radome measurements, and material characterization. To achieve all proposed measurements, a nine-axis RF scanner system is disclosed. For all modes, the system may use a two-port vector network analyzer (100 kHz to 9 GHz) connected to a plurality of frequency extenders that increases the operating range from 75 GHz to 110 GHz. The system may also include a graphical user interface for autonomous operation in each mode.

Abstract: A system for the automated validation of a semi-anechoic chamber (SAC) is disclosed. The system includes a receive assembly and a transmit assembly, each configured to autonomously relocate within the SAC. The system also includes a local client communicatively coupled to the transmit assembly. The local client is configured to send a validation arrangement to the transmit assembly describing a validation location and a distance. The transmit assembly is configured to receive the validation arrangement, move the transmit assembly to the validation location and send an instruction to the receive assembly, the instruction describing the distance. The receive assembly is communicatively coupled to the transmit assembly and configured to receive the instruction and move the receive assembly such that a separation between the transmit and receive assemblies is restored to the distance. Each validation arrangement corresponds to a validation point. A plurality of validation points defines a test volume.

Abstract: A method and apparatus for identifying a fault in an alternating current electrical grid is provided.

Abstract: The invention relates to a member (O1) for measuring a magnitude representative of a common mode voltage (Vres) in an electrical network (1) or in an equipment (E), the network (1) or the equipment (E) comprising at least one first power conductor (C1) and a second power conductor (C2). The measuring member (O1) comprises a sensor formed by two resistive elements (R1, R2) which are intended to be arranged in a bridge between the two power conductors (C1, C2) and have resistance values which are identical to each other. The two resistive elements (R1, R2) are connected at a midpoint (T3). The sensor also comprises a measuring dipole (SH) connected to the midpoint (T3) and to a connection terminal intended to be electrically connected to a common conductor (Cc), of which the electrical network (1) or the equipment (E) has been equipped.

Abstract: A method for detecting faults on an electrical line includes feeding a measurement signal to a first location on the line by using a measuring assembly, receiving a reflected measurement signal at the first location, and determining a fault location on the line on the basis of the period of time until the reflected measurement signal is received while considering a line attenuation. A reflection location on the line where the measurement signal is reflected is used, and the line attenuation is determined on the basis of the level of the reflected measurement signal received at the first location. A corresponding measuring assembly is also provided.

Abstract: The invention relates to a test device (1) for testing the insulation of an electrical line (2), in particular a cable or a cable harness, for detecting error points in the insulation of the electrical line (2). The test device (1) comprises a scalable, evacuable chamber (3) for completely accommodating the electrical line (2) to be tested, wherein at least one electrical connection point (6), preferably in the form of a plug device part, for connecting the electrical line (2) to be tested is arranged inside the chamber (3) and an electrical feedthrough (7) leads from the connection point (6) out of the chamber (3).

Abstract: Techniques for isolating interfaces while testing a semiconductor device include a semiconductor device having a link interface that couples the semiconductor device to a high-speed data transfer link, a clock control unit that transmits one or more clock signals to the link interface; and a protection module. The protection module asserts a clock stop request to the clock control unit and, in response to receiving a clock stop acknowledgement from the clock control unit, asserts a clamp enable to cause the link interface to be isolated from portions of the semiconductor device. After waiting for a first predetermined period of time to expire, the protection module de-asserts the clock stop request.

Abstract: Provided are a parasitic capacitance detection method, a memory, and a readable storage medium, relating to the field of semiconductor technologies. The detection method comprises: providing a plurality of semiconductor devices for testing, all the semiconductor devices being the same in a number of sources, a number of drains, a number of active layers, a number of gates, a number of wires and a cross-sectional area of the wire, all the semiconductor devices being different in a length of the wire therein; determining a capacitance between the wire per unit length and the gate in the semiconductor device, the capacitance between the wire per unit length and the gate being considered as a parasitic capacitance per unit length; determining a corresponding wire length of a to-be-detected semiconductor device; and determining a parasitic capacitance of the to-be-detected semiconductor device.

Abstract: In accordance with at least one aspect of this disclosure, a failure detection system for an integrated circuit component includes an integrated circuit component configured to connect to a circuit board, a first sensor operatively connected to sense and output a signal indicative of an actual current output of the component in a first state, and a second sensor operatively connected to sense and output a signal indicative of an actual condition of the component in the first state. A logic module can be configured to output a component failed state signal based at least in part on the signal indicative of the actual current output of the component in the first state and the signal indicative of the actual condition of the component in the first state.

Abstract: A transfer apparatus for an inspection apparatus according to one embodiment of the present disclosure includes: an upper end engaging portion configured to make contact with an upper surface of a transferred article; a support frame to which the upper end engaging portion is fixed; a lift including a support part configured to support a lower surface of the transferred article, the lift arranged on the support frame to be movable in an up-down direction; and a lifting driver configured to provide a driving force to move the lift in the up-down direction.

Abstract: This application discloses an electrical control device detection circuit, a detection method, and an electric vehicle. The detection circuit includes a drive circuit configured to detect an electrical control device. The drive circuit includes a drive power module, a high-side switch unit, and a low-side switch unit. The detection circuit includes: a detection power module, a first switch module, a second switch module, a first detection module, a second detection module, and a control module. The control module is configured to obtain an electrical signal at a third end of the first detection module and/or an electrical signal at a second end of the second detection module; and determine, based on the electrical signal at the third end of the first detection module and/or the electrical signal at the second end of the second detection module, whether a fault occurs in the drive circuit of the electrical control device.

Abstract: An example test system includes test sites that include sockets for testing devices under test (DUTs), pickers for picking DUTs from the sockets or placing the DUTs in the sockets, and a gantry on which the pickers are mounted. The gantry is configured to move the pickers relative to the test sites to position the pickers for picking the DUTs from the sockets or placing the DUTs into the sockets. The test system also includes one or more LASER range finders mounted on the gantry for movement over the DUTs in the sockets and in conjunction with movement of the pickers. A LASER range finder among the one or more LASER rangefinders mounted on the gantry is configured to detect a distance to a DUT placed into a socket.

Abstract: The present disclosure provides a process variation detection circuit and a process variation detection method. The process variation detection circuit is arranged in a chip and includes: a first ring oscillator, where a first number of auxiliary elements of a preset type are arranged between two adjacent inverters of the first ring oscillator; and a second ring oscillator, where a second number of auxiliary elements of a preset type are arranged between two adjacent inverters of the second ring oscillator, the second number is larger than the first number; wherein, a number of the inverter of the first ring oscillator is the same as a number of the inverter of the second ring oscillator; a type and a size of a transistor of the first ring oscillator are the same as a type and a size of a transistor of the second ring oscillator.

Abstract: A wafer-level method of testing an integrated circuit (IC) device includes: (i) applying a plurality of test operation signals to a wafer containing the IC device, (ii) generating a test enable signal in response to detecting, on the wafer, a toggling of at least one of the plurality of test operation signals, and then (iii) testing at least a portion of the IC device in response to the generating the test enable signal. The generating may also include generating a test enable signal in response to detecting, on the wafer, an inactive-to-active transition of a toggle detection signal.

Abstract: A contact assembly for a Kelvin testing system for testing integrated circuit devices is disclosed. The contact assembly includes at least one grouping of blades including a first force blade, a second force blade, a first sense blade, and a second sense blade; an electrical insulation layer disposed between the first force blade and the first sense blade and between the second force blade and the second sense blade; and an elongated elastomer. The elastomer is configured to be retained by the first force blade, the second force blade, the first sense blade, and the second sense blade. Each of the first force blade, the second force blade, the first sense blade, and the second sense blade includes a recess having an opening and sized to receive and retain at least a portion of the elastomer.

Abstract: A probe assembly and a micro vacuum probe station comprising same are disclosed. A probe assembly according to one embodiment may comprise: a base; a guide rail installed on the base; a guide member sliding along the guide rail; a probe connected to the guide member and of which one side contacts a wafer to inspect electrical properties of the wafer; and a thin film connector connected to the other side of the probe so as to supply electricity to the probe.

Abstract: A system, comprising: (i) an interposer layer; (ii) a circuit layer positioned on the interposer layer and comprising a plurality of sonically-enabled pads; and (iii) an interrogator layer positioned on the circuit layer and comprising a plurality of ultrasonic transducers configured to sonically interrogate the circuit layer; wherein the sonically-enabled pads are configured to generate an electrical signal in response to sonic interrogation from the interrogator layer, if the sonically-enabled pad is functional.

Abstract: The present disclosure provides a memory device test method, apparatus, and system, a medium, and an electronic device. The memory device test method includes: determining an operation path according to position coordinates of a target test platform and current position coordinates of a memory device; setting a movable apparatus according to the operation path, such that the movable apparatus moves the memory device into the target test platform according to the operation path; controlling the target test platform to test the memory device according to a target test program; and monitoring a test result of the memory device in real time, and storing the test result of the memory device into a database.

Abstract: This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be used for a variety of serial communication operations such as, but not limited to, serial communication related test, emulation, debug, and/or trace operations of an IC or core design. Other aspects of the disclosure include the use of reduced pin buses for emulation, debug, and trace operations and for functional operations.

Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally.

Abstract: Embodiments of the present disclosure provide a test method and apparatus for a control chip, and an electronic device, which relate to the field of semiconductor device test technologies. The control chip includes a built-in self-test BIST circuit. The method is performed by the BIST circuit. The method includes: reading first test vectors stored in a first target memory chip; sending the first test vectors to the control chip; receiving first output information returned by the control chip in response to the first test vectors; and acquiring a first test result of the control chip based on the first output information and the first test vectors corresponding to the first output information. By means of the technical solutions provided in the embodiments of the present disclosure, so that a storage space for test vectors can be enlarged, and the test efficiency can be increased.

Abstract: A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the system. The method further comprises powering up a second remote device while the host device and first remote device are actively operating according to the state diagram. The second remote device waits for a synchronization point sequence. Upon detecting the synchronization point sequence, the second remote device implements a predetermined feature set and synchronizes itself to the state diagram at a common point as the host device and first remote device.

Abstract: The present application provides a parameter setting method and apparatus, a system, and a storage medium. The parameter setting method includes: obtaining first setting values of multiple memory parameters and storage locations of the multiple memory parameters in a non-volatile memory; generating a first parameter setting instruction according to the first setting value and the storage location of each memory parameter; and sending the first parameter setting instruction to a test device, so that the test device sets the memory parameter stored at the storage location in the non-volatile memory as the first setting value.

Abstract: An apparatus includes a safety fault interrupter circuit. The safety fault interrupter circuit includes a safety fault monitor coupled to a first bias node and configured to selectively assert a fault interrupter signal based at least in part on a first bias voltage and a first power consumption. The safety fault interrupter circuit also includes a power fault monitor for the safety fault monitor, wherein the power fault monitor is coupled to a second bias node and is configured to selectively assert the fault interrupter signal based at least in part on a second bias voltage and a second power consumption that is less than the first power consumption.

Abstract: A method may comprise: controlling ON/OFF switching of a power switch via a driver circuit; receiving a first signal on a detection pin associated with the power switch, wherein the first signal corresponds to a first point in time when current is not passing through the power switch and wherein the first signal indicates a first voltage drop over one or more other circuit elements; receiving a second signal on the detection pin, wherein the second signal, wherein the second signal corresponds to a second point in time when current is passing through the power switch and wherein the second signal indicates a voltage drop over the power elements; and determining the voltage drop over the power switch based on a difference between the first signal and the second signal.

Abstract: A method and system for monitoring condition of a fleet of circuit breakers includes: measuring at least one type of operating condition related signal for the respective circuit breakers during their operation; obtaining a set of feature data representing the respective measurements of operating condition related signal; performing cluster analysis of the set of feature data based on a similarity threshold; and generating a signal indicating the condition of the fleet of circuit breakers based on the resulting cluster number. Rather than comparing the data representing the measurements of operating condition related signal to a reference model built on CB's normal data, the method includes applying cluster analysis of the set of feature data representing the respective measurements of operating condition related signal. The method does not need a reference “normal” database for comparison.

Abstract: A method checks a functionality of a solenoid valve for a brake system in a motor vehicle. The solenoid valve includes an armature and a coil. The armature, on actuation of the solenoid valve, is moved by a magnetic field of the coil, reducing an air gap of the solenoid valve defined by a position of the armature. The method includes measuring an electric current during the actuation of the solenoid valve, analysing a characteristic of the electric current during the actuation of the solenoid valve, and assessing the functionality of the solenoid valve based on the analysis of the characteristic of the electric current.

Abstract: A battery micro-short circuit detection method and apparatus are disclosed. The method includes: obtaining a target initial battery parameter value of a target battery at an initial moment, and determining a reference initial battery parameter value of a virtual reference battery at the initial moment, where a response of the virtual reference battery is the same as a response of the target battery when a same excitation condition is given; obtaining a target battery parameter value of the target battery at a specified moment; determining a reference battery parameter value of the virtual reference battery at the specified moment based on the target battery parameter value and the reference initial battery parameter; and calculating a difference between the target battery parameter value and the reference battery parameter value, and determining, based on the difference, that the target battery is micro-short-circuited.

Abstract: A battery system includes a plurality of battery modules and a control apparatus. The battery includes a battery group that includes two or more battery modules including battery units and battery monitoring units. The battery monitoring units of the battery modules being connected to each other via a communication line. The battery modules perform wired communication via the communication line. The battery group further includes a wireless receiving unit and a wireless transmitting unit. The wireless receiving unit wirelessly receives a command signal transmitted from the control apparatus. The wireless transmitting unit wirelessly transmits, to the control apparatus, a data signal including module identification information differing for each battery module. In the battery group, the wireless receiving unit is provided in a single battery module of the battery modules and the wireless transmitting unit is provided in a single battery module of the battery modules.

Abstract: A pluggable state-of-charge (SOC) indicator and methods of use are disclosed. The pluggable SOC indicator includes at least one voltage input jack for connecting to a battery, at least one instance of control electronics, and at least one SOC indicator, such as a 5-bar liquid crystal display (LCD). Embodiments of the pluggable SOC indicator include, but are not limited to, a pluggable single-connector SOC indicator, a pluggable dual-connector SOC indicator, a pluggable tri-connector SOC indicator, and a pluggable quad-connector SOC indicator. Further, the control electronics are programmable for any input voltage range and/or battery discharge characteristics.

Abstract: A battery voltage measurement circuit includes: a first switch configured to be connected to a positive electrode of a battery; a second switch configured to be connected to a negative electrode of the battery; detection resistances that are connected in series between the first switch and the second switch; capacitors that are connected in parallel to the detection resistances; and a measurement circuit that measures a voltage applied to the detection resistances. The battery voltage measurement circuit has a plurality of measurement modes depending upon status of the first and second switches, and further has a failure detection mode for the capacitors based on a change in the voltage after switching from one to an other of the measurement modes.

Abstract: A system, a method, and a computer program product for providing heterogeneous unifying battery storage. A state-of-health value of a battery is determined. The state-of-health value of the battery is less than an original capacity value of the battery. The battery is connected to an electrical power source for re-conditioning. A target state-of-health value for the battery and a number of cycles required to achieve the target state-of-health value of the battery are determined. Each cycle in the number of cycles includes at least one of: a charging the battery and a discharging the battery. The battery is re-conditioned by cycling the battery using the determined number of cycles. Cycling includes drawing electrical power from the electrical power source.

Abstract: A method for predicting time-to-failure and remaining-life of an electrical power system asset includes analyzing characteristics of the power system asset over a specified time interval; based on the analysis, associating the power system asset with a pool of similar power system assets having similar historical performance characteristics; and based on the association, calculating time-to-failure and remaining-life probability factors for the power system asset. A computer program product is also provided for carrying out the method, and the method may further include a mechanism whereby the computer program learns ways to modify and enhance the analysis of the performance characteristics to provide for higher confidence levels in time-to-failure and remaining-life probability calculations.

Abstract: Methods and devices for detecting electrical arcs are provided. A first wavelet transformation with a first mother wavelet is applied to a chronological sequence of current measurements (80) of a current through a lead, to obtain first wavelet coefficients. In addition, a second wavelet transformation with a second mother wavelet different from the first mother wavelet is applied to the chronological sequence in order to obtain second wavelet coefficients. On the basis of the first wavelet coefficients and the second wavelet coefficients, it is then determined whether an arc (10; 11; 24) is present.

Abstract: A monitoring system, method, and device for sealing electrical equipment (10) and electrical equipment (10) with monitored sealing, including at least one sensor set (100), at least one signaling system (15) and at least one drying system (300), wherein the sensor set (100) includes at least one moisture sensor (20) and at least one liquid presence sensor (25) connected to at least one centralizing element (30), wherein the centralizing element (30) is configured to receive data from at least the sensors and generate outputs corresponding thereto, defining the type of liquid in contact with a sensor, assessing the integrity of the sealing system, and detecting the loss of efficiency of the drying system (300). The system may be configured to detect trends and automatically generate alarms and recommendations, mitigating the from inspections of sealing systems on electrical equipment (10) while enhancing the reliability of the operation, lowering costs and enhancing safety and security.

Abstract: A dual integrator system comprises two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a first integrator signal based on the differential Hall sensor and the reference voltage. The second integrator outputs a second integrator signal based on the differential Hall sensor signal and the reference voltage. The first integrator comprises a first offset cancellation feedback loop, and the second integrator comprises a second offset cancellation feedback loop. The switching network is coupled to the first and second integrators and to the output stage, and alternates which of the first and second integrators is coupled to the output stage. In some embodiments, the first and second integrators each perform a reset operation, a sampling operation, an integration operation, a differential to single-ended conversion operation, and a holding operation.

Abstract: Systems and methods to use customized quality control tasks for non-destructive testing (NDT) are disclosed. An example NDT system includes at least one of a magnetic particle inspection device or a penetrant testing device, a user interface device, a processor, and a memory coupled to the processor and storing machine readable instructions. When executed, the instructions cause the processor to: access a quality verification procedure comprising a plurality of tasks and corresponding task definitions; display one or more of the plurality of tasks based on statuses of the plurality of tasks; receive one or more results associated with the one or more of the plurality of tasks; store the one or more results in association with the magnetic particle inspection device or the penetrant testing device; and control at least one aspect of the magnetic particle inspection device or the penetrant testing device based on the one or more results.

Abstract: A quantum Hall resistance apparatus is to improve resistance standards and includes a substrate, a graphene epitaxially grown on the substrate and having a plurality of first contact patterns at edges of the graphene, a plurality of contacts, each including a second contact pattern and configured to connect to a corresponding first contact pattern, and a protective layer configured to protect the graphene and to increase adherence between the first contact patterns and the second contact patterns. The contacts become a superconductor at a temperature lower than or equal to a predetermined temperature and under up to a predetermined magnetic flux density.

Abstract: Various embodiments comprise a laser bonded glass-silicon vapor cell for performing spectroscopy on particles like atoms or molecules. In some examples, the laser bonded glass-silicon vapor cell comprises a glass base, a glass top, a silicon piece, and a filling material. The silicon piece comprises at least one through hole. The lower surface of the silicon piece is hermetically bonded to the glass base. The upper surface of the silicon piece is laser bonded to the glass top. The filling material is positioned in a cavity formed by the through hole, the glass base, and the glass top. The filling material may comprise an alkali metal, a salt slush, or an inert gas. In some examples the cavity formed by the through hole, the glass base, and the glass top may comprise a vacuum encapsulation.

Abstract: The invention concerns a device and a method for measuring the relative position and angles between two bodies to be measured (7, 77). The invention is characterized in that it comprises one or more permanent magnets (6) and in that the position to be measured is determined indirectly via a magnetic field. The magnetic field is detected by one or more magnetic field sensors (3) read by a microchip. A mathematical minimization method is used to calculate back to the position and angles of the permanent magnet system (6) in relation to the magnetic field sensors (3). The energy required to read out the sensors can be obtained from the excitation field of a readout device. The sensor can perform without energy supply and can be read out by means of standard readout devices, such as an NFC-capable mobile telephone.