Using An Energy Beam Or Field, A Particle Beam Or Field, Or A Plasma (e.g., Ionization, Pecvd, Cbe, Mombe, Rf Induction, Laser) Patents (Class 117/103)
  • Patent number: 11923447
    Abstract: A semiconductor device includes a substrate, an insulating layer provided over the substrate, a collection of metal particles exposed on the surface of the insulating layer, and a diamond layer provided on the surface of the insulating layer on which the metal particles are exposed. By controlling the surface density and particle size of the metal particles on the surface of the insulating layer, the surface density of diamond nuclei that are formed on the surface is controlled. Diamond grains are formed by crystal growth using the diamond nuclei as starting material, thereby forming a diamond layer. The control of the surface density of the diamond nuclei results in forming, by the crystal growth, the diamond grains with a grain size exhibiting a relatively high thermal conductivity in the crystal growth initial layer of the diamond layer and improving the thermal conductivity between the diamond layer and the substrate.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: March 5, 2024
    Assignee: FUJITSU LIMITED
    Inventors: Junya Yaita, Atsushi Yamada
  • Patent number: 11876147
    Abstract: An epitaxial growth process, referred to as metal-semiconductor junction assisted epitaxy, of ultrawide bandgap aluminum gallium nitride (AlGaN) is disclosed. The epitaxy of AlGaN is performed in metal-rich (e.g., Ga-rich) conditions using plasma-assisted molecular beam epitaxy. The excess Ga layer leads to the formation of a metal-semiconductor junction during the epitaxy of magnesium (Mg)-doped AlGaN, which pins the Fermi level away from the valence band at the growth front. The Fermi level position is decoupled from Mg-dopant incorporation; that is, the surface band bending allows the formation of a nearly n-type growth front despite p-type dopant incorporation. With controlled tuning of the Fermi level by an in-situ metal-semiconductor junction during epitaxy, efficient p-type conduction can be achieved for large bandgap AlGaN.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: January 16, 2024
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Xianhe Liu, Ayush Pandey, Zetian Mi
  • Patent number: 11505878
    Abstract: A diamond crystal substrate has a substrate surface that is one crystal plane among (100), (111), and (110) and that has atomic steps and terraces structure at an off-angle of 7° or less excluding 0°.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: November 22, 2022
    Assignee: Adamant Namiki Precision Jewel Co., Ltd.
    Inventors: Koji Koyama, Seongwoo Kim, Yuki Kawamata, Naoki Fujita
  • Patent number: 11497098
    Abstract: The invention relates to a method for controlling a current to a light-emitting diode in order for it to emit a desired light flux, wherein the current is determined depending on a time period during which the light-emitting diode is supplied with current, in order to generate the desired light flux for said light-emitting diode.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: November 8, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Benjamin Hoeflinger, Matthias Goldbach
  • Patent number: 11343884
    Abstract: An apparatus for thermal treatment of dielectric films on substrates includes: a microwave applicator cavity and microwave power source; a workpiece to be heated in the cavity, having a porous coating on a selected substrate; and, an apparatus for introducing a controlled amount of a polar species into the porous coating immediately before heating by the microwave power. The interaction of the polar species with the microwaves enhances the efficiency of the process, to shorten process time and reduce thermal budget. A related method includes: depositing a porous film on a substrate; soft baking the film to a selected state of dryness; introducing a controlled amount of a polar species into the soft baked film; and, applying microwave energy to heat the film via interaction with the polar species.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: May 24, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Iftikhar Ahmad
  • Patent number: 11293097
    Abstract: Disclosed is an apparatus for distributing gas which is capable of uniformly injecting processing gas into a plurality of gas passages being communicated with a plurality of gas distribution holes, and an apparatus for processing substrate including the same, wherein the apparatus for distributing gas may include a body including a plurality of gas passages connected with a plurality of gas distribution holes for distributing processing gas; and at least one gas injection module connected with at least one lateral surface of the body and respectively communicated with the plurality of gas passages, wherein the gas injection module firstly buffers the processing gas supplied from the external, secondly buffers the firstly buffered processing gas, and injects the buffered processing gas into the plurality of gas passages.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: April 5, 2022
    Inventors: Suk Chul Jung, Young-Rok Kim, Jong Kuk Han
  • Patent number: 11268191
    Abstract: An atomic layer polishing method is described. The method includes: scanning the surface of a specimen to measure a peak site on the specimen surface; spraying toward the measured peak site a gas containing an element capable of binding to a first atom, which is an ingredient of the material of the specimen to form a first reaction gas layer in which the first reaction gas binds to the first atom on the surface of the peak; and projecting ions of inert gas to the peak site on which the first reaction gas layer is deposited to separate the first atom bound to the first reaction gas from the specimen.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: March 8, 2022
    Assignee: KOREA INSTITUTE OF FUSION ENERGY
    Inventors: Yong Sup Choi, Kang Il Lee, Dong Chan Seok, Soo Ouk Jang, Jong Sik Kim, Seung Ryul Yoo
  • Patent number: 11242618
    Abstract: A silicon carbide substrate capable of stably forming a device of excellent performance, and a method of manufacturing the same are provided. A silicon carbide substrate is made of a single crystal of silicon carbide, and has a width of not less than 100 mm, a micropipe density of not more than 7 cm?2, a threading screw dislocation density of not more than 1×104 cm?2, a threading edge dislocation density of not more than 1×104 cm?2, a basal plane dislocation density of not more than 1×104 cm?2, a stacking fault density of not more than 0.1 cm?1, a conductive impurity concentration of not less than 1×1018 cm?3, a residual impurity concentration of not more than 1×1016 cm?3, and a secondary phase inclusion density of not more than 1 cm?3.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: February 8, 2022
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Shinsuke Fujiwara, Taro Nishiguchi
  • Patent number: 11195699
    Abstract: A rotating microwave is established for any resonant mode TEmnl or TMmnl of a cavity, where the user is free to choose the values of the mode indices m, n and l. The fast rotation, the rotation frequency of which is equal to an operational microwave frequency, is accomplished by setting the temporal phase difference ?Ø and the azimuthal angle ?? between two microwave input ports P and Q as functions of m, n and l. The slow rotation of frequency ?a (typically 1-1000 Hz), is established by transforming dual field inputs ? cos ?at and ±? sin ?at in the orthogonal input system into an oblique system defined by the angle ?? between two microwave ports P and Q.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: December 7, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Satoru Kobayashi, Hideo Sugai, Toan Tran, Soonam Park, Dmitry Lubomirsky
  • Patent number: 10947640
    Abstract: A CVD reactor for deposition of silicon carbide material on silicon carbide substrates, may comprise: an upper gas manifold and a lower gas manifold; and a substrate carrier comprising a gas tight rectangular box open on upper and lower surfaces, a multiplicity of planar walls across the width of the box, the walls being equally spaced in a row facing each other and defining a row of channels within the box, the walls comprising mounting fixtures for a plurality of substrates and at least one electrically resistive heater element; wherein the upper gas manifold and the lower gas manifold are configured to attach to the upper and lower surfaces of the substrate carrier, respectively, connect with upper and lower ends of the channels, and isolate gas flows in odd numbered channels from gas flows in even numbered channels, wherein the channels are numbered in order along the row; and wherein said electrically resistive heater elements and said mounting fixtures are coated with a material able to withstand exposu
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: March 16, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Tirunelveli S. Ravi, Visweswaren Sivaramakrishnan
  • Patent number: 10916447
    Abstract: In a semiconductor device including a crystalline nitride layer, in which diamond is used for heat dissipation thereof, it is an object of the present invention to suppress cracking of the crystalline nitride layer. The semiconductor device includes a layered body and a heat dissipation layer. The layered body includes a crystalline nitride layer and a composite layer. The composite layer includes a non-inhibiting portion which does not inhibit diamond growth on a surface thereof and an inhibiting portion which inhibits the diamond growth on the surface. A layered body main surface of the layered body has a first region in which the non-inhibiting portion is exposed and a second region in which the inhibiting portion is exposed. The heat dissipation layer is made of diamond, opposed to the main surface, adhered to the first region, and separated from the second region with a void interposed therebetween.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: February 9, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasushi Fujioka, Takeo Furuhata, Tomohiro Shinagawa, Keisuke Nakamura
  • Patent number: 10908024
    Abstract: An apparatus and a method for online and real-time detection of a temperature of an epitaxial wafer (4) belong to the technical field of semiconductor detection. The apparatus comprises a MOCVD reaction chamber (1), a light source (6), a beam splitter (7), a reference light detector (8), a reflected light detector (9) and a data acquisition unit (10). The method, on the basis of the apparatus, can obtain a thermal radiation attenuation factor caused by a coating of a reactor chamber window and a reflectance attenuation factor caused by the coating of the reactor chamber window for the epitaxial wafer (4). The apparatus and method can eliminate influence of the coating of the reactor chamber window on an online and real-time temperature detection value, thereby improving the accuracy of the online and real-time temperature detection value.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: February 2, 2021
    Assignee: AK OPTICS TECHNOLOGY CO., LTD.
    Inventors: Dong Yan, Chengmin Li, Linzi Wang, Jianpeng Liu, Longmao Ye
  • Patent number: 10787739
    Abstract: Apparatus and methods to process one or more wafers are described. A processing chamber comprises a first processing station comprising a first gas injector having a first face, a first emissivity and a first temperature, a second processing station comprising a second gas injector having a second face, a second emissivity and a second temperature, and a substrate support assembly comprising a plurality of substantially coplanar support surfaces, the substrate support assembly configured to move the support surfaces between the first processing station and the second processing station. When a wafer is on the support surfaces, a temperature skew of less than about 0.5° C. is developed upon moving the wafer between the stations in about 0.5 seconds.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: September 29, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Joseph AuBuchon, Sanjeev Baluja, Dhritiman Subha Kashyap, Jared Ahmad Lee, Tejas Ulavi, Michael Rice
  • Patent number: 10550492
    Abstract: A method utilising microwave plasma chemical vapour deposition (MPCVD) process of producing electronic device grade single crystal diamond comprising of: (a) selecting a diamond seed or substrate having a pre-determined orientation, (b) cleaning and/or etching of non-diamond phases and other induced surface damages from the diamond seed or substrate, whereby this step can be performed one or more times, (c) growing a layer of extremely low crystal defect density diamond surface on the cleaned/etched diamond seed or substrate, whereby this step can be performed one or more times, and (d) growing electronics device grade single crystal diamond on top of the layer of the low crystal defect density diamond surface.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: February 4, 2020
    Inventors: Devi Shanker Misra, Alvarado Tarun
  • Patent number: 10287685
    Abstract: Provided is a susceptor capable of achieving improved thermal uniformity while suppressing reduction in its temperature increase rate and heat utilization efficiency. A susceptor includes a plate-shaped first member including a wafer placement surface on which to place a wafer, and a second member supporting the first member and laid on the first member in the direction perpendicular to the wafer placement surface. The thermal conductivity of the first member is higher than the thermal conductivity of the second member.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: May 14, 2019
    Assignee: MARUWA CO., LTD.
    Inventors: Fumiya Kobayashi, Sho Kumagai, Kazuhiro Ushita, Tadashi Onishi, Tomonori Ishigaki
  • Patent number: 10153154
    Abstract: Preparing a low dielectric constant thin film layer used in an integrated circuit includes: extracting gas out of a furnace; when the vacuum level within the furnace is less than 10?3 Pa, starting a 13.36 MHz radio frequency power supply and a matcher; sending the exhaust nitrogen gas, used to remove remaining gas out of the furnace by a third gas inlet pipe, into the furnace through a second pressure gas mixing tank and a second nozzle sequentially; uniformly mixing octamethyl cyclotetrasiloxane and cyclohexane, and introducing same into a pressure stainless steel tank, and, respectively by first and second gas inlet tubes, introducing bubbled nitrogen gas and inert gas into the furnace sequentially through a first pressure gas mixing tank, the pressure stainless steel tank and a first nozzle; after deposition, transferring the deposited thin film layer to the furnace's heating zone for annealing, obtaining a low dielectric constant thin film layer.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: December 11, 2018
    Assignee: SOOCHOW UNIVERSITY
    Inventors: Xuhui Sun, Yujian Xia
  • Patent number: 10147601
    Abstract: What is specified is a method for producing a layer structure (10) as a buffer layer of a semiconductor component, said method comprising the following steps: a) provision of a carrier (1), which has a silicon surface (1a), b) deposition of a first layer sequence (2), which comprises a seeding layer (21) containing aluminum and nitrogen, on the silicon surface (1a) of the carrier (1) along a stacking direction (H) running perpendicular to a main plane of extent of the carrier (1), c) three-dimensional growth of a 3D-GaN layer (3), which is formed with gallium nitride, on a top surface (2a) of the first layer sequence (2) which is remote from the silicon surface (1a), d) two-dimensional growth of a 2D-GaN layer (4), which is formed with gallium nitride, on the outer surfaces (3a) of the 3D-GaN layer (3) which are remote from the silicon surface (1a).
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: December 4, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Philipp Drechsel, Werner Bergbauer, Juergen Off, Peter Stauss
  • Patent number: 10096744
    Abstract: A component including a substrate, at least one layer including a color conversion material including quantum dots disposed over the substrate, and a layer including a conductive material (e.g., indium-tin-oxide) disposed over the at least one layer. (Embodiments of such component are also referred to herein as a QD light-enhancement substrate (QD-LES).) In certain preferred embodiments, the substrate is transparent to light, for example, visible light, ultraviolet light, and/or infrared radiation. In certain embodiments, the substrate is flexible. In certain embodiments, the substrate includes an outcoupling element (e.g., a microlens array). A film including a color conversion material including quantum dots and a conductive material is also provided. In certain embodiments, a component includes a film described herein. Lighting devices are also provided. In certain embodiments, a lighting device includes a film described herein.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: October 9, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seth Coe-Sullivan, Peter Kazlas
  • Patent number: 10090512
    Abstract: A lithium ion battery electrode includes silicon nanowires used for insertion of lithium ions and including a conductivity enhancement, the nanowires growth-rooted to the conductive substrate.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: October 2, 2018
    Assignee: Amprius, Inc.
    Inventors: Yi Cui, Song Han, Mark C. Platshon
  • Patent number: 10066292
    Abstract: There is provided a semiconductor manufacturing device, including: a processing vessel; a partition wall that divides at least a part of a space in the processing vessel into a growth section and a cleaning section; a substrate holding member disposed in the growth section; a source gas supply system that supplies a source gas into the growth section; a cleaning gas supply system that supplies a cleaning gas into the cleaning section; and a heater that heats the growth section and the cleaning section.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: September 4, 2018
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventor: Hajime Fujikura
  • Patent number: 9941111
    Abstract: According to various embodiments, a method for processing a semiconductor layer may include: generating an etch plasma in a plasma chamber of a remote plasma source, wherein the plasma chamber of the remote plasma source is coupled to a processing chamber for processing the semiconductor layer; introducing the etch plasma into the processing chamber to remove a native oxide layer from a surface of the semiconductor layer and at most a negligible amount of semiconductor material of the semiconductor layer; and, subsequently, depositing a dielectric layer directly on the surface of the semiconductor layer.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: April 10, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gerhard Schmidt, Markus Kahn, Christian Maier, Philipp Koch, Juergen Steinbrenner
  • Patent number: 9938620
    Abstract: A gas supply mechanism of supplying a raw material gas obtained from a raw material of a solid state or a liquid state into a chamber configured to perform a film forming process on a workpiece is disclosed. The gas supply mechanism includes a gas supply controller configured to control a flow rate of a carrier gas by means of a flow rate controller, and to enable the carrier gas to flow while closing a material gas supply/shut-off valve to thereby increase internal pressures of a raw material container and a raw material gas supply pipe to be a high-pressure condition and then control the raw material gas supply/shut-off valve to be opened.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: April 10, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masayuki Moroi, Hajime Yamanaka, Yasushi Aiba, Takanobu Hotta
  • Patent number: 9909214
    Abstract: A method for depositing a dielectric film in a trench by plasma-enhanced atomic layer deposition (PEALD) includes depositing a dielectric film in a trench of a substrate by PEALD under conditions wherein the wet etch rate of the depositing film on a top surface of the substrate is substantially equivalent to or higher than the wet etch rate of the depositing film at a sidewall of the trench, wherein a precursor fed into the reaction space has —N(CH3)2 as a functional group.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: March 6, 2018
    Assignee: ASM IP Holding B.V.
    Inventor: Hidemi Suemori
  • Patent number: 9799908
    Abstract: The present invention relates to a method for preparing an electrode-supported electrochemical half-cell including a step consisting in subjecting a green electrode layer on which a precursor gel of the electrolyte or a precursor thereof is deposited to sintering at a temperature of less than or equal to 1350° C.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: October 24, 2017
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Thibaud Delahaye, Mathilde Rieu
  • Patent number: 9646823
    Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method of forming a semiconductor device includes receiving a substrate and forming a termination layer on a top surface of the substrate. The termination layer includes at least one of hydrogen, deuterium, or nitrogen. The method further includes depositing a dielectric layer on the termination layer such that the depositing of the dielectric layer does not disrupt the termination layer. The termination layer may be formed by a first deposition process that deposits a first material of the termination layer and a subsequent deposition process that introduces a second material of the termination layer into the first material. The termination layer may also be formed by a single deposition process that deposits both a first material and a second material of the termination layer.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: May 9, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsun Wang, Shih-Wei Wang, Gerben Doornbos, Georgios Vellianitis, Matthias Passlack
  • Patent number: 9591738
    Abstract: Systems and methods of forming plasma are provided. In an embodiment, a plasma generator system is provided including a container, a single coil disposed around the container, the single coil being a single member and having a first end, a second end, a first winding, and a second winding, wherein the first winding extends from the first end, and the second winding is integrally formed as part of the first winding and extends to the second end, an energy source electrically coupled directly to the first end of the single member, and a capacitor electrically coupled directly to the second end of the single member.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: March 7, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Huatan Qiu, David Cheung, Prashanth Kothnur
  • Patent number: 9583298
    Abstract: Nano granular materials (NGM) are provided that have the extraordinary capability to conduct current in a 100 fold current density compared to high Tc superconductors by charges moving in form of Bosons produced by Bose-Einstein-Condensation (BEC) in overlapping excitonic surface orbital states at room temperature and has a light dependent conductivity. The material is disposed between electrically conductive connections and is a nano-crystalline composite material. Also provided are electrical components comprising NGM and methods and arrangements for making it by corpuscular-beam induced deposition applied to a substrate, using inorganic compounds being adsorbed on the surface of the substrate owing to their vapor pressure, and which render a crystalline conducting phase embedded in an inorganic insolating matrix enclosing the material.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: February 28, 2017
    Assignee: HAWILKO GMBH
    Inventor: Hans W. P. Koops
  • Patent number: 9435051
    Abstract: The present invention discloses a semi-insulating wafer of GaxAlyIn1-x-yN (0?x?1, 0?x+y?1) which is doped with bismuth (Bi). The semi-insulating wafer has the resistivity of 104 ohm-cm or more. Although it is very difficult to obtain a single crystal ingot of group III nitride, the ammonothermal method can grow highly-oriented poly or single crystal ingot of group III nitride having the density of dislocations/grain boundaries less than 105 cm?2. The invention also disclose the method of fabricating the semi-insulating group III nitride bulk crystals and wafers.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: September 6, 2016
    Assignees: SixPoint Materials, Inc., Seoul Semiconductor Co., Ltd.
    Inventors: Tadao Hashimoto, Edward Letts, Sierra Hoff
  • Patent number: 9428391
    Abstract: Carbon nanotubes are grown by supplying raw material gas 30 comprising a carbon compound to be a raw material of the carbon nanotubes into the inside of a reaction vessel tube 14 in which a catalyst 26 to grow the carbon nanotubes is charged. At this time, halogen-containing material gas 32 to reduce the amount of a carbon product such as amorphous carbon produced besides carbon nanotubes that deposits on the surface of catalyst particles 44 due to supply of the raw material gas 30 is further supplied into the inside of the reaction vessel tube 14. Thereby, it is possible to produce elongated carbon nanotubes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: August 30, 2016
    Assignee: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITY
    Inventors: Yoku Inoue, Adrian Ghemes, Haibo Zhao
  • Patent number: 9359666
    Abstract: A method of making a doped metal oxide comprises heating a first doped metal oxide with a laser, to form a crystallized doped metal oxide. The crystallized doped metal oxide has a different crystal structure than the first doped metal oxide.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: June 7, 2016
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Jian-Ku Shang, Qi Li
  • Patent number: 9328422
    Abstract: Optically transparent diamond-like carbon (DLC) thin films are formed using relatively low-temperature deposition conditions followed by a post-deposition bleaching step. The bleaching can include exposure of an as-deposited thin film to UV laser radiation, which reduces the concentration of defects in the film. The method is compatible with temperature-sensitive substrates, and can be used to form water clear DLC layers on glass substrates, for example, which can be used in display applications.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: May 3, 2016
    Assignee: CORNING INCORPORATED
    Inventor: Charles Andrew Paulson
  • Patent number: 9251934
    Abstract: A method for manufacturing a plurality of nanowires, the method including: providing a carrier comprising an exposed surface of a material to be processed and applying a plasma treatment on the exposed surface of the material to be processed to thereby form a plurality of nanowires from the material to be processed during the plasma treatment.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: February 2, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Marko Lemke, Stefan Tegen, Uwe Rudolph
  • Patent number: 9034104
    Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takuya Hirohashi, Masahiro Takahashi, Takashi Shimazu
  • Patent number: 9017632
    Abstract: A method of making fancy pale blue or fancy pale blue/green CVD diamond material is described. The method comprises irradiating single crystal diamond material that has been grown by a CVD process with electrons to introduce isolated vacancies into the diamond material, the irradiated diamond material having (or after a further post-irradiation treatment having) a total vacancy concentration [VT] and a path length L such that [VT]×L is at least 0.072 ppm cm and at most 0.36 ppm cm, and the diamond material becomes fancy pale blue or fancy pale blue/green in color. Fancy pale blue diamonds are also described.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: April 28, 2015
    Assignee: Element Six Technologies Limited
    Inventors: Daniel James Twitchen, Sarah Louise Geoghegan, Neil Perkins
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Patent number: 8945305
    Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 3, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8936681
    Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 20, 2015
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8900976
    Abstract: An organic layer deposition apparatus includes a transfer unit; a first conveyer unit including a guide member having accommodation grooves, a first accommodation part, a second accommodation part, and a connection part that connects the first accommodation part to the second accommodation part; a second conveyer unit for moving the transfer unit without the substrate; a loading unit for fixing the substrate on the transfer unit; a deposition unit including a chamber and an organic layer deposition assembly; and an unloading unit for separating the substrate, wherein the first accommodation part of the guide member is located close to ground compared to the second accommodation part, and includes a lower member, an upper member, elastic members located between the lower and upper members. The substrate fixed on the transfer unit is spaced from the organic layer deposition assembly while being transferred by the first conveyer unit.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Hyun Jin, Jae-Ha Lim
  • Patent number: 8882077
    Abstract: This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: November 11, 2014
    Assignee: AMG Idealcast Solar Corporation
    Inventor: Nathan G. Stoddard
  • Patent number: 8876973
    Abstract: There is provided an n type (100) oriented single crystal diamond semiconductor film into which phosphorous atoms have been doped and a method of producing the same. The n type (100) oriented single crystal diamond semiconductor film, characterized in that (100) oriented diamond is epitaxially grown on a substrate under such conditions that; the diamond substrate is (100) oriented diamond, a means for chemical vapor deposition provides hydrogen, hydrocarbon and a phosphorous compound in the plasma vapor phase, the ratio of phosphorous atoms to carbon atoms in the plasma vapor phase is no less than 0.1%, and the ratio of carbon atoms to hydrogen atoms is no less than 0.05%, and the method of producing the same.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: November 4, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hiromitsu Kato, Satoshi Yamasaki, Hideyo Ookushi, Shinichi Shikata
  • Patent number: 8853078
    Abstract: Material is deposited in a desired pattern by spontaneous deposition of precursor gas at regions of a surface that are prepared using a beam to provide conditions to support the initiation of the spontaneous reaction. Once the reaction is initiated, it continues in the absence of the beam at the regions of the surface at which the reaction was initiated.
    Type: Grant
    Filed: January 30, 2011
    Date of Patent: October 7, 2014
    Assignee: FEI Company
    Inventors: Aurelien Philippe Jean Maclou Botman, Steven Randolph, Milos Toth
  • Publication number: 20140251205
    Abstract: A system for depositing a film on a substrate comprises a lateral control shutter disposed between the substrate and a material source. The lateral control shutter is configured to block some predetermined portion of source material to prevent deposition of source material onto undesirable portion of the substrate. One of the lateral control shutter or the substrate moves with respect to the other to facilitate moving a lateral growth boundary originating from one or more seed crystals. A lateral epitaxial deposition across the substrate ensues, by having an advancing growth front that expands grain size and forms a single crystal film on the surface of the substrate.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Tivra Corporation
    Inventor: Indranil De
  • Patent number: 8821635
    Abstract: Si—Ge materials are grown on Si(100) with Ge-rich contents (Ge>50 at. %) and precise stoichiometries SiGe, SiGe2, SiGe3 and SiGe4. New hydrides with direct Si—Ge bonds derived from the family of compounds (H3Ge)xSiH4-x (x=1-4) are used to grow uniform, relaxed, and highly planar films with low defect densities at unprecedented low temperatures between about 300-450° C. At about 500-700° C., SiGex quantum dots are grown with narrow size distribution, defect-free microstructures and highly homogeneous elemental content at the atomic level. The method provides for precise control of morphology, composition, structure and strain. The grown materials possess the required characteristics for high frequency electronic and optical applications, and for templates and buffer layers for high mobility Si and Ge channel devices.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: September 2, 2014
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: John Kouvetakis, Ignatius S. T. Tsong, Changwu Hu, John Tolle
  • Patent number: 8795431
    Abstract: A gallium nitride layer is produced using a seed crystal substrate by flux method. The seed crystal substrate 8A includes a supporting body 1, a plurality of seed crystal layers 4A each comprising gallium nitride single crystal and separated from one another, a low temperature buffer layer 2 provided between the seed crystal layers 4A and the supporting body and made of a nitride of a group III metal element, and an exposed layer 3 exposed to spaces between the adjacent seed crystal layers 4A and made of aluminum nitride single crystal or aluminum gallium nitride single crystal. The gallium nitride layer is grown on the seed crystal layers by flux method.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: August 5, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Katsuhiro Imai, Makota Iwai, Takanao Shimodaira, Masahiro Sakai, Shuhei Higashihara, Takayuki Hirao
  • Publication number: 20140138679
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Application
    Filed: January 27, 2014
    Publication date: May 22, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20140137793
    Abstract: A method of fabricating a wafer according to the embodiment comprises the steps of growing an wafer on a surface of the wafer in a growth temperature; and cooling the wafer after the wafer has been grown, wherein a stepwise cooling is performed when cooling the wafer.
    Type: Application
    Filed: June 22, 2012
    Publication date: May 22, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Seok Min Kang, Moo Seong Kim
  • Patent number: 8728586
    Abstract: In large area plasma processing systems, process gases may be introduced to the chamber via the showerhead assembly which may be driven as an RF electrode. The gas feed tube, which is grounded, is electrically isolated from the showerhead. The gas feed tube may provide not only process gases, but also cleaning gases from a remote plasma source to the process chamber. The inside of the gas feed tube may remain at either a low RF field or a zero RF field to avoid premature gas breakdown within the gas feed tube that may lead to parasitic plasma formation between the gas source and the showerhead. By feeding the gas through an RF choke, the RF field and the processing gas may be introduced to the processing chamber through a common location and thus simplify the chamber design.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: May 20, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jozef Kudela, Carl A. Sorensen, John M. White
  • Patent number: 8715413
    Abstract: The invention provides a method for manufacturing a Group III nitride semiconductor crystal. The method includes the steps of preparing a seed crystal and performing a convex surface-growing step to grow the group III nitride semiconductor crystal. The growth surface of the group III nitride semiconductor crystal is constituted only by a plurality of surfaces not vertical to a growth direction and the group III nitride semiconductor crystal grows while forming a convex shape as a whole by the growth surface constituted of the plurality of surfaces. The invention also provides a method for manufacturing a group III nitride semiconductor substrate.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: May 6, 2014
    Assignee: Hitachi Cable, Ltd.
    Inventor: Yuichi Oshima
  • Publication number: 20140120373
    Abstract: A method of nucleating the growth a diamond film comprises the following steps. First, a substrate is provided upon which the diamond film is to be nucleated. A diamondoid is then dissolved in an adhesive solvent to form a mixing solution. The substrate is inserted into the mixing solution to let the diamondoid attach to the substrate through the adhesive solvent. A diamond film nucleated by the abovementioned method is also disclosed in the present invention.
    Type: Application
    Filed: December 27, 2012
    Publication date: May 1, 2014
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Li CHANG, Yi-Chun CHEN
  • Publication number: 20140069327
    Abstract: The present invention relates to a process for in situ growth of carbonaceous composite coating of diamond like carbon (DLC) and graphite on silicon carbide (SiC) grains by carrying out thermal dissociation of SiC by an indirect arc plasma heating and the said process comprising the steps of: (i) providing SiC grains in a graphite crucible; (ii) passing inert gas in the arc zone situated below the graphite crucible; (iii) passing a inert gas inside the graphite crucible; (iv) heating the graphite crucible by arc plasma for a period in the range of 15 to 30 minutes; (v) continuing the inert gas flow in arc zone and in graphite crucible for 50 to 70 minutes; (vi) cooling the reactor to obtain a carbonaceous composite coating having diamond like carbon (DLC) and graphite on silicon carbide (SiC) grains.
    Type: Application
    Filed: February 14, 2012
    Publication date: March 13, 2014
    Applicant: COUNCIL OF SCIENTIFIC & INDUSTRIAL RESEARCH
    Inventor: Bijan Bihari Nayak