Using An Energy Beam Or Field, A Particle Beam Or Field, Or A Plasma (e.g., Ionization, Pecvd, Cbe, Mombe, Rf Induction, Laser) Patents (Class 117/103)
  • Patent number: 10287685
    Abstract: Provided is a susceptor capable of achieving improved thermal uniformity while suppressing reduction in its temperature increase rate and heat utilization efficiency. A susceptor includes a plate-shaped first member including a wafer placement surface on which to place a wafer, and a second member supporting the first member and laid on the first member in the direction perpendicular to the wafer placement surface. The thermal conductivity of the first member is higher than the thermal conductivity of the second member.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: May 14, 2019
    Assignee: MARUWA CO., LTD.
    Inventors: Fumiya Kobayashi, Sho Kumagai, Kazuhiro Ushita, Tadashi Onishi, Tomonori Ishigaki
  • Patent number: 10153154
    Abstract: Preparing a low dielectric constant thin film layer used in an integrated circuit includes: extracting gas out of a furnace; when the vacuum level within the furnace is less than 10?3 Pa, starting a 13.36 MHz radio frequency power supply and a matcher; sending the exhaust nitrogen gas, used to remove remaining gas out of the furnace by a third gas inlet pipe, into the furnace through a second pressure gas mixing tank and a second nozzle sequentially; uniformly mixing octamethyl cyclotetrasiloxane and cyclohexane, and introducing same into a pressure stainless steel tank, and, respectively by first and second gas inlet tubes, introducing bubbled nitrogen gas and inert gas into the furnace sequentially through a first pressure gas mixing tank, the pressure stainless steel tank and a first nozzle; after deposition, transferring the deposited thin film layer to the furnace's heating zone for annealing, obtaining a low dielectric constant thin film layer.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: December 11, 2018
    Inventors: Xuhui Sun, Yujian Xia
  • Patent number: 10147601
    Abstract: What is specified is a method for producing a layer structure (10) as a buffer layer of a semiconductor component, said method comprising the following steps: a) provision of a carrier (1), which has a silicon surface (1a), b) deposition of a first layer sequence (2), which comprises a seeding layer (21) containing aluminum and nitrogen, on the silicon surface (1a) of the carrier (1) along a stacking direction (H) running perpendicular to a main plane of extent of the carrier (1), c) three-dimensional growth of a 3D-GaN layer (3), which is formed with gallium nitride, on a top surface (2a) of the first layer sequence (2) which is remote from the silicon surface (1a), d) two-dimensional growth of a 2D-GaN layer (4), which is formed with gallium nitride, on the outer surfaces (3a) of the 3D-GaN layer (3) which are remote from the silicon surface (1a).
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: December 4, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Philipp Drechsel, Werner Bergbauer, Juergen Off, Peter Stauss
  • Patent number: 10096744
    Abstract: A component including a substrate, at least one layer including a color conversion material including quantum dots disposed over the substrate, and a layer including a conductive material (e.g., indium-tin-oxide) disposed over the at least one layer. (Embodiments of such component are also referred to herein as a QD light-enhancement substrate (QD-LES).) In certain preferred embodiments, the substrate is transparent to light, for example, visible light, ultraviolet light, and/or infrared radiation. In certain embodiments, the substrate is flexible. In certain embodiments, the substrate includes an outcoupling element (e.g., a microlens array). A film including a color conversion material including quantum dots and a conductive material is also provided. In certain embodiments, a component includes a film described herein. Lighting devices are also provided. In certain embodiments, a lighting device includes a film described herein.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: October 9, 2018
    Inventors: Seth Coe-Sullivan, Peter Kazlas
  • Patent number: 10090512
    Abstract: A lithium ion battery electrode includes silicon nanowires used for insertion of lithium ions and including a conductivity enhancement, the nanowires growth-rooted to the conductive substrate.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: October 2, 2018
    Assignee: Amprius, Inc.
    Inventors: Yi Cui, Song Han, Mark C. Platshon
  • Patent number: 10066292
    Abstract: There is provided a semiconductor manufacturing device, including: a processing vessel; a partition wall that divides at least a part of a space in the processing vessel into a growth section and a cleaning section; a substrate holding member disposed in the growth section; a source gas supply system that supplies a source gas into the growth section; a cleaning gas supply system that supplies a cleaning gas into the cleaning section; and a heater that heats the growth section and the cleaning section.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: September 4, 2018
    Inventor: Hajime Fujikura
  • Patent number: 9941111
    Abstract: According to various embodiments, a method for processing a semiconductor layer may include: generating an etch plasma in a plasma chamber of a remote plasma source, wherein the plasma chamber of the remote plasma source is coupled to a processing chamber for processing the semiconductor layer; introducing the etch plasma into the processing chamber to remove a native oxide layer from a surface of the semiconductor layer and at most a negligible amount of semiconductor material of the semiconductor layer; and, subsequently, depositing a dielectric layer directly on the surface of the semiconductor layer.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: April 10, 2018
    Inventors: Gerhard Schmidt, Markus Kahn, Christian Maier, Philipp Koch, Juergen Steinbrenner
  • Patent number: 9938620
    Abstract: A gas supply mechanism of supplying a raw material gas obtained from a raw material of a solid state or a liquid state into a chamber configured to perform a film forming process on a workpiece is disclosed. The gas supply mechanism includes a gas supply controller configured to control a flow rate of a carrier gas by means of a flow rate controller, and to enable the carrier gas to flow while closing a material gas supply/shut-off valve to thereby increase internal pressures of a raw material container and a raw material gas supply pipe to be a high-pressure condition and then control the raw material gas supply/shut-off valve to be opened.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: April 10, 2018
    Inventors: Masayuki Moroi, Hajime Yamanaka, Yasushi Aiba, Takanobu Hotta
  • Patent number: 9909214
    Abstract: A method for depositing a dielectric film in a trench by plasma-enhanced atomic layer deposition (PEALD) includes depositing a dielectric film in a trench of a substrate by PEALD under conditions wherein the wet etch rate of the depositing film on a top surface of the substrate is substantially equivalent to or higher than the wet etch rate of the depositing film at a sidewall of the trench, wherein a precursor fed into the reaction space has —N(CH3)2 as a functional group.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: March 6, 2018
    Assignee: ASM IP Holding B.V.
    Inventor: Hidemi Suemori
  • Patent number: 9799908
    Abstract: The present invention relates to a method for preparing an electrode-supported electrochemical half-cell including a step consisting in subjecting a green electrode layer on which a precursor gel of the electrolyte or a precursor thereof is deposited to sintering at a temperature of less than or equal to 1350° C.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: October 24, 2017
    Inventors: Thibaud Delahaye, Mathilde Rieu
  • Patent number: 9646823
    Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method of forming a semiconductor device includes receiving a substrate and forming a termination layer on a top surface of the substrate. The termination layer includes at least one of hydrogen, deuterium, or nitrogen. The method further includes depositing a dielectric layer on the termination layer such that the depositing of the dielectric layer does not disrupt the termination layer. The termination layer may be formed by a first deposition process that deposits a first material of the termination layer and a subsequent deposition process that introduces a second material of the termination layer into the first material. The termination layer may also be formed by a single deposition process that deposits both a first material and a second material of the termination layer.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: May 9, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsun Wang, Shih-Wei Wang, Gerben Doornbos, Georgios Vellianitis, Matthias Passlack
  • Patent number: 9591738
    Abstract: Systems and methods of forming plasma are provided. In an embodiment, a plasma generator system is provided including a container, a single coil disposed around the container, the single coil being a single member and having a first end, a second end, a first winding, and a second winding, wherein the first winding extends from the first end, and the second winding is integrally formed as part of the first winding and extends to the second end, an energy source electrically coupled directly to the first end of the single member, and a capacitor electrically coupled directly to the second end of the single member.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: March 7, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Huatan Qiu, David Cheung, Prashanth Kothnur
  • Patent number: 9583298
    Abstract: Nano granular materials (NGM) are provided that have the extraordinary capability to conduct current in a 100 fold current density compared to high Tc superconductors by charges moving in form of Bosons produced by Bose-Einstein-Condensation (BEC) in overlapping excitonic surface orbital states at room temperature and has a light dependent conductivity. The material is disposed between electrically conductive connections and is a nano-crystalline composite material. Also provided are electrical components comprising NGM and methods and arrangements for making it by corpuscular-beam induced deposition applied to a substrate, using inorganic compounds being adsorbed on the surface of the substrate owing to their vapor pressure, and which render a crystalline conducting phase embedded in an inorganic insolating matrix enclosing the material.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: February 28, 2017
    Assignee: HAWILKO GMBH
    Inventor: Hans W. P. Koops
  • Patent number: 9435051
    Abstract: The present invention discloses a semi-insulating wafer of GaxAlyIn1-x-yN (0?x?1, 0?x+y?1) which is doped with bismuth (Bi). The semi-insulating wafer has the resistivity of 104 ohm-cm or more. Although it is very difficult to obtain a single crystal ingot of group III nitride, the ammonothermal method can grow highly-oriented poly or single crystal ingot of group III nitride having the density of dislocations/grain boundaries less than 105 cm?2. The invention also disclose the method of fabricating the semi-insulating group III nitride bulk crystals and wafers.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: September 6, 2016
    Assignees: SixPoint Materials, Inc., Seoul Semiconductor Co., Ltd.
    Inventors: Tadao Hashimoto, Edward Letts, Sierra Hoff
  • Patent number: 9428391
    Abstract: Carbon nanotubes are grown by supplying raw material gas 30 comprising a carbon compound to be a raw material of the carbon nanotubes into the inside of a reaction vessel tube 14 in which a catalyst 26 to grow the carbon nanotubes is charged. At this time, halogen-containing material gas 32 to reduce the amount of a carbon product such as amorphous carbon produced besides carbon nanotubes that deposits on the surface of catalyst particles 44 due to supply of the raw material gas 30 is further supplied into the inside of the reaction vessel tube 14. Thereby, it is possible to produce elongated carbon nanotubes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: August 30, 2016
    Inventors: Yoku Inoue, Adrian Ghemes, Haibo Zhao
  • Patent number: 9359666
    Abstract: A method of making a doped metal oxide comprises heating a first doped metal oxide with a laser, to form a crystallized doped metal oxide. The crystallized doped metal oxide has a different crystal structure than the first doped metal oxide.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: June 7, 2016
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Jian-Ku Shang, Qi Li
  • Patent number: 9328422
    Abstract: Optically transparent diamond-like carbon (DLC) thin films are formed using relatively low-temperature deposition conditions followed by a post-deposition bleaching step. The bleaching can include exposure of an as-deposited thin film to UV laser radiation, which reduces the concentration of defects in the film. The method is compatible with temperature-sensitive substrates, and can be used to form water clear DLC layers on glass substrates, for example, which can be used in display applications.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: May 3, 2016
    Inventor: Charles Andrew Paulson
  • Patent number: 9251934
    Abstract: A method for manufacturing a plurality of nanowires, the method including: providing a carrier comprising an exposed surface of a material to be processed and applying a plasma treatment on the exposed surface of the material to be processed to thereby form a plurality of nanowires from the material to be processed during the plasma treatment.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: February 2, 2016
    Inventors: Marko Lemke, Stefan Tegen, Uwe Rudolph
  • Patent number: 9034104
    Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takuya Hirohashi, Masahiro Takahashi, Takashi Shimazu
  • Patent number: 9017632
    Abstract: A method of making fancy pale blue or fancy pale blue/green CVD diamond material is described. The method comprises irradiating single crystal diamond material that has been grown by a CVD process with electrons to introduce isolated vacancies into the diamond material, the irradiated diamond material having (or after a further post-irradiation treatment having) a total vacancy concentration [VT] and a path length L such that [VT]×L is at least 0.072 ppm cm and at most 0.36 ppm cm, and the diamond material becomes fancy pale blue or fancy pale blue/green in color. Fancy pale blue diamonds are also described.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: April 28, 2015
    Assignee: Element Six Technologies Limited
    Inventors: Daniel James Twitchen, Sarah Louise Geoghegan, Neil Perkins
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Patent number: 8945305
    Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 3, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8936681
    Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 20, 2015
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8900976
    Abstract: An organic layer deposition apparatus includes a transfer unit; a first conveyer unit including a guide member having accommodation grooves, a first accommodation part, a second accommodation part, and a connection part that connects the first accommodation part to the second accommodation part; a second conveyer unit for moving the transfer unit without the substrate; a loading unit for fixing the substrate on the transfer unit; a deposition unit including a chamber and an organic layer deposition assembly; and an unloading unit for separating the substrate, wherein the first accommodation part of the guide member is located close to ground compared to the second accommodation part, and includes a lower member, an upper member, elastic members located between the lower and upper members. The substrate fixed on the transfer unit is spaced from the organic layer deposition assembly while being transferred by the first conveyer unit.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Hyun Jin, Jae-Ha Lim
  • Patent number: 8882077
    Abstract: This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: November 11, 2014
    Assignee: AMG Idealcast Solar Corporation
    Inventor: Nathan G. Stoddard
  • Patent number: 8876973
    Abstract: There is provided an n type (100) oriented single crystal diamond semiconductor film into which phosphorous atoms have been doped and a method of producing the same. The n type (100) oriented single crystal diamond semiconductor film, characterized in that (100) oriented diamond is epitaxially grown on a substrate under such conditions that; the diamond substrate is (100) oriented diamond, a means for chemical vapor deposition provides hydrogen, hydrocarbon and a phosphorous compound in the plasma vapor phase, the ratio of phosphorous atoms to carbon atoms in the plasma vapor phase is no less than 0.1%, and the ratio of carbon atoms to hydrogen atoms is no less than 0.05%, and the method of producing the same.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: November 4, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hiromitsu Kato, Satoshi Yamasaki, Hideyo Ookushi, Shinichi Shikata
  • Patent number: 8853078
    Abstract: Material is deposited in a desired pattern by spontaneous deposition of precursor gas at regions of a surface that are prepared using a beam to provide conditions to support the initiation of the spontaneous reaction. Once the reaction is initiated, it continues in the absence of the beam at the regions of the surface at which the reaction was initiated.
    Type: Grant
    Filed: January 30, 2011
    Date of Patent: October 7, 2014
    Assignee: FEI Company
    Inventors: Aurelien Philippe Jean Maclou Botman, Steven Randolph, Milos Toth
  • Publication number: 20140251205
    Abstract: A system for depositing a film on a substrate comprises a lateral control shutter disposed between the substrate and a material source. The lateral control shutter is configured to block some predetermined portion of source material to prevent deposition of source material onto undesirable portion of the substrate. One of the lateral control shutter or the substrate moves with respect to the other to facilitate moving a lateral growth boundary originating from one or more seed crystals. A lateral epitaxial deposition across the substrate ensues, by having an advancing growth front that expands grain size and forms a single crystal film on the surface of the substrate.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Tivra Corporation
    Inventor: Indranil De
  • Patent number: 8821635
    Abstract: Si—Ge materials are grown on Si(100) with Ge-rich contents (Ge>50 at. %) and precise stoichiometries SiGe, SiGe2, SiGe3 and SiGe4. New hydrides with direct Si—Ge bonds derived from the family of compounds (H3Ge)xSiH4-x (x=1-4) are used to grow uniform, relaxed, and highly planar films with low defect densities at unprecedented low temperatures between about 300-450° C. At about 500-700° C., SiGex quantum dots are grown with narrow size distribution, defect-free microstructures and highly homogeneous elemental content at the atomic level. The method provides for precise control of morphology, composition, structure and strain. The grown materials possess the required characteristics for high frequency electronic and optical applications, and for templates and buffer layers for high mobility Si and Ge channel devices.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: September 2, 2014
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: John Kouvetakis, Ignatius S. T. Tsong, Changwu Hu, John Tolle
  • Patent number: 8795431
    Abstract: A gallium nitride layer is produced using a seed crystal substrate by flux method. The seed crystal substrate 8A includes a supporting body 1, a plurality of seed crystal layers 4A each comprising gallium nitride single crystal and separated from one another, a low temperature buffer layer 2 provided between the seed crystal layers 4A and the supporting body and made of a nitride of a group III metal element, and an exposed layer 3 exposed to spaces between the adjacent seed crystal layers 4A and made of aluminum nitride single crystal or aluminum gallium nitride single crystal. The gallium nitride layer is grown on the seed crystal layers by flux method.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: August 5, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Katsuhiro Imai, Makota Iwai, Takanao Shimodaira, Masahiro Sakai, Shuhei Higashihara, Takayuki Hirao
  • Publication number: 20140138679
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Application
    Filed: January 27, 2014
    Publication date: May 22, 2014
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20140137793
    Abstract: A method of fabricating a wafer according to the embodiment comprises the steps of growing an wafer on a surface of the wafer in a growth temperature; and cooling the wafer after the wafer has been grown, wherein a stepwise cooling is performed when cooling the wafer.
    Type: Application
    Filed: June 22, 2012
    Publication date: May 22, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Seok Min Kang, Moo Seong Kim
  • Patent number: 8728586
    Abstract: In large area plasma processing systems, process gases may be introduced to the chamber via the showerhead assembly which may be driven as an RF electrode. The gas feed tube, which is grounded, is electrically isolated from the showerhead. The gas feed tube may provide not only process gases, but also cleaning gases from a remote plasma source to the process chamber. The inside of the gas feed tube may remain at either a low RF field or a zero RF field to avoid premature gas breakdown within the gas feed tube that may lead to parasitic plasma formation between the gas source and the showerhead. By feeding the gas through an RF choke, the RF field and the processing gas may be introduced to the processing chamber through a common location and thus simplify the chamber design.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: May 20, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jozef Kudela, Carl A. Sorensen, John M. White
  • Patent number: 8715413
    Abstract: The invention provides a method for manufacturing a Group III nitride semiconductor crystal. The method includes the steps of preparing a seed crystal and performing a convex surface-growing step to grow the group III nitride semiconductor crystal. The growth surface of the group III nitride semiconductor crystal is constituted only by a plurality of surfaces not vertical to a growth direction and the group III nitride semiconductor crystal grows while forming a convex shape as a whole by the growth surface constituted of the plurality of surfaces. The invention also provides a method for manufacturing a group III nitride semiconductor substrate.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: May 6, 2014
    Assignee: Hitachi Cable, Ltd.
    Inventor: Yuichi Oshima
  • Publication number: 20140120373
    Abstract: A method of nucleating the growth a diamond film comprises the following steps. First, a substrate is provided upon which the diamond film is to be nucleated. A diamondoid is then dissolved in an adhesive solvent to form a mixing solution. The substrate is inserted into the mixing solution to let the diamondoid attach to the substrate through the adhesive solvent. A diamond film nucleated by the abovementioned method is also disclosed in the present invention.
    Type: Application
    Filed: December 27, 2012
    Publication date: May 1, 2014
    Inventors: Li CHANG, Yi-Chun CHEN
  • Publication number: 20140069327
    Abstract: The present invention relates to a process for in situ growth of carbonaceous composite coating of diamond like carbon (DLC) and graphite on silicon carbide (SiC) grains by carrying out thermal dissociation of SiC by an indirect arc plasma heating and the said process comprising the steps of: (i) providing SiC grains in a graphite crucible; (ii) passing inert gas in the arc zone situated below the graphite crucible; (iii) passing a inert gas inside the graphite crucible; (iv) heating the graphite crucible by arc plasma for a period in the range of 15 to 30 minutes; (v) continuing the inert gas flow in arc zone and in graphite crucible for 50 to 70 minutes; (vi) cooling the reactor to obtain a carbonaceous composite coating having diamond like carbon (DLC) and graphite on silicon carbide (SiC) grains.
    Type: Application
    Filed: February 14, 2012
    Publication date: March 13, 2014
    Inventor: Bijan Bihari Nayak
  • Publication number: 20140041574
    Abstract: Diamond is grown on a substrate (S) from a mixture of a carbon-containing gas and hydrogen gas, by a DC plasma enhanced CVD process of applying a DC voltage between a stage electrode (12) for holding the substrate (S) and a voltage-applying electrode (13). During the step of growing diamond by applying a DC voltage, a single pulse voltage of opposite polarity to the DC voltage for diamond growth is applied between the stage electrode and the voltage-applying electrode at a predetermined timing. Diamond of quality is produced at a stable growth rate.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 13, 2014
    Applicant: Shin-Estu Chemical Co., Ltd.
    Inventor: Hitoshi NOGUCHI
  • Publication number: 20140017827
    Abstract: The present invention relates to an apparatus and method for manufacturing a semiconductor light-emitting device using a neutral particle beam. According to the present invention, since the kinetic energy of the neutral particle beam is provided as a portion of the reaction energy for causing a nitride semiconductor single crystal thin film to be formed on a substrate, and the reaction energy is not provided as heat energy by heating a substrate as in the prior art, the substrate may be treated at a relatively low temperature. Furthermore, elements such as Si, Mg, and the like, which are solid elements required for doping are sprayed onto the substrate from a source which generates solid elements for doping together with the neutral particle beam to achieve high doping efficiency at a lower temperature.
    Type: Application
    Filed: May 30, 2011
    Publication date: January 16, 2014
    Inventors: Suk Jae Yoo, Seong Bong Kim
  • Publication number: 20130333611
    Abstract: A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an ?-? phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors.
    Type: Application
    Filed: March 11, 2013
    Publication date: December 19, 2013
    Applicant: Tivra Corporation
    Inventors: Indranil De, Francisco Machuca
  • Patent number: 8608850
    Abstract: Diamond thin films were deposited on copper substrate by the Vapor Solid (VS) deposition method using a mixture of fullerene C60 and graphite as the source material. The deposition took place only when the substrate was kept in a narrow temperature range of approximately 550-650° C. Temperatures below and above this range results in the deposition of fullerenes and other carbon compounds, respectively.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: December 17, 2013
    Assignee: The University of Puerto Rico
    Inventors: Deepak Varshney, Gerardo Morell, Brad R. Weiner, Vladimir Makarov
  • Patent number: 8580034
    Abstract: A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge-containing layer on the substrate and a Si layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 700° C., and generating a soft plasma in the vacuum processing tool. The Si layer is exposed to the soft plasma to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and an Si-containing dielectric layer formed on the strained Ge-containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si-containing dielectric layer or a high-k layer on the Si-containing dielectric layer and a gate electrode layer on the high-k layer.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: November 12, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Gert Leusink
  • Patent number: 8540817
    Abstract: There are provided a method for manufacturing a Si(1-v-w-x)CwAlxNv substrate having a reduced number of cracks and high processability, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate at a temperature below 550° C.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: September 24, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
  • Publication number: 20130239615
    Abstract: The present application discloses the details of a microwave plasma chemical vapor deposition process that uses Nitrogen and Diborane simultaneously in combination along with the Methane and Hydrogen gases to grow white color diamonds. The invention embodies using nitrogen to avoid inclusions and impurities in the CVD diamond samples and Diborane for the color enhancement during the growth of diamond. It is also found that heating of the so grown diamonds to 2000 C results in significant color enhancement due to the compensation of Nitrogen and Boron centers in the samples. The origin of the various colors in diamond is explained on the basis of the band diagram of CVD diamond.
    Type: Application
    Filed: October 11, 2010
    Publication date: September 19, 2013
    Inventor: Devi Shanker Misra
  • Patent number: 8524382
    Abstract: Some aspects of the invention provide an oxide substrate having a flat surface at the atomic layer level, and suited to forming a thin film of a perovskite manganese oxide. One aspect of the invention provides a single-crystal oxide substrate 10 having a single-crystal supporting substrate 1 of (210)-oriented SrTiO3 and a single-crystal underlayer 2 of (LaAlO3)0.3-(SrAl0.5Ta0.5O3)0.7, which is LSAT, formed on the (210) plane surface of the supporting substrate. In another aspect of the present invention, the LSAT underlayer 2A is formed in an amorphous state. Other aspects of the invention are also disclosed.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: September 3, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Yasushi Ogimoto
  • Publication number: 20130220214
    Abstract: The present invention is a base material for growing a single crystal diamond comprising a single crystal silicon substrate, a MgO film heteroepitaxially grown on a side of the single crystal silicon substrate where the single crystal diamond is to be grown, and an iridium film or a rhodium film heteroepitaxially grown on the MgO film. As a result, there is provided a base material for growing a single crystal diamond and a method for producing a single crystal diamond substrate which can grow the single crystal diamond having a large area and good crystallinity and produce a high quality single crystal diamond substrate at low cost.
    Type: Application
    Filed: March 18, 2013
    Publication date: August 29, 2013
  • Publication number: 20130216800
    Abstract: A method for forming a heterostructure includes forming a first perovskite crystal structure complex oxide material layer over a substrate to a first thickness. A second perovskite crystal structure oxygen deficient complex oxide oxygen getter material layer is formed upon the first perovskite crystal structure complex oxide material layer. When the second perovskite crystal structure oxygen deficient complex oxide oxygen getter material layer reaches a critical thickness that may approximate one-half to one times the first thickness, the first perovskite crystal structure complex oxide material layer spontaneously transforms into a first brownmillerite crystal structure complex oxide material layer, with an attendant transfer of substantially one-half oxygen atom per perovskite unit cell to the second perovskite crystal structure oxygen deficient complex oxide oxygen getter material layer, thus forming a second perovskite crystal structure oxygen enriched complex oxide oxygen getter material layer.
    Type: Application
    Filed: January 19, 2011
    Publication date: August 22, 2013
    Inventors: Joel D. Brock, David A. Muller, Lena Fitting Kourkoutis, Arthur R. Woll, John Ferguson
  • Publication number: 20130160702
    Abstract: Methods and systems are increase the number of Group V ions formed from Group V precursors in methods of forming III-V semiconductor materials to enhance the growth rate of the III-V semiconductor material. In some embodiments, a Group V precursor is heated and at least partially decomposed in a heated diffuser to form Group V ions. In additional embodiments, microwave energy is applied to a Group V precursor and the Group V precursor is at least partially decomposed to form Group V ions. Group III ions are also formed, and the Group III and Group V ions are used to form a III-V semiconductor material within a chamber.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 27, 2013
    Applicant: SOITEC
    Inventor: Ed Lindow
  • Publication number: 20130087093
    Abstract: Embodiments of the present invention generally relate to a hydride vapor phase epitaxy (HVPE) apparatus that utilizes a high temperature gas distribution device and plasma generation to form an activated precursor gas used to rapidly form a high quality compound nitride layer on a surface of a substrate. In one embodiment, plasma is formed from a nitrogen containing precursor within a gas distribution device prior to injection into a processing region of the HVPE apparatus. In another embodiment, plasma is formed from a nitrogen containing precursor within the processing region by using the gas distribution device as an electrode for forming the plasma in the processing region. In each embodiment, a second precursor gas may be separately introduced into the processing region of the HVPE apparatus through the gas distribution device without mixing with the nitrogen containing precursor prior to entering the processing region.
    Type: Application
    Filed: April 26, 2012
    Publication date: April 11, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Donald J.K. Olgado, Yuriy Melnik, Hiroji Hanawa, Karl M. Brown, Son T. Nguyen, Kevin S. Griffin
  • Patent number: 8409351
    Abstract: A method to grow a boule of silicon carbide is described. The method may include flowing a silicon-containing precursor and a carbon-containing precursor proximate to a heated filament array and forming the silicon carbide boule on a substrate from reactions of the heated silicon-containing and carbon-containing precursors. Also, an apparatus for growing a silicon carbide boule is described. The apparatus may include a deposition chamber to deposit silicon carbide on a substrate, and a precursor transport system for introducing silicon-containing and carbon-containing precursors into the deposition chamber. The apparatus may also include at least one filament or filament segment capable of being heated to a temperature that can activate the precursors, and a substrate pedestal to hold a deposition substrate upon which the silicon carbide boule is grown. The pedestal may be operable to change the distance between the substrate and the filament as the silicon carbide boule is grown.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: April 2, 2013
    Assignee: SiC Systems, Inc.
    Inventors: Joshua Robbins, Michael Seman
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman