Comprising A Silicon Crystal With Oxygen Containing Impurity Patents (Class 117/20)
  • Patent number: 12091771
    Abstract: Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: September 17, 2024
    Assignee: SLT Technologies, Inc.
    Inventors: Drew W. Cardwell, Mark P. D'Evelyn
  • Patent number: 12000063
    Abstract: Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: June 4, 2024
    Assignee: SLT Technologies, Inc.
    Inventors: Drew W. Cardwell, Mark P. D'Evelyn
  • Patent number: 11705322
    Abstract: Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: July 18, 2023
    Assignee: SLT TECHNOLOGIES, INC.
    Inventors: Wenkan Jiang, Mark P. D'Evelyn, Derrick S. Kamber, Dirk Ehrentraut, Jonathan D. Cook, James Wenger
  • Patent number: 11417544
    Abstract: An expanding apparatus for expanding an expansion sheet to which a workpiece including at least a ductile material is adhered. The expanding apparatus includes expanding means for expanding the expansion sheet. The expanding means includes a plurality of moving units that are each configured and arranged to move an associated holding unit, and wherein each of the holding units is configured and arranged to clamp and hold a portion of the expansion sheet. The apparatus also includes cooling/heating means with a plate having a contact surface for contacting the workpiece, and a Peltier element for cooling or heating the plate. Finally, the apparatus includes a polarity change-over means for changing over the polarity of current passed to the Peltier element, wherein the polarity change-over means is configured and arranged to be switched between one status in which the plate is cooled and another status in which the plate is heated.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: August 16, 2022
    Assignee: DISCO CORPORATION
    Inventor: Shinichi Fujisawa
  • Patent number: 10968534
    Abstract: The present invention relates to a pulling control device for growing a single crystal ingot capable of controlling an eccentricity of a single crystal ingot by varying a seed rotation number in real time, and a pulling control method applied thereto. According to the present invention, a pulling control device for growing a single crystal ingot and a pulling control method applied thereto may minimize that a seed rotation number (f) is set to a specific rotation number (fo) causing a resonance phenomenon of a melt by providing a target seed output rotation number (T_fout) that varies in real time so as to match a rotation form for each length of an ingot according to inputting a target seed input rotation number (T_fin) and controlling a rotation number (f) of a seed cable, and it is possible to prevent fluctuation of the melt and an eccentricity phenomenon of the ingot.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: April 6, 2021
    Inventor: Hyun Woo Park
  • Patent number: 10822716
    Abstract: In an exemplary embodiment, a quartz glass crucible 1 includes: a high-aluminum-content layer 14B which is made of quartz glass having a relatively high average aluminum concentration and is provided to form an outer surface 10b of the quartz glass crucible 1; and a low-aluminum-content layer 14A which is made of quartz glass having a lower average aluminum concentration than that of the high-aluminum-content layer 14B and is provided on an inner side of the high-aluminum-content layer 14B, wherein the low-aluminum-content layer 14A includes an opaque layer 11 made of quartz glass containing a large number of minute bubbles, and the high-aluminum-content layer 14B is made of transparent or translucent quartz glass having a lower bubble content than that of the opaque layer 11. The quartz glass crucible is capable of withstanding a single crystal pull-up step undertaken for a very long period of time.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: November 3, 2020
    Assignee: SUMCO CORPORATION
    Inventors: Hiroshi Kishi, Masanori Fukui
  • Patent number: 10415149
    Abstract: A system comprises a silicon seed arranged on a pedestal, where the silicon seed is ring shaped and is configured to receive melted silicon at a feed rate to form an ingot, and where the pedestal is configured to rotate at a rotational speed. A controller is configured to, while the silicon seed receives the melted silicon and while the ingot is forming: receive feedback regarding a diameter of the ingot and regarding an angle of a meniscus of the ingot, and control the rotational speed of the pedestal and the feed rate of the melted silicon based on the feedback to control the diameter of the ingot and the angle of the meniscus of the ingot.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: September 17, 2019
    Assignee: SILFEX, INC.
    Inventors: George David Stephen Hudelson, Igor Peidous, Haresh Siriwardane, Steven M. Joslin, Jihong Chen
  • Patent number: 10233564
    Abstract: A smonocrystalline silicon include a straight body formed without generating a remelt growth area of 200 ?m or more in a height in a growth direction. Growth striations, which are formed radially across the straight body, include a growth striation with an outer end interrupted by another growth striation not to reach a peripheral portion of the straight body. The remelt growth area has the growth striation with the interrupted outer end.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: March 19, 2019
    Assignee: SUMCO CORPORATION
    Inventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa
  • Patent number: 9768330
    Abstract: Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: September 19, 2017
    Assignees: Micron Technology, Inc., Massachusetts Institute of Technology
    Inventors: Roy Meade, Karan Mehta, Efraim Megged, Jason Orcutt, Milos Popovic, Rajeev Ram, Jeffrey Shainline, Zvi Sternberg, Vladimir Stojanovic, Ofer Tehar-Zahav
  • Patent number: 9677193
    Abstract: In one embodiment, a sheet production apparatus comprises a vessel configured to hold a melt of a material. A cooling plate is disposed proximate the melt and is configured to form a sheet of the material on the melt. A first gas jet is configured to direct a gas toward an edge of the vessel. A sheet of a material is translated horizontally on a surface of the melt and the sheet is removed from the melt. The first gas jet may be directed at the meniscus and may stabilize this meniscus or increase local pressure within the meniscus.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: June 13, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Peter L. Kellerman, Gregory D. Thronson, Dawei Sun
  • Patent number: 9406528
    Abstract: A silicon single crystal wafer is provided. The silicon single crystal wafer includes an IDP which is divided into an NiG region and an NIDP region, wherein the IDP region is a region where a Cu based defect is not detected, the NiG region is a region where an Ni based defect is detected and the NIPD region is a region where an Ni based defect is not detected.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: August 2, 2016
    Assignee: LG SILTRON INCORPORATED
    Inventor: Woo Young Sim
  • Patent number: 9397239
    Abstract: Fabrication of a single crystal silicon solar cell with an insitu epitaxially deposited very highly doped p-type silicon back surface field obviates the need for the conventional aluminum screen printing step, thus enabling a thinner silicon solar cell because of no aluminum induced bow in the cell. Furthermore, fabrication of a single crystal silicon solar cell with insitu epitaxial p-n junction formation and very highly doped n-type silicon front surface field completely avoids the conventional dopant diffusion step and one screen printing step, thus enabling a cheaper manufacturing process.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: July 19, 2016
    Assignee: Crystal Solar, Incorporated
    Inventors: Tirunelveli S. Ravi, Ashish Asthana
  • Patent number: 9397172
    Abstract: Provided is a semiconductor epitaxial wafer with reduced metal contamination achieved by higher gettering capability. The semiconductor epitaxial wafer includes a silicon wafer including COPs; a modifying layer formed from a certain element in the silicon wafer, in a surface portion of the silicon wafer; and an epitaxial layer on the modifying layer, wherein the full width half maximum of a concentration profile of the certain element in the depth direction of the modifying layer is 100 nm or less.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: July 19, 2016
    Assignee: SUMCO Corporation
    Inventor: Takeshi Kadono
  • Patent number: 8961686
    Abstract: For manufacturing a monocrystal, a monocrystal pulling-up device controls pressure within a flow straightening cylinder to be from 33331 Pa to 79993 Pa and a flow velocity of inert gas in the cylinder to be from 0.06 m/sec to 0.31 m/sec (0.005 to 0.056 SL/min·cm2) during a post-addition-pre-growth period. By controlling the flow velocity of the inert gas to be in the above-described range during the post-addition-pre-growth period, the inert gas flows smoothly even when the pressure within the cylinder is relatively high. Evaporation of a volatile dopant because of a reverse flow of the inert gas can be restrained. The volatile dopant can be prevented from adhering to the flow straightening cylinder in an amorphous state, and the volatile dopant can be prevented from dropping into a melt or sticking on the melt while growing a crystal. Foulings can be easily removed.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: February 24, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Shinichi Kawazoe, Fukuo Ogawa, Yasuhito Narushima, Toshimichi Kubota
  • Patent number: 8956454
    Abstract: According to the invention, a device and a method for producing materials having a monocrystalline or multicrystalline structure are provided, in which a container is arranged between two pressure regions and the setting of the height of the melt in the container takes place via the setting of the differential pressure between the pressure regions. As a result, even particulate material can be fed continuously to the container and melted uniformly. Delivery material with high purity can also be pulled out of the container.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: February 17, 2015
    Assignee: Streicher Maschinenbau GmbH & Co. KG
    Inventor: Rupert Köckeis
  • Patent number: 8926749
    Abstract: A method for recharging a crucible with polycrystalline silicon comprises adding flowable chips to a crucible used in a Czochralski-type process. Flowable chips are polycrystalline silicon particles made from polycrystalline silicon prepared by a chemical vapor deposition process, and flowable chips have a controlled particle size distribution, generally nonspherical morphology, low levels of bulk impurities, and low levels of surface impurities. Flowable chips can be added to the crucible using conventional feeder equipment, such as vibration feeder systems and canister feeder systems.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: January 6, 2015
    Assignee: Hemlock Semi Conductor
    Inventors: Arvid Neil Arvidson, Terence Lee Horstman, Michael John Molnar, Chris Tim Schmidt, Roger Dale Spencer, Jr.
  • Patent number: 8864907
    Abstract: A condition of a single crystal manufacturing step subjected to the Czochralski method applying an initial oxygen concentration, a dopant concentration or resistivity, and a heat treatment condition is determined simply and clearly on the basis of the conditions of a wafer manufacturing step and a device step so as to obtain a silicon wafer having a desired gettering capability. A manufacturing method of a silicon substrate which is manufactured from a silicon single crystal grown by the CZ method and provided for manufacturing a solid-state imaging device is provided. The internal state of the silicon substrate, which depends on the initial oxygen concentration, the carbon concentration, the resistivity, and the pulling condition of the silicon substrate, is determined by comparing a white spot condition representing upper and lower limits of the density of white spots as device characteristics with the measured density of white spots.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: October 21, 2014
    Assignee: Sumco Corporation
    Inventors: Kazunari Kurita, Shuichi Omote
  • Patent number: 8864906
    Abstract: A method for producing a silicon wafer in which occurrence of slip starting from interstitial-type point defects is prevented in a part from the shoulder to the top of the straight cylinder portion of a silicon single crystal when the silicon single crystal is grown by pulling method under growth conditions entering an I-rich region. In order to prevent occurrence of slip in the range from the shoulder (10A) to the top of the straight cylinder portion (10B), the silicon single crystal (10) is pulled under conditions that the oxygen concentration Oi from the shoulder (10A) to the top of the straight cylinder portion (10B) of the silicon single crystal (10) is not lower than a predetermined concentration for preventing slip starting from interstitial-type point defects, more specifically not lower than 9.0×1017 atoms/cm3.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: October 21, 2014
    Assignee: Sumco Techxiv Kabushiki Kaisha
    Inventors: Hidetoshi Kuroki, Motoaki Yoshinaga, Yutaka Shiraishi, Masahiro Shibata
  • Patent number: 8840722
    Abstract: Implementations and techniques for producing graphene are generally disclosed.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: September 23, 2014
    Assignee: Empire Technology Development LLC
    Inventor: James Pierre Hauck
  • Patent number: 8835284
    Abstract: Annealed wafers having reduced residual voids after annealing and reduced deterioration of TDDB characteristics of an oxide film formed on the annealed wafer, while extending the range of nitrogen concentration contained in a silicon single crystal, are prepared by a method wherein crystal pulling conditions are controlled such that a ratio V/G between a crystal pulling rate V and an average axial temperature gradient G is ?0.9×(V/G)crit and ?2.5×(V/G)crit, and hydrogen partial pressure is ?3 Pa and ?40 Pa. The silicon single crystal has a nitrogen concentration of >5×1014 atoms/cm3 and ?6×1015atoms/cm3, a carbon concentration of ?1×1015 atoms/cm3 and ?9×1015 atoms/cm3, and heat treatment is performed in a noble gas atmosphere having an impurity concentration of ?5 ppma, or in a non-oxidizing atmosphere.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: September 16, 2014
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Masamichi Ohkubo
  • Patent number: 8834627
    Abstract: Silicon single crystals are grown by a method of remelting silicon granules, by crystallizing a conically extended section of the single crystal with the aid of an induction heating coil arranged below a rotating plate composed of silicon; feeding inductively melted silicon through a conical tube in the plate, the tube enclosing a central opening of the plate and extending below the plate, to a melt situated on the conically extended section of the single crystal in contact with a tube end of the conical tube, wherein by means of the induction heating coil below the plate, sufficient energy is provided to ensure that the external diameter of the tube end is not smaller than 15 mm as long as the conically extended section of the single crystal has a diameter of 15 to 30 mm.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: September 16, 2014
    Assignee: Siltronic AG
    Inventors: Wilfried von Ammon, Ludwig Altmannshofer, Martin Wasner
  • Patent number: 8758505
    Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: June 24, 2014
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Wataru Sugimura, Masataka Hourai
  • Patent number: 8753445
    Abstract: The invention relates to an apparatus and method for growing a high quality Si single crystal ingot and a Si single crystal ingot and wafer produced thereby. The growth apparatus controls the oxygen concentration of the Si single crystal ingot to various values thereby producing the Si single crystal ingot with high productivity and extremely controlled growth defects.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: June 17, 2014
    Assignee: Siltron, Inc.
    Inventor: Hyon-Jong Cho
  • Patent number: 8721787
    Abstract: A method for manufacturing a silicon single crystal is provided including producing a silicon melt in a chamber by melting a silicon raw material loaded into a silica glass crucible under a reduced pressure and high temperature, removing gas bubbles from within the silicon melt by rapidly changing at least the pressure or temperature within the chamber, and pulling up the silicon single crystal from the silicon melt after the gas bubbles are removed. When the pressure is rapidly changed, the pressure within the chamber is rapidly changed at a predetermined change ratio. In addition, when the temperature is rapidly changed, the temperature within the chamber is rapidly changed at a predetermined change ratio. In this way, Ar gas attached to an inner surface of the crucible and h is the cause of the generation of SiO gas is removed.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: May 13, 2014
    Assignee: Japan Super Quartz Corporation
    Inventors: Yukinaga Azuma, Masaki Morikawa
  • Patent number: 8696810
    Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: April 15, 2014
    Assignee: 1366 Technologies, Inc.
    Inventors: Eerik T. Hantsoo, G. D. Stephen Hudelson, Ralf Jonczyk, Adam M. Lorenz, Emanuel M. Sachs, Richard L. Wallace
  • Patent number: 8673248
    Abstract: The present invention relates to a single crystal silicon ingot or wafer wherein the lateral incorporation effect of intrinsic point defects has been manipulated such that the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment is limited.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: March 18, 2014
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Milind S. Kulkarni
  • Patent number: 8641820
    Abstract: An implementation of a Czochralski-type crystal growth has been shown and embodied. More particularly, a furnace with suitable insulation and flow arrangement is shown to improve the cost-efficiency of production of crystals. That is achieved by the shown new hot-zone structure, gas flows and the growth process which can decrease the power consumption, increase the lifetime of hot-zone parts and improve the productivity, e.g., by giving means for opening the hot-zone and easily adapting the hot-zone to a new crystal diameter.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: February 4, 2014
    Assignee: Okmetic Oyj
    Inventors: Olli Anttila, Ari Saarnikko, Jari Paloheimo
  • Patent number: 8628613
    Abstract: Silicon semiconductor wafers are produced by pulling a single crystal at a seed crystal from a melt heated in a crucible; supplying heat to the center of the crucible bottom with a heating power which, in the course of the growth of a cylindrical section of the single crystal, is increased at least once to not less than 2 kW and is then decreased again; and slicing semiconductor wafers from the pulled single crystal.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: January 14, 2014
    Assignee: Siltronic AG
    Inventors: Martin Weber, Werner Schachinger, Piotr Filar
  • Patent number: 8617311
    Abstract: In this silicon single crystal wafer for IGBT, COP defects and dislocation clusters are eliminated from the entire region in the radial direction of the crystal, the interstitial oxygen concentration is 8.5×1017 atoms/cm3 or less, and variation in resistivity within the wafer surface is 5% or less. This method for manufacturing a silicon single crystal wafer for IGBT includes introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms/cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The pulled silicon single crystal is irradiated with neutrons so as to dope with phosphorous; or an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so that the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: December 31, 2013
    Assignee: Sumco Corporation
    Inventors: Toshiaki Ono, Shigeru Umeno, Wataru Sugimura, Masataka Hourai
  • Patent number: 8551246
    Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: October 8, 2013
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumio Tahara, Tsuyoshi Ohtsuki, Takatoshi Nagoya, Kiyoshi Mitani
  • Patent number: 8535439
    Abstract: To provide a manufacturing method for a silicon single crystal that can reduce introduction of dislocation thereinto even if a required amount of dopant is added to a melt while growing a straight body portion of a silicon ingot. In a manufacturing method for a silicon single crystal according to the present invention that includes a dopant addition step of adding a dopant to a melt while a straight body portion of a silicon single crystal is growing in a growth step of growing the silicon single crystal by dipping a seed crystal into a silicon melt and then pulling the seed crystal therefrom, in the dopant addition step, a remaining mass of the melt is calculated at the beginning thereof, and the dopant is added to the melt at a rate of 0.01 to 0.035 g/min·kg per minute per 1 kg of the calculated remaining mass of the melt.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: September 17, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Yasuhito Narushima, Toshimichi Kubota, Shinichi Kawazoe, Fukuo Ogawa, Tomohiro Fukuda
  • Patent number: 8529695
    Abstract: Silicon wafer manufacturing method including cleaning polycrystalline silicon with dissolved ozone aqueous solution, cleaning the polycrystalline silicon with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the polycrystalline silicon with ultra pure water, melting the rinsed polycrystalline silicon and pulling a single crystal silicon ingot from the molten silicon liquid at a solidification ratio of 0.9 or less, making the pulled single crystal silicon ingot into block-shaped or grain-shaped single crystal silicon, cleaning with dissolved ozone aqueous solution, cleaning with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the single crystal silicon with ultra pure water, remelting and pulling a single crystal silicon ingot at a solidification of 0.9 or less, and forming a silicon wafer out of the single crystal silicon ingot.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Sumco Corporation
    Inventors: Kazuhiro Harada, Hisashi Furuya
  • Patent number: 8524001
    Abstract: Silicon wafers having excellent voltage resistance characteristics of an oxide film and high C-mode characteristics are derived from single crystal silicon ingots doped with nitrogen and hydrogen, characterized in that a plurality of voids constituting a bubble-like void aggregates are present ?50% relative to total voids; a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 is ?20% of the total area of wafer; a V2 region having a void density of 5×102 to 2×104/cm3 occupies ?80% of the total area of the wafer; and bulk microdefect density is ?5×108/cm3.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: September 3, 2013
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Atsushi Ikari, Masamichi Ohkubo
  • Patent number: 8524002
    Abstract: Silicon wafers doped with nitrogen, hydrogen and carbon, have a plurality of voids, wherein 50% or more of the total number of voids are bubble-like shaped aggregates of voids; a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 which occupies 20% or less of the total area of the silicon wafer; a V2 region having a void density of 5×102 to 2×104/cm3 which occupies 80% or more of the total area of said silicon wafer; and a bulk micro defect density which is 5×108/cm3 or more, have excellent GOI characteristics and a high C-mode pass rate. The wafers are cut from a single crystal pulled by a method in which carbon, nitrogen, and hydrogen dopants are controlled, and the crystal is subjected to rapid cooling.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: September 3, 2013
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Masamichi Ohkubo
  • Patent number: 8506704
    Abstract: The invention relates to a method of fabricating at least one polycrystalline silicon plate (68, 70) with one (64, 66) of its two faces presenting predetermined relief, in which method a layer of polycrystalline silicon (60, 62) is deposited on at least one (56, 58) of the two faces of a support (50). The method comprises the steps of embossing said face (52, 54) of the support (50) to impart thereto a shape that is complementary to said relief; depositing said polycrystalline silicon layer (60, 62) on said embossed face (56, 58) of the support (50), the surface (64 or 66) of said polycrystalline silicon layer situated in contact with said embossed face (56 or 58) then taking on the shape of said relief; and eliminating said support in order to obtain said polycrystalline silicon plate (68 or 70). The invention is applicable to fabricating solar cells.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: August 13, 2013
    Assignee: SOLARFORCE
    Inventors: Christian Belouet, Claude Remy
  • Patent number: 8496752
    Abstract: During a CZ or similar process, a silica crucible is held in a graphite or similar susceptor while being heated to above between about 1580 and 1620 degrees C. Vents or grooves formed in at least one of the outer surface of the crucible and the inner surface of the susceptor permit gasses to vent upwardly and out from between the crucible and susceptor. This permits gas evolved from the crucible as a result of the heat to be vented rather than expanding between the crucible and susceptor thereby deforming the crucible.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: July 30, 2013
    Assignee: Heraeus Shin-Etsu America, Inc.
    Inventors: Katsuhiko Kemmochi, Robert Joseph Coolich, Michael Randall Fallows
  • Patent number: 8470093
    Abstract: A device for pulling a single crystal from a melt having a widened portion between an upper and a lower neck portion including a pulling device having a pulling device cable drum configured to wind a pulling cable, the pulling cable configured to pull the single crystal and a supporting device configured to relieve the upper neck portion of a weight of the single crystal.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: June 25, 2013
    Assignee: Siltronic AG
    Inventors: Andreas Muehe, Alfred Miller, Johann-Andreas Huber
  • Patent number: 8460462
    Abstract: Silicon single crystals are grown from the melt by providing the melt in a crucible; imposing a horizontal magnetic field on the melt; directing a gas between the single crystal and a heat shield to a melt free surface, and controlling the gas to flow over a region of the melt free surface extending in a direction substantially perpendicular to the magnetic induction. A suitable apparatus has a crucible for holding the melt; a heat shield surrounding the silicon single crystal having a lower end which is connected to a bottom cover facing a melt free surface and a non-axisymmetric shape with respect to a crucible axis, such that gas which is directed between the crystal and the heat shield to the melt free surface is forced to flow over a region of the melt which extends substantially perpendicular to the magnetic induction.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: June 11, 2013
    Assignee: Siltronic AG
    Inventor: Piotr Filar
  • Patent number: 8460463
    Abstract: A silicon wafer is produced through the steps of forming a silicon ingot by a CZ method with an interstitial oxygen concentration of not more than 7.0×1017 atoms/cm3 and with a diameter of a COP occurring region not more than a diameter of a crystal, slicing a wafer from the silicon ingot after doping the silicon ingot with phosphorus, forming a polysilicon layer or a strained layer on one main surface of the wafer, and mirror polishing the other main surface of the wafer.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: June 11, 2013
    Assignee: Sumco Corporation
    Inventors: Shigeru Umeno, Manabu Nishimoto, Masataka Hourai
  • Patent number: 8414701
    Abstract: In this method for manufacturing a silicon single crystal, when growing the silicon single crystal, in order to control the V/G value with high accuracy so as to yield a desired defect-free region, it is important to conduct the pulling at a constant pulling rate. In the method for pulling a silicon single crystal in the present invention, in order to control the V/G value with high accuracy, the distance ?t between the melt surface of the silicon melt and the heat shielding member that is disposed so as to oppose to and to partially cover this melt surface is continuously measured while pulling (growing) the silicon single crystal.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: April 9, 2013
    Assignee: Sumco Corporation
    Inventor: Keiichi Takanashi
  • Patent number: 8394198
    Abstract: A silica glass crucible for pulling up a silicon single crystal including a wall part, a corner part and a bottom part is provided with an outer layer formed from an opaque silica glass layer which includes many bubbles, and an inner layer formed from a transparent silica glass layer which substantially does not include bubbles, wherein at least one part of an inner surface of the wall part and the corner part being an uneven surface formed with multiple damaged parts having a depth of 50 ?m or more and 450 ?m or less, and wherein a region among the inner surface of the bottom part within a certain range from the center of the bottom part being a smooth surface which does is substantially not formed with damage.
    Type: Grant
    Filed: November 27, 2009
    Date of Patent: March 12, 2013
    Assignee: Japan Super Quartz Corporation
    Inventors: Masaki Morikawa, Jun Furukawa, Satoshi Kudo
  • Patent number: 8382894
    Abstract: Silicon wafers wherein slip dislocations and warpages during device production are suppressed, contain BMDs with an octahedral shape, and of BMDs at a depth greater than 50 ?m from the surface of the wafer, the density of BMDs with diagonal size of 10 nm to 50 nm is ?1×1012/cm3, and the density of BSFs is ?1×108/cm3. The present silicon wafers preferably have an interstitial oxygen concentration of 4×1017 atoms/cm3 to 6×1017 atoms/cm3, and a density of BMDs with diagonal size of ?200 nm of not more than 1×107/cm3.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: February 26, 2013
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Masayuki Fukuda
  • Patent number: 8333838
    Abstract: Provided is an apparatus capable of producing a fluoride crystal in a very short period of time, and a method suitable for producing a fluoride crystal using the apparatus. The apparatus comprises a chamber, a window material, and the like, and is modified such that it can evacuate air from the chamber to provide a high degree vacuum there. The apparatus further includes a crucible, which has a perforation at its bottom. The capillary portion of the perforation is adjusted to facilitate the contact of a seed crystal with a melt. By using the apparatus it is possible to stably produce high quality single crystals of fluorides in a short period of time.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: December 18, 2012
    Assignees: Stella Chemifa Corporation, Fukuda Crystal Laboratory
    Inventors: Tsuguo Fukuda, Hirohisa Kikuyama, Tomohiko Satonaga
  • Patent number: 8328932
    Abstract: A ribbon crystal pulling furnace has an interior for enclosing at least a portion of one or more ribbon crystals, and an afterheater positioned within the interior. The afterheater has at least one wall with one or more openings that facilitate control of the temperature profile within the furnace.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: December 11, 2012
    Assignee: Evergreen Solar, Inc
    Inventors: Weidong Huang, David Harvey, Scott Reitsma
  • Patent number: 8323403
    Abstract: An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume of the silicon layer. The SOI wafers may be prepared by Czochralski silicon single crystal growth, the condition v/G<(v/G)crit=1.3×10?3 cm2/(K·min) being fulfilled at the crystallization front over the entire crystal cross section, with the result that an excess of interstitial silicon atoms prevails in the silicon single crystal produced; separation of at least one donor wafer from this silicon single crystal, bonding of the donor wafer to a carrier wafer, and reduction of the thickness of the donor wafer, with the result that a silicon layer having a thickness of less than 500 nm bonded to the carrier wafer remains.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: December 4, 2012
    Assignee: Siltronic AG
    Inventors: Dieter Graef, Markus Blietz, Reinhold Wahlich, Alfred Miller, Dirk Zemke
  • Patent number: 8298333
    Abstract: A protective coating is prepared for, and applied to, crucibles used in the handling of molten materials that are solidified in the crucible and then removed as ingots. Crucibles containing this protective coating may be used for the solidification of silicon. The coating has a specified oxygen content and contains a mineral binder and silicon nitride or silicon oxynitride.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: October 30, 2012
    Assignee: Vesuvius Crucible Company
    Inventor: Gilbert Rancoule
  • Patent number: 8298926
    Abstract: A method for making a silicon wafer includes the steps of generating and stabilizing embryos that become oxygen precipitates by succeeding thermal annealing applied during a semiconductor device manufacturing process. In the silicon wafer, embryos are substantially removed in a denuded zone, and embryos are distributed at a relatively higher concentration in a bulk region. Also, by controlling behaviors of embryos, a silicon wafer having a desired concentration profile of oxygen precipitates by succeeding thermal annealing is manufactured with high reliability and reproducibility.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: October 30, 2012
    Assignees: Siltron Inc., Hynix Semiconductor Inc.
    Inventors: Hyung-Kook Park, Jin-Kyun Hong, Kun Kim, Chung-Geun Koh
  • Patent number: 8246744
    Abstract: By specifying an initial oxygen concentration in a silicon single crystal and a concentration of thermal donors produced according to a thermal history from 400° C. to 550° C. that the silicon single crystal undergoes during crystal growth, a nucleation rate of oxygen precipitates produced in the silicon single crystal while the silicon single crystal is subjected to a heat treatment is determined. Further, by specifying the heat treatment condition of the silicon single crystal, an oxygen precipitate density and an amount of precipitated oxygen under a given heat treatment condition are predicted by calculation.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: August 21, 2012
    Assignee: Komatsu Denshi Kinzoku Kabushiki Kaisha
    Inventors: Kozo Nakamura, Junsuke Tomioka, Tetsuro Akagi, Shiro Yoshino
  • Patent number: 8236104
    Abstract: A single-crystal manufacturing apparatus comprising at least: a main chamber configured to accommodate a crucible; a pulling chamber continuously provided above the main chamber, the pulling chamber into which a grown single crystal is pulled and accommodated; a gas inlet provided in the pulling chamber; a gas flow-guide cylinder downwardly extending from a ceiling of the main chamber; and a heat-insulating ring upwardly extending from a lower end portion of the gas flow-guide cylinder with a diameter of the heat-insulating ring increased so as to surround an outside of the gas flow-guide cylinder, wherein at least one window is provided in a region between 50 and 200 mm from a lower end of the gas flow-guide cylinder, and an opening area of the window accounts for 50% or more of a surface area of the region between 50 and 200 mm from the lower end of the gas flow-guide cylinder.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: August 7, 2012
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Satoshi Soeta, Toshifumi Fujii
  • Patent number: 8231725
    Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: July 31, 2012
    Assignee: Siltronic AG
    Inventors: Andreas Sattler, Wilfried von Ammon, Martin Weber, Walter Haeckl, Herbert Schmidt