Comprising A Silicon Crystal With Oxygen Containing Impurity Patents (Class 117/20)
  • Patent number: 7014704
    Abstract: A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1×1013 atoms/cm3–1×1015 atoms/cm3 with a cooling rate of not less than 2.5° C./min at a crystal temperature of 1150° C.–1000° C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than ? of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9×1017 atoms/cm3 (ASTM '79). With this method, the silicon single crystal, in which the generation of Grown-in defects can be effectively suppressed, can be produced in a simple process without any increase in the production cost.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: March 21, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Tadami Tanaka, Shigeru Umeno, Eiichi Asayama, Hideshi Nishikawa
  • Patent number: 6986925
    Abstract: A single crystal silicon wafer comprising a front surface, a back surface, a lateral surface joining the front and back surfaces, a central axis perpendicular to the front and back surfaces, and a segment which is axially symmetric about the central axis extending substantially from the front surface to the back surface in which crystal lattice vacancies are the predominant intrinsic point defect, the segment having a radial width of at least about 25% of the radius and containing agglomerated vacancy defects and a residual concentration of crystal lattice vacancies wherein (i) the agglomerated vacancy defects have a radius of less than about 70 nm and (ii) the residual concentration of crystal lattice vacancy intrinsic point defects is less than the threshold concentration at which uncontrolled oxygen precipitation occurs upon subjecting the wafer to an oxygen precipitation heat treatment.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: January 17, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Paolo Mutti, Francesco Bonoli
  • Patent number: 6955718
    Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has a non-uniform distribution of stabilized oxygen precipitate nucleation centers therein. Specifically, the peak concentration is located in the wafer bulk and a precipitate-free zone extends inward from a surface.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: October 18, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov
  • Patent number: 6926770
    Abstract: The present invention relates to a method to control the nucleation and transverse motion of 180° inverted domains in ferroelectric nonlinear crystals. It includes a process composing of a high temperature oxidation of the first metal layer and a pulsed field poling of the second electrodes. The main object of present invention is to provide domain inversion of ferroelectric nonlinear crystals with field control the nucleation and transverse motion of inverted domains and two-dimension nonlinear photonic crystals for time-domain multiple-wave simultaneous lasers and space filter function. Another object of present invention is to provide space-charge effect for screened edge field beneath the metal electrode, The other object of present invention is to provide the constraint of inverted domain nucleation in the oxidized electrode for arbitrarily geometrical form of 2D ferroelectric lattice structure.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: August 9, 2005
    Assignee: National Taiwan University
    Inventors: Lung-Han Peng, Way-Seen Wang, Shu-Mei Tsan, Yi-Chun Shih, Yung-Chang Zhang, Chao-Ching Hsu
  • Patent number: 6913646
    Abstract: There can be provided a silicon single crystal wafer grown according to Czochralski method wherein the whole plane of the wafer is occupied by N region on the outside of OSF generated in a shape of a ring by thermal oxidation treatment and there exists no defect region detected by Cu deposition. Thereby, there can be produced a silicon single crystal wafer according to CZ method, which does not belong to any of V region rich in vacancies, OSF region and I region rich in interstitial silicons, and can surely improve electric characteristics such as oxide dielectric breakdown voltage characteristics or the like under stable manufacture conditions.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: July 5, 2005
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masahiro Sakurada, Takeshi Kobayashi, Tatsuo Mori, Izumi Fusegawa, Tomohiko Ohta
  • Patent number: 6902618
    Abstract: The present invention provides a silicon single crystal wafer having a diameter of 300 mm or more and having a defect-free layer containing no COP for a depth of 3 ?m or more from a surface and a method for producing a silicon single crystal, wherein, when a silicon single crystal having a diameter of 300 mm or more is pulled with nitrogen doping by the CZ method, the crystal is grown with a value of V/G [mm2/K·min] of 0.17 or less, where V [mm/min] is a pulling rate, and G [K/mm] is an average of temperature gradient in the crystal along a pulling axis from the melting point of silicon to 1400° C. Thus, there are established conditions for pulling a silicon single crystal and conditions for heat treatment of wafer for obtaining a silicon single crystal wafer having a defect-free layer free from COP for a sufficient depth of the surface layer by pulling a silicon single crystal having a diameter of 300 mm or more, processing the crystal into wafers and subjecting the wafers to the heat treatment.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: June 7, 2005
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Makoto Iida
  • Patent number: 6896728
    Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process including growing a single crystal silicon ingot from molten silicon, and as part of the growth process, controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: May 24, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 6893499
    Abstract: According to the present invention, there is disclosed a silicon single crystal wafer grown according to the CZ method which is a wafer having a diameter of 200 mm or more produced from a single crystal grown at a growth rate of 0.5 mm/min or more without doping except for a dopant for controlling resistance, wherein neither an octahedral void defect due to vacancies nor a dislocation cluster due to interstitial silicons exists as a grown-in defect, and a method for producing it.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: May 17, 2005
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Izumi Fusegawa, Koji Kitagawa, Ryoji Hoshi, Masahiro Sakurada, Tomohiko Ohta
  • Patent number: 6872250
    Abstract: A method for determining crystallization conditions for a material, the method comprising: taking a microfluidic device comprising one or more lumens having microvolume dimensions and a plurality of different crystallization samples within the one or more lumens, the plurality of crystallization samples comprising a material to be crystallized and crystallization conditions that vary among the plurality of crystallization samples; transporting the plurality of different crystallization samples within the lumens; and identifying a precipitate or crystal formed in the one or more lumens.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: March 29, 2005
    Assignee: Syrrx, Inc.
    Inventors: Peter R. David, Nathaniel E. David
  • Patent number: 6869477
    Abstract: A process for preparing a single crystal silicon in accordance with the Czochralski method, is provided. More specifically, by quickly reducing the pull rate at least once during the growth of the neck portion of the single crystal ingot, in order to change the melt/solid interface shape from a concave to a convex shape, the present process enables zero dislocation growth to be achieved in a large diameter neck within a comparably short neck length, such that large diameter ingots of substantial weight can be produced safely and at a high throughput.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: March 22, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hiroyo Haga, Makoto Kojima, Shigemi Saga
  • Patent number: 6830740
    Abstract: The present invention provides a method for producing a solar cell comprising forming the solar cell from a CZ silicon single crystal wafer, wherein a CZ silicon single crystal wafer having an initial interstitial oxygen concentration of 15 ppma or less is used as the CZ silicon single crystal wafer; a solar cell produced from a CZ silicon single crystal wafer, wherein the CZ silicon single crystal wafer has an interstitial oxygen concentration of 15 ppma or less; and a solar cell produced from a CZ silicon single crystal wafer, wherein the CZ silicon single crystal wafer has a BMD density of 5×108/cm3 or less. Thus, there can be obtained a solar cell showing little fluctuation of characteristics.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: December 14, 2004
    Assignees: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Konomu Oki, Takao Abe
  • Publication number: 20040244674
    Abstract: A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1×1013 atoms/cm3-1×1015 atoms/cm3 with a cooling rate of not less than 2.5° C./min at a crystal temperature of 1150° C.-1000° C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than ⅗ of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9×1017 atoms/cm3 (ASTM '79).
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Toshiaki Ono, Tadami Tanaka, Shigeru Umeno, Eiichi Asayama, Hideshi Nishikawa
  • Patent number: 6818197
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: November 16, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Kazuhiro Ikezawa, Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Publication number: 20040211355
    Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including gallium, nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal.
    Type: Application
    Filed: May 17, 2004
    Publication date: October 28, 2004
    Inventors: Kensaku Motoki, Masaki Ueno
  • Patent number: 6805742
    Abstract: A semiconductor substrate after heat-treatment in a non-oxidising atmosphere has the characteristics that the depth of the denuded zone may be greater than 12 &mgr;m or the defect-free depth of the void type defect is greater than 12 &mgr;m and the substrate has a locally densified portion produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by using secondary ion mass-spectroscopy, and the density of the crystal defect of oxygen precipitates is 5×108/cm3 or more, and the said substrate is produced by heat-treating for at least one hour at the temperature of 1200° C. or more in a non-oxidising atmosphere.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: October 19, 2004
    Assignee: Siltronic AG
    Inventors: Akiyoshi Tachikawa, Kazunori Ishisaka, Atsushi Ikari
  • Patent number: 6802899
    Abstract: There is provided a manufacturing process for a CZ silicon single crystal wafer which is subjected to heat treatment wherein slip resistance of a portion of the CZ silicon single crystal wafer in contact with a heat treatment boat is improved with extreme simplicity, convenience and very low cost. A silicon single crystal rod is grown by means of a Czochralski method in a condition that an OSF ring region is formed in a peripheral region of the silicon single crystal rod and the grown silicon signal crystal rod is processed into silicon single crystal wafers, whereby the silicon single crystal wafer is obtained such that when the silicon single crystal wafer is subjected to heat treatment, at least a portion of the silicon single crystal wafer in contact between the wafer and the boat is formed of an OSF ring region.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: October 12, 2004
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Masaro Tamatsuka
  • Publication number: 20040149201
    Abstract: A method for preparing a high-quality garnet single crystal represented by the composition formula CaxNbyGazO12 (2.9<x<3.1, 1.6<y<1.8, 3.1<z<3.3) is provided. The single crystal can preferably be used as a single crystal substrate for forming a defect-free single crystal of bismuth-substituted rare-earth iron garnet thereon by liquid-phase epitaxial deposition. The method is to prepare a single crystal by the Czochralski technique, the single crystal having a garnet structure being represented by the composition formula CaxNbyGazO12 (2.9<x<3.1, 1.6<y<1.8, 3.1<z<3.3). The crystal is grown at a crystal growth rate g less than or equal to 1.72 mm/h. The crystal is preferably grown in an atmosphere containing oxygen 0.4% or more by volume and below 10.0% by volume.
    Type: Application
    Filed: January 8, 2004
    Publication date: August 5, 2004
    Applicant: TDK CORPORATION
    Inventor: Jun Sato
  • Patent number: 6755911
    Abstract: A crucible 1 made of a C/C composite material for use in single crystal pulling, the crucible 1 having a lateral cylindrical portion 11 and a bottom portion 12 integrally formed as multiple layers wound by a filament winding method, in which the first layer 2 as the innermost crucible layer, among the multiple layers, is wound such that carbon fibers form tracks passing the polar point O at the bottom 12, the second layer 3 wound on the outer surface of the first layer 2 is wound along tracks to form a first outer circular bottom 8 that extends outwardly from about a middle part of a raised portion 6 where the carbon fibers of the first layer 2 are localized to the polar point O, and the third layer 4 and the succeeding layers wound on the outer surface of the second layer 3 are wound respectively along tracks to form outer circular bottoms that extend stepwise outwardly from about the middle parts of the outer surfaces of layers situated inside the respective layers, and the top for the raised portion of the
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: June 29, 2004
    Assignee: Toyo Tanso Co., Ltd.
    Inventors: Masatoshi Yamaji, Hisanori Nishi, Yuji Tomita, Shingo Bito, Toshiyuki Miyatani
  • Publication number: 20040118334
    Abstract: A silicon single crystal which, over an ingot length of over 10 percent of the total ingot length, has a uniform defect picture and narrow radial dopant and oxygen variations. The process in accordance with the Czochralski method involves bringing about a temperature distribution in the melt in the region of the solidification interface which deviates from rotational symmetry.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 24, 2004
    Applicant: Wacker Siltronic AG
    Inventors: Martin Weber, Wilfried von Ammon, Herbert Schmidt, Janis Virbulis, Yuri Gelfgat, Leonid Gorbunov
  • Patent number: 6749684
    Abstract: A method is disclosed for forming an epitaxial layer on a front side of a substrate formed of a monocrystalline material, using a chemical vapor deposition system. In this method, a plurality of gettering wafers formed of a gettering material are arranged in the CVD system, such that the front side of each substrate is facing one of the gettering wafers. Impurities present in the CVD system during formation of the epitaxial layer are gettered by the gettering wafers. Alternatively, a layer of a gettering material is deposited on a back side of each of the plurality of substrates, and the substrates are arranged such that the front side of each substrate is facing the backside of another of the substrates. In another embodiment, a layer of a gettering material is deposited on an interior surface of the CVD system. Impurities removed from the CVD system during epitaxial formation include oxygen, water vapor and other oxygen-containing contaminants.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: Huajie Chen, Dan Mocuta, Richard J. Murphy, Paul Ronsheim, David Rockwell
  • Patent number: 6712901
    Abstract: A process for modifying the surface of a quartz glass crucible and a modified quartz glass crucible produced by the process, where the crucible has a transparent coated layer containing a crystallization accelerator on the surface. The process includes coating a mixed solution containing a metal salt and a partial hydrolyzate of alkoxysilane oligomer on the surface of the crucible and heating to obtain a quartz glass crucible having a transparent coated layer. The crystallization promoter contains a metal oxide or a metal carbonate dispersed in a silica matrix.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: March 30, 2004
    Assignee: Japan Super Quartz Corporation
    Inventors: Toshio Tsujimoto, Yoshiyuki Tsuji
  • Publication number: 20040055527
    Abstract: A Czochralski method of producing a single crystal silicon ingot having a uniform thermal history. In the process, the power supplied to the side heater is decreased during the growth of a latter portion of main body, and optionally the end-cone, of the ingot, while power supplied to a bottom heater is gradually increased during growth the same portion. The present process enables a substantial portion of an ingot to be obtained yielding wafers having fewer light point defects in excess of about 0.2 microns and improved gate oxide integrity.
    Type: Application
    Filed: September 29, 2003
    Publication date: March 25, 2004
    Inventors: Makoto Kojima, Yasuhiro Ishii
  • Publication number: 20040040491
    Abstract: A silicon single crystal wafer for a particle monitor is presented, which wafer has an extremely small amount in the surface density of light point defects and is capable of still maintaining a small surface density even after repeating the SC-1. The wafer is prepared by slicing a silicon single crystal ingot including an area in which crystal originated particles are generated, and the surface density of particles having a size of not less than 0.12 &mgr;m is not more than 15 counts/cm2 after repeating the SC-1. More preferably, a silicon single crystal wafer having a nitrogen concentration of 1×1013-1×1015 atoms/cm3 provides a surface density of not more than 1 counts/cm2 for the particles having a diameter of not less than 0.12 &mgr;m even after repeating the SC-1. Hence, a high quality wafer optimally used for a particle monitor can be obtained and a very small number of defects in the wafer make it possible to produce devices.
    Type: Application
    Filed: June 24, 2003
    Publication date: March 4, 2004
    Inventors: Hiroki Murakami, Masahiko Okui, Hiroshi Asano
  • Publication number: 20040003770
    Abstract: A process for producing silicon which is substantially free of agglomerated intrinsic point defects in an ingot having a vacancy dominated region. An ingot is grown generally in accordance with the Czochralski method. While intrinsic point defects diffuse from or are annihilated within the ingot, at least a portion of the ingot is maintained above a temperature TA at which intrinsic point defects agglomerate. The achievement of defect free silicon is thus substantially decoupled from process parameters, such as pull rate, and system parameters, such as axial temperature gradient in the ingot.
    Type: Application
    Filed: May 13, 2003
    Publication date: January 8, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Harold W. Korb
  • Publication number: 20040000267
    Abstract: An improved method of determining the concentration of nitrogen within a wafer is provided. At least a portion of the nitrogen within the wafer is initially gettered to a gettering site. In order prevent the in-diffusion of nitrogen, a barrier layer is generally deposited upon the wafer prior to gettering the nitrogen within the wafer. The nitrogen is then measured at the gettering site. The concentration of nitrogen within the wafer is then determined based upon the measurement of nitrogen at the gettering site and the diffusion coefficient for nitrogen. In this regard, the diffusion coefficient of nitrogen permits the measurement of nitrogen at the gettering site to be translated into a measurement of the concentration of nitrogen throughout the entire wafer.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 1, 2004
    Applicant: SHE America, Inc.
    Inventor: Sergei V. Koveshnikov
  • Patent number: 6670036
    Abstract: There are disclosed a silicon seed crystal which is composed of silicon single crystal and used for the Czochralski method, wherein oxygen concentration in the seed crystal is 15 ppma (JEIDA) or less, a silicon seed crystal which is used for the Czochralski method, wherein the silicon seed crystal does not have a straight body, and a method for producing a silicon single crystal by the Czochralski method comprising using said seed crystal, bringing a tip end of the seed crystal into contact with a silicon melt to melt the tip end of the seed crystal, with or without performing necking operation, and growing a silicon single crystal. The method is capable of improving the rate of success in making crystals dislocation-free and the productivity of single crystal rods regardless of the use of necking operation.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: December 30, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Eiichi Iino, Masanori Kimura
  • Publication number: 20030221609
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The heat-treated wafer is then oxidized by heating in the presence of an oxygen-containing atmosphere in order to establish a vacancy concentration profile within the wafer. The oxidized wafer is then cooled from the temperature of said oxidizing heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
    Type: Application
    Filed: June 13, 2003
    Publication date: December 4, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Patent number: 6642123
    Abstract: A method of fabricating a silicon wafer, which includes the steps of preparing a silicon wafer by slicing, grinding, and cleaning an ingot, inserting the silicon wafer in a diffusion furnace having an ambience of one of Ar, N2 and inert gas including Ar and N2, pre-heating and maintaining the diffusion furnace at about 500° C., changing the ambience into one of H2, Ar and inert gas including H2 and Ar successively, increasing a temperature of the diffusion furnace by a temperature-increasing speed of 50˜70° C./min between 500˜800° C., 10˜50° C./min between 800˜900° C., 0.5˜10° C./min between 900˜1000° C., and 0.1˜0.5° C./min between 1000˜1250° C., maintaining the diffusion furnace at 1200˜1250° C.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: November 4, 2003
    Inventors: Young-Hee Mun, Gun Kim, Sung-Ho Yoon
  • Publication number: 20030200913
    Abstract: A large semiconductor crystal has a diameter of at least 6 inches and a low dislocation density of not more than 1×104 cm−2. The crystal is preferably a single crystal of GaAs, or one of CdTe, InAs, GaSb, Si or Ge, and may have a positive boron concentration of not more than 1×1016 cm−3 and a carbon concentration of 0.5×1015 cm−3 to 1.5×1015 cm−3 with a very uniform concentration throughout the crystal. Such a crystal can form a very thin wafer with a low dislocation density. A special method and apparatus for producing such a crystal is also disclosed.
    Type: Application
    Filed: May 5, 2003
    Publication date: October 30, 2003
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Patent number: 6632411
    Abstract: The present invention provides a silicon wafer sliced from a silicon single crystal ingot grown by the Czochralski method under such conditions that V-rich region should become dominant, wherein count number of particles having a size of 0.1 &mgr;m or more is 1 count/cm2 or less when particles are counted by using a particle counter and a method for producing a silicon single crystal. Thus, there is provided a production technique that can improve productivity and reduce cost for high quality silicon wafers of excellent device characteristics by further reducing density and size of defects such as COP.
    Type: Grant
    Filed: November 23, 2001
    Date of Patent: October 14, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Izumi Fusegawa, Tomohiko Ohta, Shigemaru Maeda
  • Patent number: 6632278
    Abstract: The present invention relates to an epitaxial wafer comprising single crystal silicon substrate and an epitaxial layer deposited thereon. The substrate comprises an axially symmetric region which is free of agglomerated intrinsic point defects and wherein silicon self-interstitials are the predominant intrinsic point defect in the axially symmetric region. The present invention further relates to a process for producing such an epitaxial wafer.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: October 14, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert A. Falster, Joseph C. Holzer, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 6626994
    Abstract: There are provided a silicon wafer for epitaxial growth wherein a void type defect is not exposed on the surface where an epitaxial layer is grown, and a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: September 30, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akihiro Kimura, Hideki Sato, Ryuji Kono, Masahiro Kato, Masaro Tamatsuka
  • Publication number: 20030177976
    Abstract: The present invention provides a method for producing a solar cell comprising forming the solar cell from a CZ silicon single crystal wafer, wherein a CZ silicon single crystal wafer having an initial interstitial oxygen concentration of 15 ppma or less is used as the CZ silicon single crystal wafer; a solar cell produced from a CZ silicon single crystal wafer, wherein the CZ silicon single crystal wafer has an interstitial oxygen concentration of 15 ppma or less; and a solar cell produced from a CZ silicon single crystal wafer, wherein the CZ silicon single crystal wafer has a BMD density of 5×108/cm3 or less. Thus, there can be obtained a solar cell showing little fluctuation of characteristics.
    Type: Application
    Filed: February 11, 2003
    Publication date: September 25, 2003
    Inventors: Konomu Oki, Takao Abe
  • Publication number: 20030172865
    Abstract: The present invention provides a silicon single crystal wafer having a diameter of 300 mm or more and having a defect-free layer containing no COP for a depth of 3 &mgr;m or more from a surface and a method for producing a silicon single crystal, wherein, when a silicon single crystal having a diameter of 300 mm or more is pulled with nitrogen doping by the CZ method, the crystal is grown with a value of V/G [mm2/K•min] of 0.17 or less, where V [mm/min] is a pulling rate, and G [K/mm] is an average of temperature gradient in the crystal along a pulling axis from the melting point of silicon to 1400° C.
    Type: Application
    Filed: February 12, 2003
    Publication date: September 18, 2003
    Inventor: Makoto Iida
  • Patent number: 6605150
    Abstract: The present invention relates to a single crystal silicon, in wafer and ingot form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects. The region extends from a circumferential edge of the wafer or constant diameter region of an ingot, axially inwardly toward a central axis such that the entire wafer, a constant diameter portion of the ingot, or an annular-shaped portion of wafer or ingot is free of agglomerated intrinsic point defects. The present invention further relates to these axially symmetric regions wherein silicon self-interstitials are the predominant intrinsic point detect.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: August 12, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer
  • Publication number: 20030116082
    Abstract: There can be provided a silicon single crystal wafer grown according to Czochralski method wherein the whole plane of the wafer is occupied by N region on the outside of OSF generated in a shape of a ring by thermal oxidation treatment and there exists no defect region detected by Cu deposition. Thereby, there can be produced a silicon single crystal wafer according to CZ method, which does not belong to any of V region rich in vacancies, OSF region and I region rich in interstitial silicons, and can surely improve electric characteristics such as oxide dielectric breakdown voltage characteristics or the like under stable manufacture conditions.
    Type: Application
    Filed: August 27, 2002
    Publication date: June 26, 2003
    Inventors: Masahiro Sakurada, Takeshi Kobayashi, Tatsuo Mori, Izumi Fusegawa, Tomohiko Ohta
  • Patent number: 6569237
    Abstract: A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050° C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950° C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: May 27, 2003
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Tadami Tanaka, Toshiaki Ono, Eiichi Asayama
  • Patent number: 6565822
    Abstract: An epitaxial silicon wafer, which has no projections having a size of 100 nm or more and a height of 5 nm or more on an epitaxial layer, and a method for producing an epitaxial silicon wafer, wherein a single crystal ingot containing no I-region is grown when a silicon single crystal is grown by the CZ method, and an epitaxial layer is deposited on a silicon wafer sliced from the single crystal ingot and containing no I-region for the entire surface. An epitaxial wafer of high quality with no projection-like surface distortion observed as particles on an epi-layer surface is provided by forming a wafer having no I-region for the entire surface from a single crystal and depositing an epitaxial layer thereon, and a single crystal having no I-region for entire plane is produced with good yield and high productivity, thereby improving productivity of epi-wafers and realizing cost reduction.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: May 20, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Susumu Sonokawa, Masahiro Sakurada, Tomohiko Ohta, Izumi Fusegawa
  • Patent number: 6565649
    Abstract: The present invention is directed to an epitaxial wafer comprising a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated silicon self-interstitial defects on the substrate surface upon which the epitaxial layer is deposited.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: May 20, 2003
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule′Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
  • Patent number: 6547875
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 15, 2003
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Patent number: 6548035
    Abstract: A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 or less or an OSF density of 1×104/cm2 or less in the OSF region, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer. There are provided a substrate for an epitaxial wafer that suppresses crystal defects to be generated in an epitaxial layer when epitaxial growth is performed on a CZ silicon single crystal wafer doped with nitrogen and also has superior IG ability, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: April 15, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akihiro Kimura, Makoto Iida, Yoshinori Hayamizu, Ken Aihara, Masanori Kimura
  • Patent number: 6544490
    Abstract: A silicon wafer obtained by slicing a silicon single crystal ingot grown by the Czochralski method with or without nitrogen doping, wherein the silicon wafer has an NV-region, an NV-region containing an OSF ring region or an OSF ring region for its entire plane and has an interstitial oxygen concentration of 14 ppma or less, and a method for producing it, as well as a method for evaluating defect regions of a silicon wafer. Thus, there are provided a silicon wafer that stably provides oxygen precipitation regardless of position in crystal or device production process, and a method for producing it. Further, defect regions of a silicon wafer of which pulling conditions are unknown and thus of which defect regions are also unknown can be evaluated.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: April 8, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hiroshi Takeno, Hideki Shigeno, Makoto Iida
  • Patent number: 6544332
    Abstract: A method for producing a silicon single crystal in accordance with CZ method, characterized in that before producing the crystal having a predetermined kind and concentration of impurity, another silicon single crystal having the same kind and concentration of impurity as the crystal to be produced is grown to thereby determine an agglomeration temperature zone of grown-in defects thereof, and then based on the temperature, growth condition of the crystal to be produced or temperature distribution within a furnace of a pulling apparatus is set such that a cooling rate of the crystal for passing through the agglomeration temperature zone is a desired rate to thereby produce the silicon single crystal. A silicon single crystal produced in accordance with the above method, characterized in that a density of LSTD before subjecting to heat treatment is 500 number/cm2 or more and the average defect size is 70 nm or less.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: April 8, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Masanori Kimura, Hiroshi Takeno, Yoshinori Hayamizu
  • Publication number: 20030051660
    Abstract: A method of heat-treating a silicon wafer has the steps of: preparing a silicon wafer having an oxygen concentration of 1.2×1018 atoms/cm3 or less (old ASTM) without generating crystal originated particles(COP'S) and interstitial-type large dislocation(L/D); forming a polysilicon layer of 0.1 &mgr;m to 1.6 &mgr;m in thickness on a back of the silicon wafer by a chemical-vapor deposition at a temperature of 670° C.±30° C.; and heat-treating the silicon wafer having the polysilicon layer in an oxygen atmosphere at 1000° C.±30° C. for 2 to 5 hours and subsequently at 1130° C.±30° C. for 1 to 16 hours. In this method, the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which oxidation induced stacking faults(OSF's) manifest itself at a center of the wafer when the wafer is subjected to the heat-treatment.
    Type: Application
    Filed: June 3, 2002
    Publication date: March 20, 2003
    Inventors: Hiroshi Koya, Hisashi Furuya, Yoji Suzuki, Yukio Muroi, Takaaki Shiota
  • Patent number: 6517632
    Abstract: A method of fabricating a silicon single crystal ingot and a method of fabricating a silicon wafer using the ingot, characterized in that: the method is structured in such a manner that the silicon single crystal ingot is pulled up from the silicon fused liquid 7 in which nitrogen N and carbon C are doped in polycrystalline silicon, by using the Czochralski method, and its nitrogen density is 1×1013-5×1015 atoms/cm3, and the carbon density is 5×1015-3×1016 atoms/cm3.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: February 11, 2003
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Toshirou Minami, Yumiko Hirano, Kouki Ikeuchi, Takashi Miyahara, Takashi Ishikawa, Osamu Kubota, Akihiko Kobayashi
  • Publication number: 20030024467
    Abstract: A method for reducing the concentration of near-surface bubbles in a quartz crucible suitable for growing monocrystalline silicon ingots by the Czochralski method is provided. The method comprises etching the inner surface of the crucible, preferably with an acidic solution, to substantially eliminate or reduce the concentration of near-surface bubbles from the inner surface of the crucible.
    Type: Application
    Filed: August 2, 2002
    Publication date: February 6, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Richard J. Phillips, Steven J. Keltner, John D. Holder
  • Publication number: 20020189528
    Abstract: The present invention relates to a process for the treatment of Czochralski single crystal silicon wafers to dissolve existing oxygen clusters and precipitates, while preventing their formation upon a subsequent oxygen precipitation heat treatment. The process comprises (i) heat-treating the wafer in a rapid thermal annealer at a temperature of at least 1150° C. in an atmosphere having an oxygen concentration of at least 1000 ppma, or alternatively (ii) heat-treating the wafer in a rapid thermal annealer at a temperature of at least about 1150° C. and then controlling the rate of cooling from the maximum temperature achieved during the heat-treatment through a temperature range in which vacancies are relatively mobile in order to reduce the number density of vacancies in the single crystal silicon to a value such that oxygen precipitates will not form if the wafer is subsequently subjected to an oxygen precipitation heat-treatment.
    Type: Application
    Filed: August 13, 2002
    Publication date: December 19, 2002
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Publication number: 20020179003
    Abstract: The present invention relates to a method for producing a silicon single crystal pulled while doping with carbon and nitrogen and controlling to have an N-region over an entire plane of the crystal, and a silicon wafer doped with carbon and nitrogen and having an N-region over an entire plane. From this develops a growth technique of a silicon single crystal possible to grow a single crystal having few grown-in defects and high IG ability at a high growing rate, and there are provided a silicon wafer having an N-region over an entire plane of the crystal and high IG ability, an epitaxial wafer and an annealed wafer having excellent crystallinity and IG ability.
    Type: Application
    Filed: December 12, 2001
    Publication date: December 5, 2002
    Inventors: Makoto Iida, Masanori Kimura
  • Patent number: 6482260
    Abstract: There is disclosed a method for producing a silicon single crystal in accordance with the Czochralski method wherein a crystal is pulled with controlling a temperature in a furnace so that &Dgr;G may be 0 or a negative value, where &Dgr;G is a difference between the temperature gradient Gc (°C./mm) at the center of a crystal and the temperature gradient Ge (°C./mm) at the circumferential portion of the crystal, namely &Dgr;G=(Ge−Gc), wherein G is a temperature gradient in the vicinity of a solid-liquid interface of a crystal from the melting point of silicon to 1400° C.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: November 19, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masahiro Sakurada, Hideki Yamanaka, Tomohiko Ohta
  • Patent number: 6478883
    Abstract: A silicon wafer for epitaxial growth consisting of a highly boron-doped silicon single crystal wafer, an antimony-doped silicon single crystal wafer or a phosphorus-doped silicon single crystal wafer, which allows easy oxygen precipitation and exhibits high gettering ability in spite of its suppressed oxygen concentration, and an epitaxial silicon wafer in which an epitaxial layer grown by using the aforementioned wafer as a substrate wafer has an extremely low heavy metal impurity concentration are produced with high productivity and supplied. The present invention relates to a boron-doped silicon single crystal wafer having a resistivity of from 10 m&OHgr;·cm to 100 m&OHgr;·cm, an antimony-doped silicon single crystal wafer, or a phosphorus-doped silicon single crystal wafer, which are produced by slicing a silicon single crystal ingot grown by the Czochralski method with nitrogen doping.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: November 12, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masaro Tamatsuka, Ken Aihara, Katsuhiko Miki, Hiroshi Takeno, Yoshinori Hayamizu