Comprising A Semiconductor With A Charge Carrier Impurity Patents (Class 117/21)
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Patent number: 10443148Abstract: A method of growing a doped monocrystalline ingot using a crystal growing system is provided. The crystal growing system includes a growth chamber, a dopant feeding device, and a feed tube. The method includes preparing a melt of semiconductor or solar-grade material in a crucible disposed within the growth chamber, introducing a solid dopant into the feed tube with the dopant feeding device, melting the solid dopant within the feed tube to a form a liquid dopant, introducing the liquid dopant into the melt below a surface of the melt, and growing a monocrystalline ingot from the melt by contacting the melt with a seed crystal and pulling the seed crystal away from the melt.Type: GrantFiled: March 10, 2016Date of Patent: October 15, 2019Assignee: GlobalWafers Co., Ltd.Inventors: Stephan Haringer, Marco D'Angella, Mauro Diodà
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Patent number: 10415151Abstract: An apparatus for controlling heat flow within a melt. The apparatus may include a crucible configured to contain the melt where the melt has an exposed surface. The apparatus may also include a heater disposed below a first side of the crucible and configured to supply heat through the melt to the exposed surface, and a heat diffusion barrier assembly comprising at least one heat diffusion barrier disposed within the crucible and defining an isolation region in the melt and an outer region in the melt.Type: GrantFiled: March 27, 2014Date of Patent: September 17, 2019Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INCInventors: Peter L. Kellerman, Frederick M. Carlson, David Morrell, Ala Moradian, Nandish Desai
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Patent number: 10269896Abstract: A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. At least one of proton irradiation and annealing parameters are adjusted based on the measured electric characteristic. The semiconductor wafer is irradiated with protons and annealed based on the at least one of the adjusted proton irradiation and annealing parameters. Laser beam irradiation parameters are adjusted with respect to different positions on the semiconductor wafer based on the measured electric characteristic. The semiconductor wafer is irradiated with a photon beam at the different positions on the wafer based on the photon beam irradiation parameters.Type: GrantFiled: May 5, 2017Date of Patent: April 23, 2019Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Hans Weber, Wolfgang Jantscher, Hans-Joachim Schulze
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Patent number: 10060045Abstract: A method of growing a monocrystalline silicon ingot is described. The method includes the steps of providing a monocrystalline ingot growing apparatus including a chamber having an internal pressure, and a crucible disposed within the chamber, preparing a silicon melt in the crucible, introducing an inert gas into the chamber from a gas inlet above the silicon melt, wherein the inert gas flows over the surface of the silicon melt and has a flow rate, introducing a volatile dopant including indium into the silicon melt, growing an indium-doped monocrystalline silicon ingot, and controlling the indium dopant concentration in the ingot by adjusting the ratio of the inert gas flow rate and the internal pressure of the chamber.Type: GrantFiled: December 27, 2013Date of Patent: August 28, 2018Assignee: Corner Star LimitedInventors: Roberto Scala, Luigi Bonanno, Stephan Haringer, Armando Giannattasio, Valentino Moser, Jesse Samsonov Appel, Martin Jeffrey Binns
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Patent number: 10023973Abstract: A dopant feeding device for releasing dopant into a feeder system during doping of a crystal growing system includes a dopant container for holding the dopant, a lower valve, and an upper valve. The dopant container includes a wall defining a lower opening for releasing the dopant therethrough. The lower valve is positioned adjacent to the lower opening and is movable between a closed position that is in contact with the wall to prevent passage of dopant through the lower opening and an open position that is spaced from the lower opening to allow passage of dopant therethrough. The upper valve is positioned above and connected to the lower valve. The upper valve is disposed within the dopant container and is movable between a first position that is spaced from the dopant container and a second position that is in contact with the dopant container.Type: GrantFiled: June 7, 2013Date of Patent: July 17, 2018Assignee: MEMC Electronic Materials S.P.A.Inventors: Gianni Dell'Amico, Ugo Delpero, Mauro Diodà, Stephan Haringer
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Patent number: 9951439Abstract: In the present invention, a crucible formed of SiC as a main component is used as a container for a Si—C solution. A metal element M (M is at least one metal element selected from at least one of a first group consisting of La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho and Lu, a second group consisting of Ti, V, Cr, Mn, Fe, Co, Ni and Cu and a third group consisting of Al, Ga, Ge, Sn, Pb and Zn) is added to the Si—C solution and the crucible is heated to elute Si and C, which are derived from a main component SiC of the crucible, from a high-temperature surface region of the crucible in contact with the Si—C solution, into the Si—C solution. In this way, precipitation of a SiC polycrystal on a surface of the crucible in contact with the Si—C solution is suppressed.Type: GrantFiled: December 3, 2014Date of Patent: April 24, 2018Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Naofumi Shinya, Yu Hamaguchi, Norio Yamagata, Takehisa Minowa
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Patent number: 9528195Abstract: Provided is an apparatus for manufacturing a semiconductor or metal oxide ingot by sequentially inducing a liquid-to-solid phase transition of a liquid raw material following a solidification direction, the apparatus including: a crucible containing a semiconductor or metal oxide raw material; a cooling unit spaced apart from the crucible at a predetermined distance in a vertical direction, when a height direction of the crucible is designated by the vertical direction and a direction perpendicular to the vertical direction is designated by a horizontal direction; a first heating unit spaced apart from the crucible at a predetermined distance in the horizontal direction and surrounding a circumferential surface of the crucible; and an insulating member provided between the crucible and the cooling unit in the horizontal direction, a position of the insulating member being shifted by a shifting unit.Type: GrantFiled: August 17, 2012Date of Patent: December 27, 2016Assignee: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGYInventors: Sang Jin Moon, Won Wook So, Dong Soon Park, Myung Hoi Koo
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Patent number: 9327987Abstract: The invention describes a process for removing nonmetallic impurities from metallurgical silicon. A melt is produced from metallurgical silicon and halide-containing silicon. As a result, the impurities are sublimed out and removed from the melt in the form of nonmetal halides. Compared with the known process, in which gaseous halogen is blown through an Si melt, the novel process can be carried out in a particularly simple and efficient manner.Type: GrantFiled: July 29, 2009Date of Patent: May 3, 2016Assignee: SPAWNT PRIVATE S.A.R.L.Inventors: Seyed-Javad Mohsseni-Ala, Christian Bauch, Rumen Deltschew, Thoralf Gebel, Gerd Lippold, Matthias Heuer
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Patent number: 9082976Abstract: Provided is a piezoelectric ceramics that can achieve both high piezoelectric performance and a high Curie temperature. Also provided are a piezoelectric element, a liquid discharge head, an ultrasonic motor, and a dust removing device, which use the piezoelectric ceramics. The piezoelectric ceramics include a perovskite-type metal oxide expressed by a general formula (1): xBaTiO3-yBiFeO3-zBi(M0.5Ti0.5)O3, where M represents at least one type of element selected from the group consisting of Mg and Ni, x satisfies 0.40?x?0.80, y satisfies 0?y?0.30, z satisfies 0.05?z?0.60, and x+y+z=1 is satisfied, and are oriented in a (111) plane in a pseudocubic expression.Type: GrantFiled: August 30, 2012Date of Patent: July 14, 2015Assignees: Canon Kabushiki Kaisha, University of YamanashiInventors: Makoto Kubota, Takayuki Watanabe, Hisato Yabuta, Jumpei Hayashi, Nobuhiro Kumada, Satoshi Wada
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Publication number: 20150044467Abstract: Provided is a method of growing an ingot. The method of growing the ingot includes melting a silicon to prepare a silicon melt solution, preparing a seed crystal having a crystal orientation [110], growing a neck part from the seed crystal, and growing an ingot having the crystal orientation [110] from the neck part. The neck part has a diameter of about 4 mm to about 8 mm.Type: ApplicationFiled: November 30, 2011Publication date: February 12, 2015Inventors: Hwajin Jo, Sanghee Kim, Youngho Jung, Namseok Kim
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Publication number: 20150020729Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. A common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, including increased material strength and improved electrical properties. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells.Type: ApplicationFiled: June 23, 2014Publication date: January 22, 2015Inventors: Fritz G. Kirscht, Matthias Heuer, Martin Kaes, Kamel Ounadjela
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Patent number: 8927376Abstract: A method for forming epitaxial layer is disclosed. The method includes the steps of providing a semiconductor substrate, and forming an undoped first epitaxial layer in the semiconductor substrate. Preferably, the semiconductor substrate includes at least a recess, the undoped first epitaxial layer has a lattice constant, a bottom thickness, and a side thickness, in which the lattice constant is different from a lattice constant of the semiconductor substrate and the bottom thickness is substantially larger than or equal to the side thickness.Type: GrantFiled: April 24, 2014Date of Patent: January 6, 2015Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Teng-Chun Hsuan, Chin-Cheng Chien
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Patent number: 8920561Abstract: A silicon single crystal pull-up apparatus includes a pull-up furnace, a sample chamber in which a sublimable dopant is housed, a sample tube which can be raised and lowered between the interior of the sample chamber and the interior of the pull-up furnace, a raising and lowering means for raising and lowering the sample tube, a supply pipe which is installed inside the pull-up furnace and supplies the sublimable dopant to a melt, and a connection means for connecting the sample tube and the supply pipe. The connection means is constructed from a ball joint structure comprising a convex member which projects from one end of the sample tube and a concave member which is provided at one end of the supply pipe and is formed to be engageable with the convex member. The contact surfaces of the convex member and the concave member are formed to be curved surfaces.Type: GrantFiled: July 28, 2009Date of Patent: December 30, 2014Assignee: Sumco Techxiv CorporationInventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Toshimichi Kubota, Tomohiro Fukuda
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Patent number: 8872307Abstract: Silicon wafers having a resistivity >6 ?cm and axially uniform resistivity are grown by the Czochralski method from a melt containing boron as the main dopant, an n-type first sub-dopant with a segregation coefficient lower than boron, and a p-type second sub-dopant with a segregation coefficient lower than the first sub-dopant.Type: GrantFiled: September 12, 2012Date of Patent: October 28, 2014Assignee: Siltronic AGInventor: Katsuhiko Nakai
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Patent number: 8840721Abstract: The present invention provides a method of producing low-resistivity silicon single crystal containing a dopant at a relatively high concentration by adding a large amount of the dopant to silicon melt when the silicon single crystal is pulled up, with suppressing occurrence of dislocation in the crystal. Specifically, the present invention provides a method of manufacturing silicon single crystal by bringing silicon seed crystal into contact with silicon melt and pulling up the silicon seed crystal while rotating the crystal to grow silicon single crystal whose straight body section has a diameter of ? mm below the silicon seed crystal, the method comprising: the dopant-adding step of adding a dopant to the silicon melt during growth of the straight body section of the silicon single crystal, while rotating the silicon single crystal at a rotational speed of ? rpm (where ??24?(?/25)).Type: GrantFiled: November 11, 2010Date of Patent: September 23, 2014Assignee: Sumco Techxiv CorporationInventors: Yasuhito Narushima, Fukuo Ogawa, Toshimichi Kubota
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Patent number: 8758507Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. A common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, including increased material strength and improved electrical properties. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells.Type: GrantFiled: November 24, 2010Date of Patent: June 24, 2014Assignee: Silicor Materials Inc.Inventors: Fritz G. Kirscht, Matthias Heuer, Martin Kaes, Kamel Ounadjela
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Patent number: 8754448Abstract: A semiconductor device includes a semiconductor substrate and a plurality of transistors. The semiconductor substrate includes at least an iso region (namely an open region) and at least a dense region. The transistors are disposed in the iso region and the dense region respectively. Each transistor includes at least a source/drain region. The source/drain region includes a first epitaxial layer having a bottom thickness and a side thickness, and the bottom thickness is substantially larger than or equal to the side thickness.Type: GrantFiled: November 1, 2011Date of Patent: June 17, 2014Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Teng-Chun Hsuan, Chin-Cheng Chien
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Patent number: 8747551Abstract: After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method, where a phosphorus concentration [P]L(atoms/cm3) in the silicon melt, a Ge concentration in the silicon monocrystal, an average temperature gradient Gave (K/mm) and a pull speed V (mm/min) are controlled to satisfy a formula (1) as follows, a phosphorus concentration [P](atoms/cm3) and the Ge concentration [Ge](atoms/cm3) in the silicon monocrystal satisfy a relationship according to a formula (2) as follows while growing the silicon monocrystal, where dSi(?) represents a lattice constant of silicon, rSi(?) represents a covalent radius of silicon, rP(?) represents a covalent radius of phosphorus, and rGe(?) represents a covalent radius of Ge: [ P ] L + ( 0.3151 × [ Ge ] + 3.806 × 10 18 ) / 1.5 < 0.Type: GrantFiled: September 26, 2013Date of Patent: June 10, 2014Assignee: Sumco Techxiv CorporationInventors: Shinichi Kawazoe, Yasuhito Narushima, Toshimichi Kubota, Fukuo Ogawa
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Patent number: 8715416Abstract: A doping device includes a first dopant accommodating portion including an opening on an upper portion to accommodate a first dopant that is evaporated near a surface of a semiconductor melt; a second dopant accommodating portion including a dopant holder that holds a second dopant that is liquefied near the surface of the semiconductor melt while including a communicating hole for delivering the liquefied dopant downwardly, and a conduit tube provided on a lower portion of the dopant holder for delivering the liquefied dopant flowed from the communicating hole to the surface of the semiconductor melt; and a guide provided by a cylinder body of which a lower end is opened and an upper end is closed for guiding dopant gas generated by evaporation of the first dopant to the surface of the semiconductor melt.Type: GrantFiled: May 23, 2008Date of Patent: May 6, 2014Assignee: Sumco Techxiv CorporationInventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Toshimichi Kubota
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Publication number: 20140109824Abstract: Disclosed is a method of growing a silicon single crystal. The method includes preparing a silicon melt, adding a dopant having a lower melting point than the silicon melt to the silicon melt, and growing a silicon single crystal from the silicon melt to which the dopant is added in the order of a neck, a shoulder, and a body. During the silicon single crystal growth, the length of a neck is adjusted in the range of 35 to 45 cm, and a ratio of inert gas quantity to pressure of a chamber is adjusted to 1.5 or less.Type: ApplicationFiled: November 16, 2012Publication date: April 24, 2014Inventors: Jung Ha Hwang, Sang Hee Kim
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Patent number: 8696810Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: October 18, 2012Date of Patent: April 15, 2014Assignee: 1366 Technologies, Inc.Inventors: Eerik T. Hantsoo, G. D. Stephen Hudelson, Ralf Jonczyk, Adam M. Lorenz, Emanuel M. Sachs, Richard L. Wallace
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Patent number: 8647432Abstract: A method for making a large surface area silicon filament for production of bulk polysilicon by chemical vapor deposition (CVD) includes melting silicon and growing the filament from the melted silicon by an EFG method using a shaping die. The cross sectional shape of the silicon filament is constant over its axial length to within a tolerance of 10%. In embodiments, a plurality of identical and/or dissimilar filaments are grown simultaneously using a plurality of shaping dies. The filaments can be tubular. Filament cross sections can be annular and/or can include outwardly extending fins, with wall and/or fin thicknesses constant to within 10%. Filaments can be doped with at least one element from groups 3 and 5 of the Periodic Table. The filament can have a length equal to a length of a specified slim rod filament, and a total impedance not greater than the slim rod impedance.Type: GrantFiled: July 20, 2011Date of Patent: February 11, 2014Assignee: GTAT CorporationInventors: Yuepeng Wan, Santhana Raghavan Parthasarathy, Carl Chartier, Adrian Servini, Chandra P Khattak
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Patent number: 8642154Abstract: A silicon carbide crystal ingot having a surface greater than or equal to 4 inches, having an n-type dopant concentration greater than or equal to 1×1015 atoms/cm3 and less than or equal to 1×1020 atoms/cm3, a metal atom concentration greater than or equal to 1×1014 atoms/cm3 and less than or equal to 1×1018 atoms/cm3, and not exceeding the n-type dopant concentration, and a metal atom concentration gradient less than or equal to 1×1017 atoms/(cm3·mm), a silicon carbide single crystal wafer produced using the ingot, and a method for fabricating the silicon carbide crystal ingot.Type: GrantFiled: May 18, 2012Date of Patent: February 4, 2014Assignee: Sumitomo Electric Insustries, Ltd.Inventors: Tsutomu Hori, Makoto Sasaki, Taro Nishiguchi, Shinsuke Fujiwara
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Patent number: 8641820Abstract: An implementation of a Czochralski-type crystal growth has been shown and embodied. More particularly, a furnace with suitable insulation and flow arrangement is shown to improve the cost-efficiency of production of crystals. That is achieved by the shown new hot-zone structure, gas flows and the growth process which can decrease the power consumption, increase the lifetime of hot-zone parts and improve the productivity, e.g., by giving means for opening the hot-zone and easily adapting the hot-zone to a new crystal diameter.Type: GrantFiled: March 9, 2012Date of Patent: February 4, 2014Assignee: Okmetic OyjInventors: Olli Anttila, Ari Saarnikko, Jari Paloheimo
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Publication number: 20140020617Abstract: After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method, where a phosphorus concentration [P]L(atoms/cm3) in the silicon melt, a Ge concentration in the silicon monocrystal, an average temperature gradient Gave (K/mm) and a pull speed V (mm/min) are controlled to satisfy a formula (1) as follows, a phosphorus concentration [P](atoms/cm3) and the Ge concentration [Ge](atoms/cm3) in the silicon monocrystal satisfy a relationship according to a formula (2) as follows while growing the silicon monocrystal, where dSi(?) represents a lattice constant of silicon, rSi(?) represents a covalent radius of silicon, rP(?) represents a covalent radius of phosphorus, and rGe(?) represents a covalent radius of Ge: [ P ] L + ( 0.3151 × [ Ge ] + 3.806 × 10 18 ) / 1.5 < 0.Type: ApplicationFiled: September 26, 2013Publication date: January 23, 2014Applicant: SUMCO TECHXIV CORPORATIONInventors: Shinichi KAWAZOE, Yasuhito NARUSHIMA, Toshimichi KUBOTA, Fukuo OGAWA
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Publication number: 20140015108Abstract: A method of manufacturing a single crystal ingot, and a single crystal ingot and a wafer manufactured thereby are provided. The method of manufacturing a single crystal ingot according to an embodiment includes forming a silicon melt in a crucible inside a chamber, preparing a seed crystal on the silicon melt, and growing a single crystal ingot from the silicon melt, and pressure of the chamber may be controlled in a range of 90 Torr to 500 Torr.Type: ApplicationFiled: March 20, 2012Publication date: January 16, 2014Inventors: Sang-Hee Kim, Jung-Ha Hwang, Young-Kyu Choi, Bok-Cheol Sim
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Patent number: 8574363Abstract: After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method, where a phosphorus concentration [P]L (atoms/cm3) in the silicon melt, a Ge concentration in the silicon monocrystal, an average temperature gradient Gave (K/mm) and a pull speed V (mm/min) are controlled to satisfy a formula (1) as follows, the phosphorus concentration [P] (atoms/cm3) in the silicon monocrystal is 4.84×1019 atoms/cm3 or more and 8.49×1019 atoms/cm3 or less, and the phosphorus concentration [P] (atoms/cm3) and the Ge concentration [Ge] (atoms/cm3) in the silicon monocrystal satisfy a relationship according to a formula (2) as follows while growing the silicon monocrystal. [P]L+(0.3151×[Ge]+3.806×1019)/1.5<0.5×(Gave/V+43)×1019??(1) [Ge]?6.95×[P]+5.90×1020??(2).Type: GrantFiled: May 23, 2008Date of Patent: November 5, 2013Assignee: Sumco Techxiv CorporationInventors: Shinichi Kawazoe, Yasuhito Narushima, Toshimichi Kubota, Fukuo Ogawa
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Patent number: 8551246Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.Type: GrantFiled: May 7, 2009Date of Patent: October 8, 2013Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Fumio Tahara, Tsuyoshi Ohtsuki, Takatoshi Nagoya, Kiyoshi Mitani
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Patent number: 8547121Abstract: A quality control process for determining the concentrations of boron and phosphorous in a UMG-Si feedstock batch is provided. A silicon test ingot is formed by the directional solidification of molten UMG-Si from a UMG-Si feedstock batch. The resistivity of the silicon test ingot is measured from top to bottom. Then, the resistivity profile of the silicon test ingot is mapped. From the resistivity profile of the silicon test ingot, the concentrations of boron and phosphorous of the UMG-Si silicon feedstock batch are calculated. Additionally, multiple test ingots may be grown simultaneously, with each test ingot corresponding to a UMG-Si feedstock batch, in a multi-crucible crystal grower.Type: GrantFiled: April 29, 2010Date of Patent: October 1, 2013Assignee: Silicor Materials Inc.Inventors: Kamel Ounadjela, Marcin Walerysiak, Anis Jouini, Matthias Heuer, Omar Sidelkheir, Alain Blosse, Fritz Kirscht
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Patent number: 8518180Abstract: A silicon single crystal pull-up apparatus is used to pull up a doped silicon single crystal from a melt by means of the Czochralski process and includes a pull-up furnace, a sample chamber which is externally mounted on the pull-up furnace and houses a sublimable dopant, a shielding means for thermally isolating the interior of the pull-up furnace and the interior of the sample chamber, a sample tube which can be raised and lowered between the interior of the sample chamber and the interior of the pull-up furnace, and a raising and lowering means which is provided with guide rails on which the sample tube can slide and a wire mechanism by which the sample tube is raised and lowered along the guide rails.Type: GrantFiled: July 28, 2009Date of Patent: August 27, 2013Assignee: Sumco Techxiv CorporationInventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Toshimichi Kubota, Tomohiro Fukuda
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Patent number: 8496752Abstract: During a CZ or similar process, a silica crucible is held in a graphite or similar susceptor while being heated to above between about 1580 and 1620 degrees C. Vents or grooves formed in at least one of the outer surface of the crucible and the inner surface of the susceptor permit gasses to vent upwardly and out from between the crucible and susceptor. This permits gas evolved from the crucible as a result of the heat to be vented rather than expanding between the crucible and susceptor thereby deforming the crucible.Type: GrantFiled: September 2, 2009Date of Patent: July 30, 2013Assignee: Heraeus Shin-Etsu America, Inc.Inventors: Katsuhiko Kemmochi, Robert Joseph Coolich, Michael Randall Fallows
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Patent number: 8480803Abstract: A method of making an article of a semiconducting material involves withdrawing from a melt of molten semiconducting material a solid mold having already formed on an external surface of the mold a solid layer of the semiconducting material. During the act of withdrawal, one or more of a temperature, a force, and a relative rate of withdrawal are controlled in order to achieve one or more desired attributes in a solid overlayer of semiconductor material that is formed over the solid layer during the withdrawal.Type: GrantFiled: October 30, 2009Date of Patent: July 9, 2013Assignee: Corning IncorporatedInventors: Glen Bennett Cook, Prantik Mazumder, Balram Suman, Christopher Scott Thomas
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Patent number: 8475590Abstract: An apparatus and method for producing a crystalline ribbon continuously from a melt pool of liquid feed material, e.g. silicon. The silicon is melted and flowed into a growth tray to provide a melt pool of liquid silicon. Heat is passively extracted by allowing heat to flow from the melt pool up through a chimney. Heat is simultaneously applied to the growth tray to keep the silicon in its liquid phase while heat loss is occurring through the chimney. A template is placed in contact with the melt pool as heat is lost through the chimney so that the silicon starts to “freeze” (i.e. solidify) and adheres to the template. The template is then pulled from the melt pool thereby producing a continuous ribbon of crystalline silicon.Type: GrantFiled: May 23, 2012Date of Patent: July 2, 2013Assignee: AMG Idealcast Solar CorporationInventor: Roger F. Clark
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Publication number: 20130113011Abstract: A method of manufacturing a down-conversion substrate for use in a light system includes forming a first crystallography layer including one or more phosphor materials and, optionally, applying at least one activator to the crystallography layer, heating the crystallography layer at high temperature to promote crystal growth in the crystallography layer, and drawing out the crystallography layer and allowing the crystallography layer to cool to form the down-conversion substrate. A light system includes an excitation source for emitting short wavelength primary emissions; and a down-conversion substrate disposed in the path of at least some of the primary emissions from the excitation source to convert at least a portion of the primary emissions into longer-wavelength secondary emissions, wherein the substrate includes one or more crystallography layers, wherein each crystallography layer includes one or more phosphor materials, and optionally at least one activator.Type: ApplicationFiled: July 19, 2011Publication date: May 9, 2013Inventor: Partha S. Dutta
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Publication number: 20130093058Abstract: Silicon wafers having a resistivity >6 ?cm and axially uniform resistivity are grown by the Czochralski method from a melt containing boron as the main dopant, an n-type first sub-dopant with a segregation coefficient lower than boron, and a p-type second sub-dopant with a segregation coefficient lower than the first sub-dopant.Type: ApplicationFiled: September 12, 2012Publication date: April 18, 2013Applicant: SILTRONIC AGInventor: Katsuhiko Nakai
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Patent number: 8414701Abstract: In this method for manufacturing a silicon single crystal, when growing the silicon single crystal, in order to control the V/G value with high accuracy so as to yield a desired defect-free region, it is important to conduct the pulling at a constant pulling rate. In the method for pulling a silicon single crystal in the present invention, in order to control the V/G value with high accuracy, the distance ?t between the melt surface of the silicon melt and the heat shielding member that is disposed so as to oppose to and to partially cover this melt surface is continuously measured while pulling (growing) the silicon single crystal.Type: GrantFiled: January 7, 2010Date of Patent: April 9, 2013Assignee: Sumco CorporationInventor: Keiichi Takanashi
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Patent number: 8409347Abstract: In a dopant-injecting method for injecting a volatile dopant into a semiconductor melt, a doping device having an accommodating portion for accommodating a solid dopant and a cylindrical portion into which a gas ejected from the accommodating portion is introduced, a lower end surface of the cylindrical portion being opened to guide the gas to the melt, is used. The sublimation rate of the dopant in the accommodating portion is set in a range from 10 g/min to 50 g/min. Since a flow volume of the volatilized dopant gas is controlled by setting the sublimation rate of the dopant gas in the accommodating portion in the range from 10 g/min to 50 g/min, the melt is not blown off when the gas is blown onto the melt.Type: GrantFiled: July 20, 2007Date of Patent: April 2, 2013Assignee: Sumco TechXIV CorporationInventors: Shinichi Kawazoe, Yasuhito Narushima, Toshimichi Kubota
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Patent number: 8382894Abstract: Silicon wafers wherein slip dislocations and warpages during device production are suppressed, contain BMDs with an octahedral shape, and of BMDs at a depth greater than 50 ?m from the surface of the wafer, the density of BMDs with diagonal size of 10 nm to 50 nm is ?1×1012/cm3, and the density of BSFs is ?1×108/cm3. The present silicon wafers preferably have an interstitial oxygen concentration of 4×1017 atoms/cm3 to 6×1017 atoms/cm3, and a density of BMDs with diagonal size of ?200 nm of not more than 1×107/cm3.Type: GrantFiled: October 26, 2009Date of Patent: February 26, 2013Assignee: Siltronic AGInventors: Katsuhiko Nakai, Masayuki Fukuda
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Patent number: 8377203Abstract: An oxide single crystal having a composition represented by RExSi6O1.5x+12 (RE: La, Ce, Pr, Nd, or Sm, x: 8 to 10) is grown by using the Czochralski method such that the crystal growth orientation coincides with the c-axis direction. The solidification rate (the weight of the grown crystal÷the weight of the charged raw material) in the crystal growth is less than 45%.Type: GrantFiled: April 27, 2006Date of Patent: February 19, 2013Assignee: Honda Motor Co., Ltd.Inventors: Katsuaki Takahashi, Keisuke Mochizuki, Shuichi Kawaminami, Yoshikatsu Higuchi, Masayuki Sugawara, Susumu Nakayama
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Patent number: 8328932Abstract: A ribbon crystal pulling furnace has an interior for enclosing at least a portion of one or more ribbon crystals, and an afterheater positioned within the interior. The afterheater has at least one wall with one or more openings that facilitate control of the temperature profile within the furnace.Type: GrantFiled: June 13, 2008Date of Patent: December 11, 2012Assignee: Evergreen Solar, IncInventors: Weidong Huang, David Harvey, Scott Reitsma
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Publication number: 20120279437Abstract: The present invention relates to a method of growing a silicon ingot comprising a dopant material having a segregation coefficient of k, wherein the concentration of the dopant is axially substantially uniform throughout the ingot. The method comprises the steps of providing a crucible having an inner growth zone in fluid communication with an outer feed zone, and the inner growth zone and the outer feed zone have cross-sectional areas that are can be used to determine conditions for maintaining dopant uniformity for the specific dopant material used. A crystalline growth system for growing at least one uniformly doped silicon ingot is also disclosed.Type: ApplicationFiled: May 4, 2012Publication date: November 8, 2012Applicant: GT Advanced CZ, LLCInventor: Bayard K. Johnson
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Patent number: 8246744Abstract: By specifying an initial oxygen concentration in a silicon single crystal and a concentration of thermal donors produced according to a thermal history from 400° C. to 550° C. that the silicon single crystal undergoes during crystal growth, a nucleation rate of oxygen precipitates produced in the silicon single crystal while the silicon single crystal is subjected to a heat treatment is determined. Further, by specifying the heat treatment condition of the silicon single crystal, an oxygen precipitate density and an amount of precipitated oxygen under a given heat treatment condition are predicted by calculation.Type: GrantFiled: January 27, 2005Date of Patent: August 21, 2012Assignee: Komatsu Denshi Kinzoku Kabushiki KaishaInventors: Kozo Nakamura, Junsuke Tomioka, Tetsuro Akagi, Shiro Yoshino
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Patent number: 8236104Abstract: A single-crystal manufacturing apparatus comprising at least: a main chamber configured to accommodate a crucible; a pulling chamber continuously provided above the main chamber, the pulling chamber into which a grown single crystal is pulled and accommodated; a gas inlet provided in the pulling chamber; a gas flow-guide cylinder downwardly extending from a ceiling of the main chamber; and a heat-insulating ring upwardly extending from a lower end portion of the gas flow-guide cylinder with a diameter of the heat-insulating ring increased so as to surround an outside of the gas flow-guide cylinder, wherein at least one window is provided in a region between 50 and 200 mm from a lower end of the gas flow-guide cylinder, and an opening area of the window accounts for 50% or more of a surface area of the region between 50 and 200 mm from the lower end of the gas flow-guide cylinder.Type: GrantFiled: May 8, 2009Date of Patent: August 7, 2012Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Satoshi Soeta, Toshifumi Fujii
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Patent number: 8231725Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.Type: GrantFiled: September 6, 2011Date of Patent: July 31, 2012Assignee: Siltronic AGInventors: Andreas Sattler, Wilfried von Ammon, Martin Weber, Walter Haeckl, Herbert Schmidt
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Patent number: 8216362Abstract: Processes for preparing a single crystal silicon ingot are disclosed. In certain embodiments, the processes involve controlling (1) a growth velocity, v, of the ingot as well as (2) an average axial temperature gradient, G, a corrected average axial temperature gradient, Gcorrected, or an effective average axial temperature gradient, Geffective, during the growth of at least a segment of the constant diameter portion of the ingot.Type: GrantFiled: May 18, 2007Date of Patent: July 10, 2012Assignee: MEMC Electronic Materials, Inc.Inventor: Milind S. Kulkarni
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Patent number: 8197595Abstract: A method for producing thin silicon rods using a floating zone crystallization process includes supplying high frequency (HF) current to a flat induction coil having a central opening, a plurality of draw openings and a plate with a slot as a current supply of the HF current so as to provide a circumfluent current to the central opening. An upper end of a raw silicon rod is heated by induction using the flat induction coil so as to form a melt pool. A thin silicon rod is drawn upwards through each of the plurality of draw openings in the flat induction coil from the melt pool without drawing a thin silicon rod through the central opening having the circumfluent current.Type: GrantFiled: January 19, 2010Date of Patent: June 12, 2012Assignee: PV Silicon Forschungs und Produktions GmbHInventors: Helge Riemann, Friedrich-Wilhelm Schulze, Joerg Fischer, Matthias Renner
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Patent number: 8177910Abstract: To reduce the heat input to the bottom of the crucible and to control heat extraction independently of heat input, a shield can be raised between a heating element and a crucible at a controlled speed as the crystal grows. Other steps could include moving the crucible, but this process can avoid having to move the crucible. A temperature gradient is produced by shielding only a portion of the heating element; for example, the bottom portion of a cylindrical element can be shielded to cause heat transfer to be less in the bottom of the crucible than at the top, thereby causing a stabilizing temperature gradient in the crucible.Type: GrantFiled: March 1, 2011Date of Patent: May 15, 2012Assignee: GT Crystal Systems, LLCInventors: Frederick Schmid, Chandra P. Khattak, David B. Joyce
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Publication number: 20120056135Abstract: A doped silicon single crystal having a resistivity variation along a longitudinal and/or radial axis of less than 10% and a method of preparing one or a sequential series of doped silicon crystals is disclosed. The method includes providing a melt material comprising silicon into a continuous Czochralski crystal growth apparatus, delivering a dopant, such as gallium, indium, or aluminum, to the melt material, providing a seed crystal into the melt material when the melt material is in molten form, and growing a doped silicon single crystal by withdrawing the seed crystal from the melt material. Additional melt material is provided to the apparatus during the growing step. A doping model for calculating the amount of dopant to be delivered into the melt material during one or more doping events, methods for delivering the dopant, and vessels and containers used to deliver the dopant are also disclosed.Type: ApplicationFiled: September 1, 2011Publication date: March 8, 2012Inventors: John P. DeLuca, Frank S. Delk, II, Bayard K. Johnson, William L. Luter, Neil D. Middendorf, Dick S. Williams, Nels Patrick Ostrom, James N. Highfill
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Patent number: 8110042Abstract: Using a pulling-up apparatus, an oxygen concentration of the monocrystal at a predetermined position in a pulling-up direction is controlled based on a relationship in which the oxygen concentration of the monocrystal is decreased as a flow rate of the inactive gas at a position directly above a free surface of the dopant-added melt is increased when the monocrystal is manufactured with a gas flow volume in the chamber being in the range of 40 L/min to 400 L/min and an inner pressure in the chamber being in the range of 5332 Pa to 79980 Pa. Based on the relationship, oxygen concentration is elevated to manufacture the monocrystal having a desirable oxygen concentration. Because the oxygen concentration is controlled under a condition corresponding to a condition where the gas flow rate is rather slow, the difference between a desirable oxygen concentration profile of the monocrystal and an actual oxygen concentration profile is reduced.Type: GrantFiled: May 7, 2008Date of Patent: February 7, 2012Assignee: Sumco Techxiv CorporationInventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Tsuneaki Tomonaga, Yasuyuki Ohta, Toshimichi Kubota, Shinsuke Nishihara
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Patent number: 8105436Abstract: A single crystal silicon wafer for use in the production of insulated gate bipolar transistors is made of single crystal silicon grown by the Czochralski method and has a gate oxide with a film thickness of from 50 to 150 nm. The wafer has an interstitial oxygen concentration of at most 7.0×1017 atoms/cm3, a resistivity variation within the plane of the wafer of at most 5% and, letting tox (cm) be the gate oxide film thickness and S (cm2) be the electrode surface area when determining the TZDB pass ratio, a density d (cm?3) of crystal originated particles (COP) having a size at least twice the gate oxide film thickness which satisfies the formula d??ln(0.9)/(S·tox/2). The wafers have an increased production yield and a small resistivity variation.Type: GrantFiled: September 22, 2008Date of Patent: January 31, 2012Assignee: Sumco CorporationInventor: Shigeru Umeno