With Pretreatment Of Substrate (e.g., Coacting Ablating) Patents (Class 117/90)
  • Patent number: 5438951
    Abstract: A technique of heteroepitaxially growing compound semiconductor on a silicon wafer, which can simplify the growth sequence, and improve the productivity and the surface morphology of a growth film. In growing compound semiconductor on a silicon wafer, the growth sequence such as shown in FIG. 1 is used. A necessary thin buffer layer is continuously grown at the temperature raising period up to the crystal growth temperature. Therefore, an independent process of growing a buffer layer at a lower temperature is not necessary, and the surface morphology is also improved by this method of growing compound semiconductor on a silicon wafer.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: August 8, 1995
    Assignee: Nippon Steel Corporation
    Inventors: Akiyoshi Tachikawa, Aiji Jono, Takashi Aigo, Akihiro Moritani
  • Patent number: 5433168
    Abstract: The present invention relates to a method of producing a semiconductor substrate which is suitable for an electronic device or an integrated circuit in the form of dielectric separation or having a single crystal semiconductor layer formed on an insulator.The method comprises the steps of making a silicon substrate porous, forming a silicon single crystal on the porous substrate and oxidizing the porous silicon substrate to form a semiconductor layer having good crystallinity on an insulating support, particularly a support having light transmission.
    Type: Grant
    Filed: May 14, 1993
    Date of Patent: July 18, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeo Yonehara
  • Patent number: 5432124
    Abstract: There is provide a method of manufacturing a compound semiconductor (MBE) that can make the substrate surface of the semiconductor highly clean and plane so that no impurity may be left between the substrate surface and the grown crystal layer. In the step of cleaning a substrate with MBE, the substrate surface is irradiated with V molecular beams that cannot be significantly deposited out of molecular beams to be used for the crystal growth step, said V molecular beams being irradiated under a condition of P.sub.1 .ltoreq.(P.sub.2 .times.1/2), where P.sub.1 is the pressure of V molecular beams and P.sub.2 is the pressure of molecular beams in the crystal growth step and the temperature of the substrate surface is raised by heating until stabilized group III surfaces appear on the substrate surface. A very cleanand smooth substrate surface can be obtained with such an arrangement. Harmful impurities can be completely eliminated from the interface of the substrate and the crystal.
    Type: Grant
    Filed: July 6, 1994
    Date of Patent: July 11, 1995
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Kazuaki Nishikata, Yuji Hiratani, Michinori Irikawa
  • Patent number: 5429069
    Abstract: A method for growing diamond crystals or films by diffusing carbon through one side of a carbon diffusable substrate, such as metal or alloy, and outdiffusing the carbon on opposite side of the substrate is disclosed. The requirements for the metal or the alloy medium are: (1) low solubility of carbon in the medium so that all carbon will not be trapped in the medium; (2) no stable compound is formed between carbon and the medium in the operating temperature region; (3) a proximity to the lattice constant of diamond; and (4) an adequate diffusion rate at the operating temperature to grow the diamond efficiently.
    Type: Grant
    Filed: July 11, 1991
    Date of Patent: July 4, 1995
    Inventors: Pao-Hsien Fang, Welville B. Nowak
  • Patent number: 5427053
    Abstract: A method for making a quasi-single crystal diamond is provided. Small diamond granules, like islands, are epitaxially grown on a single crystal substrate having a lattice constant which is similar to that of diamond. A deposition layer is formed on the island diamond granules. The initial substrate is eliminated. Diamond is grown on the deposition layer having diamond granules to make a diamond film having a certain thickness. The initially-grown diamond granules which have the same crystallographical direction align the direction of crystals of the latter-grown diamond by playing a role of seed crystals.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: June 27, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Tsuno, Naoji Fujimoro
  • Patent number: 5425808
    Abstract: A process for selective formation of a III-V group compound film comprises applying a compound film forming treatment, in a gas phase including a starting material for supplying the group III atoms of Periodic Table and a starting material for supplying the group V atoms of Periodic Table, on a substrate having a non-nucleation surface (S.sub.NDS) with small nucleation density and a nucleation surface (S.sub.NDL) with a larger nucleation density (ND.sub.L) than the nucleation density (ND.sub.S) of said non-nucleation surface (S.sub.NDS) and a large area sufficient for a number of nuclei to be formed, and forming selectively a III-V group compound film only on said nucleation surface (S.sub.NDL).
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: June 20, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Tokunaga, Takao Yonehara
  • Patent number: 5423285
    Abstract: A precursor comprising a metal 2-ethylhexanoate in a xylenes solvent is applied to an integrated circuit wafer. The wafer is baked to dry the precursor, annealed to form a layered superlattice material on the wafer, then the integrated circuit is completed. If the metal is titanium, the precursor comprises titanium 2-methoxyethoxide having at least a portion of its 2-methoxyethoxide ligands replaced by 2-ethylhexanoate. If the metal is a highly electropositive element, the solvent comprises 2-methoxyethanol. If the metal is lead, bismuth, thallium, or antimony, 1% to 75% excess metal is included in the precursor to account for evaporation of the oxide during baking and annealing.
    Type: Grant
    Filed: November 24, 1992
    Date of Patent: June 13, 1995
    Assignees: Olympus Optical Co., Ltd., Symetrix Corporation
    Inventors: Carlos A. Paz de Araujo, Joseph D. Cuchiaro, Michael C. Scott, Larry D. McMillan
  • Patent number: 5423286
    Abstract: A method for forming a crystal comprises applying a crystal growth treatment to a substrate comprising:a non-nucleation surface; anda nucleation surface constituted of an amorphous material with a higher nucleation density than said non-nucleation surface, having a sufficiently small area so as to form only a single nucleus from which a single crystal is grown, and having regular anisotropy.Also a crystal article is formed by said method for forming a crystal.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: June 13, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takao Yonehara
  • Patent number: 5415127
    Abstract: Disclosed herein is a method of forming a single crystal film of sodium-beta"-alumina, comprising the steps of providing a single crystal substrate with one surface being arranged to minimize nucleation sites thereon, at least a portion of the substrate including alumina. A single crystal substrate is then deposited in a chamber, along with a precursor in the chamber. The precursor has a sufficient quantity of sodium species in a vapor phase and at an energy level sufficient to react with the alumina to form sodium-beta"-alumina. The precursor also includes a sufficient quantity of a stabilizing ion with a valence equal to or lower than aluminum to minimize decomposition of sodium-beta"-alumina to sodium-beta-alumina.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: May 16, 1995
    Assignee: Ontario Centre For Materials Research
    Inventors: Patrick S. Nicholson, Aichun Tan, Chu K. Kuo
  • Patent number: 5396862
    Abstract: A compound semiconductor thin film is grown on a compound semiconductor surface, which is cleaned by irradiating the surface with gas containing at least hydrogen molecules and by efficiently removing contaminant on the surface at low temperature. A beam containing at least hydrogen molecules is irradiated from a plasma generating room attached to a MBE chamber, and cleans the surface of a compound semiconductor at low temperature. By an additional mechanism attached to the MBE chamber, a compound semiconductor thin film of high quality is grown on the cleaned surface of the compound semiconductor.
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: March 14, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Okawa, Shigeo Hayashi, Takeshi Karasawa, Tsuneo Mitsuyu
  • Patent number: 5397738
    Abstract: A process of the formation of heteroepitaxy including heating a silicon substrate in gas ambience including one of a hydride of a IIIB group element and an organic substance of a IIIB group element, having the IIIB group element remain on the surface of the silicon substrate, and growing a GaAs film on a surface of the silicon substrate after the heat processing. Particles remaining on an inner wall or the like of a film forming apparatus are prevented from reaching the surface, and a IIIB group element remains on the surface after preprocessing. Such a GaAs film formed on the surface includes less unevenness and crystal defects.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: March 14, 1995
    Assignee: Fujitsu Ltd.
    Inventor: Norimitsu Takagi
  • Patent number: 5388548
    Abstract: A method of fabricating a plurality of optoelectronic components on a semiconductor substrate, each optoelectronic component comprising several layers grown in a reactor. Every layer is being grown under a predetermined individual pressure. The active layers of all the components are lying substantially at the same height. Control of the pressure in the reactor during growth allows the thickness of the layer grown to be constant or to vary over the substrate area.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: February 14, 1995
    Assignee: Interuniversitair Micro-Elektronica VZW
    Inventors: Geert F. M. Coudenys, Piet P. A. R. Demeester
  • Patent number: 5373806
    Abstract: Particles and particle-generated defects during gas phase processing such as during epitaxial deposition are substantially decreased by the process of controlling the various particle transport mechanisms, for example, by applying low level radiant energy during cold purge cycles in barrel reactors.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: December 20, 1994
    Assignee: Applied Materials, Inc.
    Inventor: Roger E. Logar
  • Patent number: 5365877
    Abstract: A method of growing semiconductor in a vapor phase wherein a silicon oxide film on the surface of a semiconductor substrate wafer is removed, and a silicon layer is grown on the surface of the semiconductor substrate wafer in a vapor phase while rapidly rotating the wafer about a shaft substantially vertical to the wafer.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: November 22, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroyasu Kubota
  • Patent number: 5363799
    Abstract: A method for growth of a crystal wherein a monocrystalline seed is arranged on a substrate and a monocrystal is permitted to grow with the seed as the originating point, comprises the step of:(1) providing a substrate having a surface of smaller nucleation density;(2) arranging on the surface of the substrate primary seeds having sufficiently fine surface area to be agglomerated;(3) applying heat treatment to the primary seeds to cause agglomeration to occur, thereby forming a monocrystalline seed with a controlled face orientation; and(4) applying crystal growth treatment to permit a monocrystal to grow with the monocrystalline seed as the originating point.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: November 15, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takao Yonehara, Yuji Nishigaki, Kenji Yamagata
  • Patent number: 5353737
    Abstract: Disclosed is a method for forming a diamond film on a substrate by vapor-phase synthesis using a reaction gas which contains B.sub.2 H.sub.6 and O.sub.2 with a gas concentration ratio (volume %) of ([B.sub.2 H.sub.6 ]/[O.sub.2 ]).gtoreq.1.times.10.sup.-4 in addition to a hydrocarbon gas in hydrogen. By this invention, it is possible to form p-type semiconducting diamond films having an excellent crystallinity and desired electric characteristics.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: October 11, 1994
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Hisashi Koyama, Koichi Miyata, Koji Kobashi
  • Patent number: 5308445
    Abstract: A silicon oxide layer is formed on a silicon substrate, and an opening whose wall is sloped inward is formed in the silicon oxide layer. A seed crystalline silicon layer is formed from the opening. The seed crystalline layer is selectively oxidized while leaving the seed crystalline layer required for crystal growth. An oxide formed at this time closes the opening. Consequently, the seed crystalline layer is insulated from the silicon substrate. The seed crystalline layer is epitaxially grown, to obtain a silicon growth layer on a field oxide layer. The growth layer is insulated from the silicon substrate, and is uniform in surface direction. Accordingly, there is no parasitic capacitance due to a p-n junction between the silicon substrate and the growth layer, thereby to make it possible to perform a high-speed operation.
    Type: Grant
    Filed: October 5, 1992
    Date of Patent: May 3, 1994
    Assignee: Rohm Co., Ltd.
    Inventor: Hidemi Takasu
  • Patent number: 5308444
    Abstract: The invention is predicated upon the discovery by applicants that exposure of a Ge surface to arsenic produces a drastic change in the step structure of the Ge surface. Subsequent exposure to Ga and growth of GaAs produces three-dimensional growth and a high threading dislocation density at the GaAs/Ge interface. However exposure of the Ge surface to Ga does not substantially change the Ge step structure, and subsequent growth of GaAs is two-dimensional with little increase in threading dislocation density. Thus a high quality semiconductor heterostructure of gallium arsenide on germanium can be made by exposing a germanium surface in an environment substantially free of arsenic, depositing a layer of gallium on the surface and then growing a layer of gallium arsenide. The improved method can be employed to make a variety of optoelectronic devices such as light-emitting diodes.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 3, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Eugene A. Fitzgerald, Jr., Jenn-Ming Kuo, Paul J. Silverman, Ya-Hong Xie