With Significant Flow Manipulation Or Condition, Other Than Merely Specifying The Components Or Their Sequence Or Both Patents (Class 117/93)
  • Patent number: 11133646
    Abstract: The upper surface of the semiconductor substrate has a slope descending from the projection in the second direction at an angle of 0-12° to a horizontal plane. The mesa stripe structure has an inclined surface with a slope ascending from the upper surface of the semiconductor substrate at an angle of 45-55° to the horizontal plane, the mesa stripe structure having an upright surface rising from the inclined surface at an angle of 85-95° to the horizontal plane. The buried layer is made from semiconductor with ruthenium doped therein and is in contact with the inclined surface and the upright surface. The inclined surface is as high as 80% or less of height from the upper surface of the semiconductor substrate to a lower surface of the quantum well layer and is as high as 0.3 ?m or more.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: September 28, 2021
    Assignee: Lumentum Japan, Inc.
    Inventors: Takafumi Taniguchi, Shigenori Hayakawa, Yasushi Sakuma
  • Patent number: 10792688
    Abstract: A vacuum evaporation device and system comprises a material container and a recycling structure, wherein a nozzle is arranged on the upper end surface of the material container; the recycling structure is arranged around the nozzle; and the recycling structure is configured to receive material when the material sprayed from the nozzle is fallen down. By arranging the recycling structure, the deposited material is received when it is fallen down, so that the nozzle is prevented from being clogged by the fallen material.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: October 6, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Qun Ma, Da Zhou, Zailong Mo, Jin Xu
  • Patent number: 9416464
    Abstract: Apparatus and methods for controlling gas flows in a HVPE reactor. Gas flows may be controlled by a gas focusing element. Gas injection and gas collection tubes are positioned within an outer tube and are separated from each other to define a space there between. A gas, such as HCl gas, flows over the outer surfaces of the injection and collection tubes to contain gases within the space as they flow from the injection tube to the collection tube and over a seed upon which group III nitride materials are grown. Gas flows may also be controlled by a multi-tube structure that separates gases until they reach a grown zone. A multi-tube structure may include four tubes, which separate flows of a halide reactive gas, a reaction product that flows with a carrier gas, and ammonia.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: August 16, 2016
    Assignee: Ostendo Technologies, Inc.
    Inventors: Vladimir A. Dmitriev, Oleg V. Kovalenkov, Vladimir Ivantsov, Lisa Shapovalov, Alexander L. Syrkin, Anna Volkova, Vladimir Sizov, Alexander Usikov, Vitali A. Soukhoveev
  • Patent number: 9249526
    Abstract: A synthetic single crystal diamond material comprising: a first region comprising electron donor defects; a second region comprising quantum spin defects; and a third region between the first and second regions. The second and third regions have a lower concentration of electron donor defects than the first region. The first and second regions are sufficiently close to allow electrons to be donated from the first region to the second region, thus forming negatively charged quantum spin defects in the second and positively charged defects in the first region, and sufficiently far apart to reduce other coupling interactions between the first and second regions which would otherwise unduly reduce the decoherence time of the plurality of quantum spin defects and/or produce strain broaden of a spectral line width of the plurality of quantum spin defects in the second region.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: February 2, 2016
    Assignee: Element Six Limited
    Inventors: Daniel James Twitchen, Matthew Lee Markham, Geoffrey Alan Scarsbrook
  • Patent number: 9145605
    Abstract: A thin film manufacturing method and a thin film manufacturing apparatus are provided to manufacture a thin film with good reproducibility. A dummy substrate is conveyed into a chamber, and a dummy processing gas is supplied to the dummy substrate. Moreover, a product substrate is conveyed into the chamber, and a raw material gas different from the dummy processing gas is supplied to the product substrate. The raw material gas contains metal material for manufacturing a thin film with a metal organic chemical vapor deposition (MOCVD) method. Since the raw material gas is not used as a dummy processing gas, the amount of metal material to be used can be minimized in manufacturing the thin film with good reproducibility.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 29, 2015
    Assignee: Ulvac, Inc.
    Inventors: Takeshi Masuda, Takuya Ideno, Masahiko Kajinuma, Nobuhiro Odajima, Yohei Uchida, Koukou Suu
  • Patent number: 9111759
    Abstract: A semiconductor device manufacturing method with high productivity is disclosed with improved trade-off relationship between auto-doping and breakdown in alignment mark form. First to sixth epitaxial layers are grown sequentially on Si {100} main surface of an arsenic doped substrate using multilayer epitaxial technology. Epitaxial growth conditions of the first to sixth epitaxial layers are growth at atmospheric pressure and a temperature of 1,150° C. to 1,180° C., with epitaxial growth rate of 2.2 to 2.6 ?m/minute. An alignment mark of depressed form whose bottom surface is the Si {100} plane is formed in the arsenic doped substrate. Every time one of the first to sixth epitaxial layers is grown on the main surface of the arsenic doped substrate, an alignment mark of depressed form is formed in the outermost epitaxial layer by a portion above the alignment mark of the layer below being transformed.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: August 18, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Kazuya Yamaguchi
  • Patent number: 9039834
    Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 26, 2015
    Assignee: The Regents of the University of California
    Inventors: Michael D. Craven, James Stephen Speck
  • Patent number: 9031685
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. In one embodiment, an apparatus comprises a vacuum chamber body having a contiguous internal volume comprised of a first deposition region spaced-apart from a second deposition region, the chamber body having a feature operable to minimize intermixing of gases between the first and the second deposition regions, a first gas port formed in the chamber body and positioned to pulse gas preferentially to the first deposition region to enable a first deposition process to be performed in the first deposition region, and a second gas port formed in the chamber body and positioned to pulse gas preferentially to the second deposition region to enable a second deposition process to be performed in the second deposition region is provided.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: May 12, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence C. Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 8992684
    Abstract: The geometry of transition from cylindrical to rectangular shape through the conical part in hydride vapor phase epitaxial (HVPE) systems for deposition of III-nitride films is disclosed. It is used to ensure the laminar gas flow inside the growth zone of the system. For the velocity of flow within the atmospheric pressure reactor to be sufficient, the precursors are injected through the narrow diameter tubing injectors. The quartz reactor geometry is introduced to control the transition from jet to laminar flow.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: March 31, 2015
    Assignee: Ostendo Technologies, Inc.
    Inventors: Oleg Kovalenkov, Vitali Soukhoveev, Alexander Syrkin, Vladimir Sizov
  • Patent number: 8986645
    Abstract: A method of producing a CVD single crystal diamond layer on a substrate includes adding into a DVD synthesis atmosphere a gaseous source comprising silicon. The method can be used to mark the diamond material, for instance to provide means by which its synthetic nature can more easily be determined. It can also be exploited to generate single crystal diamond material of high color.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: March 24, 2015
    Assignee: Element Six Limited
    Inventors: Daniel James Twitchen, Geoffrey Alan Scarsbrook, Philip Maurice Martineau, Paul Martyn Spear, Stephen David Williams, Ian Friel
  • Patent number: 8961687
    Abstract: Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a?) that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline InxGayAl1-x-yN alloy. The lattice parameter of the InxGayAl1-x-yN or other group III-nitride alloy may be related to the substrate lattice parameter by (a?)=?2(a) or (a?)=(a)/?2. The semiconductor alloy may be prepared to have a selected band gap.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: February 24, 2015
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Andrew G. Norman, Aaron J. Ptak, William E. McMahon
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Publication number: 20140283736
    Abstract: A vapor phase growth apparatus of an embodiment includes a reaction chamber, a first gas supply channel that supplies a Si source gas to the reaction chamber, a second gas supply channel that supplies a C source gas to the reaction chamber, a third gas supply channel that supplies an n-type impurity source gas to the reaction chamber, a fourth gas supply channel that supplies a p-type impurity source gas to the reaction chamber, and a control unit that controls the amounts of the n-type impurity and p-type impurity source gases at a predetermined ratio, and introduces the n-type impurity and p-type impurity source gases into the reaction chamber. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al, Ga, or In and N, and/or a combination of B and P.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Johji Nishio, Tatsuo Shimizu, Chiharu Ota, Takashi Shinohe
  • Patent number: 8822263
    Abstract: It is provided a hetero epitaxial growth method, a hetero epitaxial crystal structure, a hetero epitaxial growth apparatus and a semiconductor device, the method includes forming a buffer layer formed with the orienting film of an oxide, or the orienting film of nitride on a heterogeneous substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the buffer layer using a halogenated group II metal and an oxygen material. It is provided a homo epitaxial growth method, a homo epitaxial crystal structure, a homo epitaxial growth apparatus and a semiconductor device, the homo epitaxial growth method includes introducing reactant gas mixing zinc containing gas and oxygen containing gas on a zinc oxide substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the zinc oxide substrate.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: September 2, 2014
    Assignees: National University Corporation Tokyo University of Agriculture and Technology, Rohm Co., Ltd., Tokyo Electron Limited
    Inventors: Akinori Koukitu, Yoshinao Kumagai, Tetsuo Fujii, Naoki Yoshii
  • Patent number: 8790461
    Abstract: The invention provides a method for manufacturing the silicon carbide single crystal wafer capable of improving the utilization ratio of the bulk silicon carbide single crystal, capable of improving characteristics of the element and capable of improving cleavability, and the silicon carbide single crystal wafer obtained by the manufacturing method. An ?(hexagonal)-silicon carbide single crystal wafer which has a flat homoepitaxial growth surface with a surface roughness of 2 nm or less and which has an off-angle from the (0001)c plane of 0.4° or less.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: July 29, 2014
    Assignee: Showa Denko K.K.
    Inventors: Takayuki Maruyama, Toshimi Chiba
  • Patent number: 8728237
    Abstract: A method for growing nitride semiconductor crystals contains: growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate at a first growth temperature, using a first carrier gas containing an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer at a second growth temperature higher than the first growth temperature, using a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer at the second growth temperature, using a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Toshiki Hikosaka, Yoshiyuki Harada, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8663389
    Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: March 4, 2014
    Inventor: Andrew Peter Clarke
  • Patent number: 8658449
    Abstract: A method of manufacturing a semiconductor layer with which inactivation of impurity is able to be inhibited by a simple method, a semiconductor layer in which inactivation of impurity is inhibited, a method of manufacturing a laser diode with which inactivation of impurity is able to be inhibited by a simple method, and a laser diode including a semiconductor layer in which inactivation of impurity is inhibited are provided. In the method of manufacturing a semiconductor layer, after a semiconductor layer is formed by epitaxial growth with the use of AsH3, supply of AsH3 is stopped without separately supplying new gas when process temperature is 500 deg C. or more.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: February 25, 2014
    Assignee: Sony Corporation
    Inventors: Naoki Jogan, Takahiro Arakida
  • Patent number: 8652255
    Abstract: A method of: flowing a silicon source gas, a carbon source gas, and a carrier gas into a growth chamber under growth conditions to epitaxial grow silicon carbide on a wafer in the growth chamber; stopping or reducing the flow of the silicon source gas to interrupt the silicon carbide growth and maintaining the flow of the carrier gas while maintaining an elevated temperature in the growth chamber for a period of time; and resuming the flow of the silicon source gas to reinitiate silicon carbide growth. The wafer remains in the growth chamber throughout the method.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: February 18, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Robert E Stahlbush, Brenda L VanMil, Kok-Keong Lew, Rachael L Myers-Ward, David Kurt Gaskill, Charles R. Eddy, Jr.
  • Patent number: 8636844
    Abstract: A method of forming a template on a silicon substrate includes epitaxially growing a template of single crystal ternary rare earth oxide on a silicon substrate and epitaxially growing a single crystal semiconductor active layer on the template. The active layer has either a cubic or a hexagonal crystal structure. During the epitaxial growth of the template, a partial pressure of oxygen is selected and a ratio of metals included in the ternary rare earth oxide is selected to match crystal spacing and structure of the template at a lower interface to the substrate and to match crystal spacing and structure of the template at an upper interface to crystal spacing and structure of the semiconductor active layer. A high oxygen partial pressure during growth of the template produces a stabilized cubic crystal structure and a low oxygen partial pressure produces a predominant peak with a hexagonal crystal structure.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: January 28, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Michael Lebby
  • Patent number: 8626330
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. In one embodiment, an apparatus comprises a vacuum chamber body having a contiguous internal volume comprised of a first deposition region spaced-apart from a second deposition region, the chamber body having a feature operable to minimize intermixing of gases between the first and the second deposition regions, a first gas port formed in the chamber body and positioned to pulse gas preferentially to the first deposition region to enable a first deposition process to be performed in the first deposition region, and a second gas port formed in the chamber body and positioned to pulse gas preferentially to the second deposition region to enable a second deposition process to be performed in the second deposition region is provided.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: January 7, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 8603243
    Abstract: A method of: supplying sources of carbon and silicon into a chemical vapor deposition chamber; collecting exhaust gases from the chamber; performing mass spectrometry on the exhaust gases; and correlating a partial pressure of a carbon species in the exhaust gases to a carbon:silicon ratio in the chamber.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: December 10, 2013
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Brenda L VanMil, Kok-Keong Lew, Rachael L Myers-Ward, Charles R. Eddy, Jr., David Kurt Gaskill
  • Patent number: 8597427
    Abstract: A semiconductor device is provided which is constituted by semiconductor devices including a thin film transistor with a GOLD structure, the GOLD structure thin film transistor being such that: a semiconductor layer, a gate insulating film, and a gate electrode are formed in lamination from the side closer to a substrate; the gate electrode is constituted of a first-layer gate electrode and a second-layer gate electrode shorter in the size than the first-layer gate electrode; the first-layer gate electrode corresponding to the region exposed from the second-layer gate electrode is formed into a tapered shape so as to be thinner toward the end portion; a first impurity region is formed in the semiconductor layer corresponding to the region with the tapered shape; and a second impurity region having the same conductivity as the first impurity region is formed in the semiconductor layer corresponding to the outside of the first-layer gate electrode, which is characterized in that a dry etching process consisting
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: December 3, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoru Okamoto
  • Patent number: 8568530
    Abstract: Precursors suitable for chemical vapor deposition, especially ALD, of hafnium oxide or zirconium oxide, have the general formula: (R1Cp)2MR2 wherein Cp represents a cyclopentadienyl ligand, R1 is H or a substituting alkyl group, alkoxy group or amido group of the Cp ligand, R2 is an alkyl group, an alkoxy group or an amido group and M is hafnium or zirconium.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: October 29, 2013
    Assignee: Sigma-Aldrich Co. LLC
    Inventors: Peter Nicholas Heys, Paul Williams, Fuquan Song
  • Patent number: 8551246
    Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: October 8, 2013
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumio Tahara, Tsuyoshi Ohtsuki, Takatoshi Nagoya, Kiyoshi Mitani
  • Patent number: 8529697
    Abstract: A process for growing a crystal of a nitride semiconductor in which after the step of mounting a substrate (12) in a reaction tube (11), the step of feeding a first material gas containing a Group 3 element onto the substrate in the reaction tube and the step of feeding a second material gas containing elemental nitrogen onto the substrate in the reaction tube are carried out alternately to deposit a nitride semiconductor crystal directly on the substrate. The number of moles of the elemental nitrogen contained in the second material gas has a ratio of 200 or more to the number of moles of the Group 3 element in the first material gas.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: September 10, 2013
    Assignees: Honda Motor Co., Ltd.
    Inventors: Hideki Hashimoto, Akihiko Horiuchi, Hideo Kawanishi
  • Patent number: 8507950
    Abstract: A method of producing a semiconductor wafer includes placing a base wafer within a reaction chamber, and epitaxially growing a p-type Group 3-5 compound semiconductor on the base wafer by supplying, into the reaction chamber, a Group 3 source gas consisting of an organometallic compound of a Group 3 element, a Group 5 source gas consisting of a compound of a Group 5 element, and an impurity gas including an impurity that is to be incorporated as a dopant into a semiconductor to serve as a donor. Here, during the epitaxial growth of the p-type Group 3-5 compound semiconductor, the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas are set so that the product N×d (cm?2) of the residual carrier concentration N (cm?3) and the thickness d (cm) of the p-type Group 3-5 compound semiconductor may be 8.0×1011 or less.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: August 13, 2013
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Junya Hada, Tsuyoshi Nakano
  • Patent number: 8470090
    Abstract: Affords large-diametric-span AlN crystals, applicable to various types of semiconductor devices, with superior crystallinity, a method of growing the AlN crystals, and AlN crystal substrates. The AlN crystal growth method is a method in which an AlN crystal (4) is grown by vapor-phase epitaxy onto a seed crystal substrate (2) placed inside a crystal-growth compartment (24) within a crystal-growth vessel (12) provided within a reaction chamber, and is characterized in that during growth of the crystal, carbon-containing gas is supplied to the inside of the crystal-growth compartment (24).
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naho Mizuhara, Michimasa Miyanaga, Tomohiro Kawase, Shinsuke Fujiwara
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
  • Patent number: 8382897
    Abstract: Methods for gas delivery to a process chamber are provided herein. In some embodiments, a method may include flowing a process gas through one or more gas conduits, each gas conduit having an inlet and an outlet for facilitating the flow of gas through the gas conduits and into a gas inlet funnel having a second volume, wherein each gas conduit has a first volume less than the second volume, and wherein each gas conduit has a cross-section that increases from a first cross-section proximate the inlet to a second cross-section proximate the outlet but excluding any intersection points between the gas inlet funnel and the gas conduit, and wherein the second cross-section is non-circular; and delivering the process gas to the substrate via the gas inlet funnel.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Kedarnath Sangam, Anh N. Nguyen
  • Patent number: 8349076
    Abstract: A method of fabricating a freestanding gallium nitride (GaN) substrate includes: preparing a GaN substrate within a reactor; supplying HCl and NH3 gases into the reactor to treat the surface of the GaN substrate and forming a porous GaN layer; forming a GaN crystal growth layer on the porous GaN layer; and cooling the GaN substrate on which the GaN crystal growth layer has been formed and separating the GaN crystal growth layer from the substrate. According to the fabrication method, the entire process including forming a porous GaN layer and a thick GaN layer is performed in-situ within a single reactor. The method is significantly simplified compared to a conventional fabrication method. The fabrication method enables the entire process to be performed in one chamber while allowing GaN surface treatment and growth to be performed using HVPE process gases, thus resulting in a significant reduction in manufacturing costs.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: January 8, 2013
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: In-Jae Song, Jai-yong Han
  • Patent number: 8334015
    Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: December 18, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Tony P. Chiang, Sunil Shanker, Chi-I Lang
  • Patent number: 8323407
    Abstract: The invention relates to a method and system for epitaxial deposition of a Group III-V semiconductor material that includes gallium. The method includes reacting an amount of a gaseous Group III precursor having one or more gaseous gallium precursors as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber; and supplying sufficient energy to the gaseous gallium precursor(s) prior to their reacting so that substantially all such precursors are in their monomer forms. The system includes sources of the reactants, a reaction chamber wherein the reactants combine to deposit Group III-V semiconductor material, and one or more heating structures for heating the gaseous Group III precursors prior to reacting to a temperature to decompose substantially all dimers, trimers or other molecular variations of such precursors into their component monomers.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: December 4, 2012
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 8278666
    Abstract: The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: October 2, 2012
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, Sean R. McLaughlin, Thomas J. Knight, Robert M. Young, Brian P. Wagner, David A. Kahler, Andre E. Berghmans, David J. Knuteson, Ty R. McNutt, Jerry W. Hedrick, Jr., George M. Bates, Kenneth Petrosky
  • Patent number: 8252112
    Abstract: A method and apparatus for the unusually high rate deposition of thin film materials on a stationary or continuous substrate. The method includes delivery of a pre-selected precursor intermediate to a deposition chamber and formation of a thin film material from the intermediate. The intermediate is formed outside of the deposition chamber and includes a metastable species such as a free radical. The intermediate is pre-selected to include a metastable species conducive to the formation of a thin film material having a low defect concentration. By forming a low defect concentration material, deposition rate is decoupled from material quality and heretofore unprecedented deposition rates are achieved. In one embodiment, the pre-selected precursor intermediate is SiH3.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: August 28, 2012
    Assignee: Ovshinsky Innovation, LLC
    Inventor: Stanford R. Ovshinsky
  • Patent number: 8236103
    Abstract: A method for producing a Group III nitride semiconductor crystal includes a first step of supplying a Group III raw material and a Group V raw material at a V/III ratio of 0 to 1,000 to form and grow a Group III nitride semiconductor on a heated substrate and a second step of vapor-phase-growing a Group III nitride semiconductor crystal on the substrate using a Group III raw material and a nitrogen raw material.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 7, 2012
    Assignee: Showa Denko K.K.
    Inventors: Hisayuki Miki, Tetsuo Sakurai, Mineo Okuyama
  • Patent number: 8231728
    Abstract: An epitaxial growth method forming a semiconductor thin film including a heterojunction of a group III-V compound semiconductor by means of molecular beam epitaxy. The method is configured to include: a first step of irradiating a molecular beam of at least one of group III elements and a molecular beam of a first group V element to form a first compound semiconductor layer; a second step of stopping the irradiation of the molecular beam of the group III element and the molecular beam of the first group V element to halt growth until an amount of the first group V element supplied is reduced to 1/10 or less of a supply of the first group V element in the first step; and a third step of irradiating a molecular beam of at least one of the group III elements and a molecular beam of a second group V element to form a second compound semiconductor layer, which is different from the first compound semiconductor, on the first compound semiconductor layer.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: July 31, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Misao Takakusaki, Susumu Kanai
  • Patent number: 8226767
    Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: July 24, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
  • Patent number: 8197597
    Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: June 12, 2012
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 8142566
    Abstract: A Ga-containing nitride semiconductor single crystal characterized in that (a) the maximum reflectance measured by irradiating the Ga-containing nitride semiconductor single crystal with light at a wavelength of 450 nm is 20% or less and the difference between the maximum reflectance and the minimum reflectance is within 10%, (b) the ratio of maximum value to minimum value (maximum value/minimum value) of the dislocation density measured by a cathode luminescence method is 10 or less, and/or (c) the lifetime measured by a time-resolved photoluminescence method is 95 ps or more.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: March 27, 2012
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Kazumasa Kiyomi, Hirobumi Nagaoka, Hirotaka Oota, Isao Fujimura
  • Patent number: 8143147
    Abstract: A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: March 27, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Philip A. Kraus, Sandeep Nijhawan, Thai Cheng Chua
  • Patent number: 8123858
    Abstract: To provide a manufacturing method of a semiconductor device, comprising: loading a substrate, with a silicon surface exposed at a part of the substrate, into a processing chamber; heating an inside of said processing chamber; performing pre-processing of supplying at least silane-based gas, halogen-based gas, and hydrogen gas into said processing chamber, removing at least a natural oxide film or a contaminated matter that exist on a surface of said silicon surface, and growing an epitaxial film on said silicon surface; and supplying gas containing at least silicon into said processing chamber after said pre-processing, and further growing the epitaxial film on said epitaxial film.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: February 28, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Jie Wang, Yasuhiro Ogawa, Katsuhiko Yamamoto, Takashi Yokogawa
  • Patent number: 8080106
    Abstract: Provided are an epitaxial silicon wafer in which the warping is reduced by rendering a cross-sectional form of a silicon wafer for epitaxial growth into an adequate form as compared with the conventional one, and a production method thereof. An epitaxial silicon wafer comprising a silicon wafer for epitaxial growth and an epitaxial layer is characterized in that the epitaxial layer is formed on a silicon wafer for epitaxial growth having a cross-sectional form satisfying a relation of a given expression.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: December 20, 2011
    Assignee: Sumco Corporation
    Inventors: Takayuki Kihara, Kazushige Takaishi, Yasuyuki Hashimoto
  • Patent number: 8029620
    Abstract: In a first aspect, a method is provided for forming an epitaxial layer stack on a substrate. The method includes (1) selecting a target carbon concentration for the epitaxial layer stack; (2) forming a carbon-containing silicon layer on the substrate, the carbon-containing silicon layer having at least one of an initial carbon concentration, a thickness and a deposition time selected based on the selected target carbon concentration; and (3) forming a non-carbon-containing silicon layer on the carbon-containing silicon layer prior to etching. Numerous other aspects are provided.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: October 4, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Yihwan Kim, Zhiyuan Ye, Ali Zojaji
  • Patent number: 8027746
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: September 27, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 8016943
    Abstract: A method for preparing film oxides deposited on a substrate with a resulting grain boundary junction that is atomistically straight. A bicrystal substrate having a straight grain boundary is prepared as a template. The Miller indices h1, k1, h2, k2 of the two grains of the substrate are chosen such that the misorientation angle of the film is equal to arctan k1/h1+arctan k2/h2. The film is grown on the substrate using a layer-by-layer growth mode.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: September 13, 2011
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: Siu-Wai Chan
  • Patent number: 8007588
    Abstract: A vapor phase epitaxial growth method using a vapor phase epitaxy apparatus having a chamber, a support structure holding thereon a substrate in the chamber, a first flow path supplying a reactant gas for film formation on the substrate and a second flow path for exhaust of the gas, said method includes rotating the substrate, supplying the reactant gas and a carrier gas to thereby perform vapor-phase epitaxial growth of a semiconductor film on the substrate, and during the vapor-phase epitaxial growth of the semiconductor film on the substrate, controlling process parameters to make said semiconductor film uniform in thickness, said process parameters including flow rates and concentrations of the reactant gas and the carrier gas, a degree of vacuum within said chamber, a temperature of the substrate, and a rotation speed of said substrate.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: August 30, 2011
    Assignee: NuFlare Technology, Inc.
    Inventors: Hideki Ito, Satoshi Inada, Yoshikazu Moriyama
  • Patent number: 7964280
    Abstract: A method of producing CVD diamond having a high color, which is suitable for optical applications, for example. The method includes adding a gaseous source comprising a second impurity atom type to counter the detrimental effect on colour caused by the presence in the CVD synthesis atmosphere of a first impurity atom type. The described method applies to the production of both single crystal diamond and polycrystalline diamond.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: June 21, 2011
    Inventors: Stephen David Williams, Daniel James Twitchen, Philip Maurice Martineau, Geoffrey Alan Scarsbrook, Ian Friel
  • Patent number: 7935384
    Abstract: The present invention relates to a method of forming a metal-nitride film onto a surface of an object to be processed in a processing container in which a vacuum can be created. The method of the invention includes: a step of continuously supplying an inert gas into a processing container set at a low film-forming temperature; and a step of intermittently supplying a metal-source gas into the processing container, during the step of continuously supplying the inert gas. During the step of intermittently supplying the metal-source gas, a nitrogen-including reduction gas is supplied into the processing container at the same time that the metal-source gas is supplied, during a supply term of the metal-source gas. The nitrogen-including reduction gas is also supplied into the processing container for a term shorter than a non-supply term of the metal-source gas, during the non-supply term of the metal-source gas.
    Type: Grant
    Filed: September 2, 2002
    Date of Patent: May 3, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Toshio Hasegawa
  • Patent number: 7860597
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: December 28, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun