With Significant Flow Manipulation Or Condition, Other Than Merely Specifying The Components Or Their Sequence Or Both Patents (Class 117/93)
  • Patent number: 6428621
    Abstract: A low defect (e.g., dislocation and micropipe) density silicon carbide (SiC) is provided as well as an apparatus and method for growing the same. The SiC crystal, growing using sublimation techniques, is preferably divided into two stages of growth. During the first stage of growth, the crystal grows in a normal direction while simultaneously expanding laterally. Although dislocation and other material defects may propagate within the axially grown material, defect propagation and generation in the laterally grown material are substantially reduced, if not altogether eliminated. After the crystal has expanded to the desired diameter, the second stage of growth begins in which lateral growth is suppressed and normal growth is enhanced. A substantially reduced defect density is maintained within the axially grown material that is based on the laterally grown first stage material.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: August 6, 2002
    Assignee: The Fox Group, Inc.
    Inventors: Yury Alexandrovich Vodakov, Mark Grigorievich Ramm, Evgeny Nikolaevich Mokhov, Alexandr Dmitrievich Roenkov, Yury Nikolaevich Makarov, Sergei Yurievich Karpov, Mark Spiridonovich Ramm, Heikki I. Helava
  • Patent number: 6425951
    Abstract: An apparatus for forming a portion of an electronic device is described incorporating an Ultra High Vacuum-Chemical Vapor Deposition (UHV-CVD) system, a Low Pressure-Chemical Vapor Deposition (LP-CVD) system, and an Ultra High Vacuum (UHV) transfer system. A method for passivating a semiconductor substrate is described incorporating growing silicon containing layers, flowing a hydrogen containing gas and lowering the substrate temperature below 400° C. A method for removing native oxide is described. A method for growing a continuous epitaxial layer while performing a deposition interrupt is described. A method for forming a Si/Si oxide interface is described having low interface trap density. A method for forming a Si/Si oxide/p++ polysilicon gate stack. The invention overcomes the problem of requiring silicon containing wafers being dipped in HF acid prior to CVD processing. The invention overcomes the problem of surface passivation between in-situ processes in multiple CVD reactors.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: July 30, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Khalid Ezzeldin Ismail
  • Publication number: 20020088389
    Abstract: A method and apparatus for the high throughput epitaxial growth of a layer on the surface of a substrate by chemical vapor deposition is provided. In one embodiment, the method of the present invention comprises placing the substrate within a reactor vessel and passing a horizontal flow of reactant gas comprising a precursor chemical through the reactor vessel. The flow of the reactant gas is defined as having a Reynolds number of at least about 5000. The substrate is heated to a temperature sufficient to thermally decompose the precursor chemical and deposit an epitaxial layer on the substrate. In accordance with a preferred embodiment of the present invention, the substrate is placed within the reactor vessel at a position such that the flow of the reactant gas is characterized as a fully developed turbulent flow.
    Type: Application
    Filed: November 15, 2001
    Publication date: July 11, 2002
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Srikanth Kommu, Gregory M. Wilson
  • Patent number: 6368405
    Abstract: A single crystal silicon growth apparatus, comprising: a chamber where a silicon substrate is to be inserted; a heat source for rising the temperature in an interior of the chamber; a cooling line for rapidly dropping the temperature in the interior of the chamber; a gas sprayer for providing a source gas and a purge gas inside the chamber; a gas inflow line connected to the gas sprayer for inflowing the source gas and the purge gas into the gas sprayer; and a gas exhausting line for maintaining the interior of the chamber with a vacuum.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: April 9, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Seung Woo Shin
  • Publication number: 20010047750
    Abstract: An apparatus for depositing a semiconductor film on a wafer, which is held on a holder inside a reactor, with at least one source gas supplied onto the wafer. The apparatus includes a decontamination film made of a semiconductor that contains at least one constituent element of the semiconductor film to be deposited. The decontamination film covers inner walls of the reactor, which are located upstream with respect to the source gas supplied and/or over the holder.
    Type: Application
    Filed: May 25, 2001
    Publication date: December 6, 2001
    Inventor: Masahiro Ishida
  • Patent number: 6309458
    Abstract: This invention provides a method for fabricating a silicon thin film which is high in supply efficiency of silicon material. In the method for fabricating a silicon thin film by placing a silicon semiconductor single crystal substrate in a process vessel and by supplying a silicon material into the process vessel, a wall of the process vessel is cooled so that silicon tetrachloride (SiCl4) concentration in an exhaust gas discharged from the process vessel during a growth process of a silicon thin film becomes equal to or lower than {fraction (1/10)} of a concentration of the silicon material in the exhaust gas. Also, the wall of the process vessel is cooled so that temperature gradient between a surface of the semiconductor single crystal substrate and the wall of the process vessel satisfies the following Equation (1) in relation to a temperature of the semiconductor single crystal substrate: temperature gradient(K/cm)≧0.3×substrate temperature(K)−90  (1).
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: October 30, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Shoji Akiyama, Toru Otsuka
  • Patent number: 6306211
    Abstract: In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: October 23, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunimasa Takahashi, Makoto Kitabatake, Masao Uchida, Toshiya Yokogawa
  • Patent number: 6290774
    Abstract: A method for forming a relatively thick epitaxial film of a III-V compound on a non-native substrate involves sequentially forming a plurality of epitaxial layers on the substrate at a growth temperature. By cooling the substrate and each sequentially grown epitaxial layer to a sub-growth temperature prior to resumption of epitaxial growth, stress within the sample (due to thermal mismatch between the substrate and the epitaxial layer) is periodically relieved. Sequential epitaxial growth is combined with system etching to provide an epitaxial layer which not only has a lower propensity to shatter, but also exhibits improved surface morphology. Sequential hydride vapor-phase epitaxy using HCl as both source gas and etchant, allows integration of sequential deposition and system etching into a single process.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: September 18, 2001
    Assignees: CBL Technology, Inc., Matsushita Electric Industrial Co., Ltd.
    Inventors: Glenn S. Solomon, David J. Miller, Tetsuzo Ueda
  • Patent number: 6270570
    Abstract: An object of the present invention is to provide a fluoride crystal having a high transmittance with respect to an excimer laser and an excellent resistance with respect to a high output laser, and a production method therefore. The fluoride crystal of the present invention contains at least one kind of atom selected from the group consisting of Zn, Cd, Pb, Li, Bi and Na with a content of 10 ppm or less, and has an internal transmittance of 70% or more with respect to 135 nm wavelength light. The method of the present invention of producing a fluoride crystal comprises conducting a refining step of adding a scavenger to a calcium fluoride raw material and refining the raw material at least once, and a crystal growth step of further adding the scavenger to the refined raw material and growing a crystal by using a crucible lowering method, wherein the amount of the scavenger to be added in the first refining step is 0.04 to 0.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: August 7, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoru Ohba, Toshio Ichizaki
  • Patent number: 6270572
    Abstract: A thin film manufacturing method is provided. The method includes the step of chemically adsorbing a first reactant on a substrate by injecting the first reactant into a chamber in which the substrate is loaded. Physisorbed first reactant on the chemically adsorbed first reactant is removed by purging or pumping the chamber. After the first reactant is densely chemically adsorbed on the substrate by re-injecting the first reactant into the chamber, the physisorbed first reactant on the dense chemisorbed first reactant is removed by purging or pumping the chamber. A second reactant is chemically adsorbed onto the surface of the substrate by injecting the second reactant into the chamber. Physisorbed second reactant on the chemisorbed first reactant and the second reactant is removed by purging or pumping the chamber. A solid thin film is formed by chemical exchange through densely adsorbing the second reactant onto the substrate by re-injecting the second reactant into the chamber.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: August 7, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-kwan Kim, Sang-in Lee, Chang-soo Park, Sang-min Lee
  • Patent number: 6251183
    Abstract: The invention provides a process for depositing an epitaxial layer on a crystalline substrate, comprising the steps of providing a chamber having an element capable of heating, introducing the substrate into the chamber, heating the element at a temperature sufficient to decompose a source gas, passing the source gas in contact with the element; and forming an epitaxial layer on the substrate.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: June 26, 2001
    Assignee: Midwest Research Institute
    Inventors: Eugene Iwancizko, Kim M. Jones, Richard S. Crandall, Brent P. Nelson, Archie Harvin Mahan
  • Patent number: 6200893
    Abstract: A new method for CVD deposition on a substrate is taught wherein radical species are used in alternate steps to depositions from a molecular precursor to treat the material deposited from the molecular precursor and to prepare the substrate surface with a reactive chemical in preparation for the next molecular precursor step. By repetitive cycles a composite integrated film is produced. In a preferred embodiment the depositions from the molecular precursor are metals, and the radicals in the alternate steps are used to remove ligands left from the metal precursor reactions, and to oxidize or nitridize the metal surface in subsequent layers. A variety of alternative chemistries are taught for different films, and hardware combinations to practice the invention are taught as well.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: March 13, 2001
    Assignee: Genus, Inc
    Inventor: Ofer Sneh
  • Patent number: 6193797
    Abstract: An apparatus comprises an Si-disposing section in which solid Si is disposed; a seed-crystal-disposing section in which a seed crystal of SiC is disposed; a synthesis vessel adapted to accommodate the Si-disposing section, the seed-crystal-disposing section, and carbon; heating means adapted to heat the Si-disposing section and the seed-crystal-disposing section; and a control section for transmitting to the heating means a command for heating the Si to an evaporation temperature of Si or higher and heating the seed crystal to a temperature higher than that of Si; wherein the Si evaporated by the heating means is adapted to reach the seed-crystal-disposing section.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: February 27, 2001
    Assignees: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Shigehiro Nishino
  • Patent number: 6190453
    Abstract: A method of growing epitaxial semiconductor layers with reduced crystallographic defects. The method includes growing a first epitaxial semiconductor layer on a semiconductor substrate under conditions of relatively high temperature and low source gas flow to heal defects in or on the surface of the substrate. Subsequently, a second epitaxial semiconductor layer is grown on the first layer under conditions of relatively low temperature and high source gas flow. The first epi layer acts as a low-defect seed layer by preventing defects in the surface of the substrate from propagating into the second epi layer. Optionally, a hydrogen chloride etch may be employed during a portion of the first epi layer growth to increase the efficacy of the first layer.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: February 20, 2001
    Assignee: SEH America, Inc.
    Inventors: Mark R. Boydston, Gerald R. Dietze, Oleg V. Kononchuk
  • Patent number: 6187091
    Abstract: An apparatus and a process for growing a silicon epitaxial layer on a main surface of a silicon substrate wafer are disclosed. The apparatus and process provide a reactor and a gas feeder system. The gas feeder system utilizes an auxiliary dopant supply mass flow control (MFC) to provide an auxiliary dopant only into a central injector that effects epitaxial deposition on the center of the wafer for autodoping correction. An auxiliary bellows metering valve is provided between the auxiliary MFC and the center injector to absorb pressure variations in the central flow line to prevent the pressure variations from reaching the auxiliary MFC. This results in a stable and consistent dopant concentration and resistivity profile.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: February 13, 2001
    Assignee: SEH America, Inc.
    Inventor: Todd A. Hamilton
  • Patent number: 6129787
    Abstract: An object of the present invention is to provide a single-crystal silicon wafer where octahedral voids of Grown-in defects, which are the generation source of COP on the surface and COP at several .mu.m depth of the surface layer of the single-crystal silicon wafer grown by the CZ method, are effectively eliminated, and a fabrication method of this wafer, where oxygen near the surface is out-diffused by annealing in a hydrogen and/or inactive gas ambient and oxide film on the inner walls of the octahedral voids near the surface are removed by the created unsaturated oxygen area, then oxidation annealing is performed in an oxygen ambient or mixed gas ambient of oxygen and inactive gas, so that interstitial silicon atoms are forcibly injected to completely eliminate the octahedral voids near the surface, and at the same time an IG layer is created in the bulk of the wafer.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: October 10, 2000
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Naoshi Adachi, Masakazu Sano, Shinsuke Sadamitsu, Tsuyoshi Kubota
  • Patent number: 6117750
    Abstract: The process consists in depositing, by chemical vapor deposition using a mixture of silicon and germanium precursor gases, a single-crystal layer of silicon or germanium on a germanium or silicon substrate by decreasing or increasing the temperature in the range 800-450.degree. C. and at the same time by increasing the Si/Ge or Ge/Si weight ratio from 0 to 100% in the precursor gas mixture, respectively.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: September 12, 2000
    Assignee: France Telecom
    Inventors: Daniel Bensahel, Yves Campidelli, Caroline Hernandez, Maurice Rivoire
  • Patent number: 6096129
    Abstract: An initial single-crystalline diamond base material is prepared from a flat plate having a major surface and side surfaces consisting of low-index planes. Then, single crystalline diamond is homoepitaxially vapor-deposited on the single-crystalline diamond base material, and a resulting diamond material is cut and polished in a particular manner to provide a successive base material on which single-crystalline diamond is again grown, thereby forming a single-crystalline diamond having a large area. A holder for the single-crystalline diamond base material consists of or is coated with a material hardly forming a compound with carbon. Single crystalline diamond can be stably formed on the surfaces of the base material. Consequently, single-crystalline diamond of high quality having a large area can be stably produced in a shorter time using either plasma CVD or a thermal filament method.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: August 1, 2000
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hirohisa Saito, Takashi Tsuno, Takahiro Imai, Yoshiaki Kumazawa
  • Patent number: 6086673
    Abstract: Provided is a method for producing a nitride layer on a growth substrate. First a pretreatment layer is formed on the growth substrate, and then the formed pretreatment layer is exposed to a gaseous environment that is thermochemically reactive with the pretreatment layer. After gaseous environment exposure of the pretreatment layer, there is carried out an epitaxial growing process to produce on the substrate a nitride layer material defined as In.sub.x Ga.sub.y Al.sub.1-x-y N, where 0.ltoreq.x.ltoreq.1; 0.ltoreq.y.ltoreq.1; and 0.ltoreq.x+y.ltoreq.1. For example, a pretreatment layer of ZnO can be deposited on a sapphire growth substrate and then subjected to a gaseous environment, e.g., including HCl- and/or NH.sub.3 -containing gas, that is thermochemically reactive with the ZnO. Then an epitaxial layer of GaN can be grown by a hydride vapor phase epitaxial process on the pretreated substrate.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: July 11, 2000
    Assignee: Massachusetts Institute of Technology
    Inventor: Richard J. Molnar
  • Patent number: 6071338
    Abstract: A method for crystal growth of a multi-element oxide thin film containing bismuth as a constituent element has setting a growth environment to fall under conditions such that an oxide of bismuth alone will not be formed, but the desired multi-element oxide will be formed; and supplying bismuth in excess of other elements to the growth environment, to prevent the lack of bismuth and evaporate surplus bismuth from the thin film. This method suppresses the formation of different phases or the precipitation of impurities ascribed to the deviation of the proportion of bismuth element from the desired composition, enables a high quality thin film to be grown, and markedly broadens the ranges of the set conditions for the thin film growth temperature and oxidizing gas in comparison with conventional technologies.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: June 6, 2000
    Assignee: Agency of Industrial Science & Technology
    Inventors: Shigeki Sakai, Shinji Migita
  • Patent number: 6066204
    Abstract: An apparatus and method is disclosed for providing vapor-phase epitaxial growth on a substrate using a Metal Organic Chemical Vapor Deposition (MOCVD) process. The process is performed in a reactive chamber pressurized to greater than one atmosphere. The reactant gases to be deposited on the substrate are also pressurized to the equivalent pressure, and then introduced into the reactor chamber. By performing the MOCVD process at a pressure greater than one atmosphere, a reduced amount of reactant gas is required to complete the deposition process.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: May 23, 2000
    Assignee: Bandwidth Semiconductor, LLC
    Inventor: Victor E. Haven
  • Patent number: 6063186
    Abstract: An improved chemical vapor deposition method is disclosed that increases the uniformity of silicon carbide epitaxial layers and that is particularly useful for obtaining thicker epitaxial layers. The method comprises heating a reactor to a temperature at which silicon carbide source gases will form an epitaxial layer of silicon carbide on a substrate in the reactor; and then directing a flow of source and carrier gases through the heated reactor to form an epitaxial layer of silicon carbide on the substrate with the carrier gases comprising a blend of hydrogen and a second gas in which the second gas has a thermal conductivity that is less than the thermal conductivity of hydrogen so that the source gases deplete less as they pass through the reactor than they would if hydrogen is used as the sole carrier gas.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: May 16, 2000
    Assignee: Cree, Inc.
    Inventors: Kenneth George Irvine, Michael James Paisley, Olle Claes Erik Kordina
  • Patent number: 6030661
    Abstract: A method for epitaxially growing objects of SiC, a Group III-nitride or alloys thereof by Chemical Vapor Deposition on a substrate received in a susceptor having circumferential walls, the method comprises heating the circumferential susceptor walls, and thereby the substrate and a gas mixture led to the substrate for the growth, above a temperature level at which sublimination of the material grown starts to considerably increase, and feeding the gas mixture into the susceptor with a composition and at a rate that ensures a positive growth.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: February 29, 2000
    Assignees: ABB Research Ltd., Okmetic Ltd.
    Inventors: Olle Kordina, Christer Hallin, Erik Janzen
  • Patent number: 6027564
    Abstract: A method for fabricating composite articles with an epitaxial layer is described. The method can be performed under conditions of relatively high pressure and low substrate surface temperature. The resulting epitaxial layers can demonstrate various advantageous properties, such as low pore density and/or inclusions with small average particle size diameter.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: February 22, 2000
    Assignee: American Superconductor Corporation
    Inventors: Leslie G. Fritzemeier, David M. Buczek
  • Patent number: 6019840
    Abstract: A reduced temperature low pressure metal organic chemical vapor deposition process for the production of semi-insulating deep level impurity undoped Group III-V phosphorous containing epitaxial layers. The present invention achieves production of semi-insulating layers at reduced growth temperatures in the approximate range of 490.degree. C. to 530.degree. C. Semi-insulating resistivities on the order of 10.sup.6 ohm-cm to 10.sup.9 ohm-cm are obtained according to the present process without resort to use of extrinsic dopants such as the transition metals typically used in conventional processes to obtain semi-insulating phosphorous containing layers, and without post processing annealing.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: February 1, 2000
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Quesnell J. Hartmann, Gregory E. Stillman
  • Patent number: 6015590
    Abstract: A method for growing a thin film on a substrate. A substrate is placed in a reaction space. The substrate is subjected to at least two vapor phase reactants in the form of vapor phase pulses, repeatedly and alternately. Gas within the reaction space is purged between two successive vapor phase pulses essentially entirely by use of a pump connected to the reaction space. The reaction space is purged between two successive vapor phase pulses such that less than 1% of the residual components from the first vapor phase pulse remains prior to the inflow of the second vapor phase pulse.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: January 18, 2000
    Assignee: Neste Oy
    Inventors: Tuomo Suntola, Sven Lindfors
  • Patent number: 6013130
    Abstract: Layers of compound semiconductor 60 are grown epitaxially on a substrate 40. One or more components 24 are removed from a target 14 by a supply of energy 18, and reacted with gas surrounding the target. The gas stream conveys the components through a nozzle 34 to achieve a uniform layer on the substrate.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: January 11, 2000
    Assignee: Deutsche Forschungsanstalt Fuer Luft- und Raumfahrt e.V.
    Inventors: Ralph Dieter, Hans Opower, Heinrich Weyer
  • Patent number: 6001175
    Abstract: A method and apparatus of producing a crystal by using of vapor growth process, wherein: a high-frequency coil or conductor having a coil or conductor surface to generate a plane-like induction electric field is arranged so that at least one gas blowout port is connected to the coil or conductor surface so as to face a solid substrate; and a component element or a chemical compound is continuously precipitated and grown on a surface of the solid substrate at a temperature of not higher than the melting point of the solid substrate while the solid substrate is inductively heated by the high-frequency coil or conductor and a raw gas is supplied onto the surface of the solid substrate through the gas blowout port, to thereby produce a polycrystal or monocrystal thin film.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: December 14, 1999
    Inventors: Mitsuhiro Maruyama, Yasuhiro Maruyama
  • Patent number: 6001173
    Abstract: A method of forming a smooth, continuous compound semiconductor film, e.g., a GaN film, is provided. When a GaN film is formed in accordance with this method, Ga is caused to arrive at a sapphire substrate in accordance with a first arrival rate profile over a growth period during which the film is formed, and nitrogen is caused to arrive at the substrate in accordance with a second arrival rate profile over the growth period. The first and second arrival rate profiles are such that the Ga and N are caused to arrive simultaneoulsly at the substrate over the growth period and so that (i) during an initial part of the growth period, growth of the film takes place under a stoichiometric exccess of Ga and (ii) during a subsequent part of the growth period, growth of the film takes place under a stoichiometric excess of N.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: December 14, 1999
    Assignees: Sharp Kabushiki Kaisha, University of Nottingham
    Inventors: Timothy David Bestwick, Geoffrey Duggan, Stewart Edward Hooper, Tin Sung Cheng, Charles Thomas Bayley Foxon
  • Patent number: 5980631
    Abstract: A method for manufacturing III-V semiconductor layers containing nitrogen whereby during the growth of the layers, the setting of the material sources for Al, In and Ga remains fixed. During the transition to the growth of a layer with another mixed-crystal composition, the nitrogen flow is altered. A greater nitrogen flow leads to an increased installation of the more weakly bound group III elements into the growing material.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: November 9, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Helmut Tews, Meinrad Schienle, Robert Averbeck
  • Patent number: 5938840
    Abstract: In the formation of a thin film on the surface of a semiconductor crystal substrate by using a horizontal type vapor phase growth apparatus, the distribution of the thickness and resistivity of the thin film can be properly obtained by adjusting the concentration distribution of the raw material gas in the mixture gas in the width direction of the reaction vessel over the substrate surface. And in the reaction vessel, carrier gas is supplied from the position close to the transfer port of the substrate, and raw material gas is supplied from the position located in the downstream side of a vortex generation region caused by the flow of the carrier gas.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: August 17, 1999
    Assignee: Shin-Etsu Handotai, Co., Ltd
    Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
  • Patent number: 5916365
    Abstract: The present invention provides for sequential chemical vapor deposition by employing a reactor operated at low pressure, a pump to remove excess reactants, and a line to introduce gas into the reactor through a valve. A first reactant forms a monolayer on the part to be coated, while the second reactant passes through a radical generator which partially decomposes or activates the second reactant into a gaseous radical before it impinges on the monolayer. This second reactant does not necessarily form a monolayer but is available to react with the monolayer. A pump removes the excess second reactant and reaction products completing the process cycle. The process cycle can be repeated to grow the desired thickness of film.
    Type: Grant
    Filed: August 16, 1996
    Date of Patent: June 29, 1999
    Inventor: Arthur Sherman
  • Patent number: 5902393
    Abstract: Disclosed is a method of growing 4 gallium nitride-based crystal by vapor phase epitaxy, suitable for mass production, without the necessity of thermal processing after completion of the crystal growth. The temperature of the substrate crystal immediately after completion of the crystal growth is 700.degree. C. or higher, and cooling of the substrate crystal at 700.degree. C. or lower after completion of the crystal growth is performed in an atmosphere of a hydrogen-fee carrier gas.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: May 11, 1999
    Assignee: NEC Corporation
    Inventors: Masaaki Nido, Akira Usui, Yasunori Mochizuki
  • Patent number: 5901165
    Abstract: A semiconductor laser having: a group III-V semiconductor substrate; a group III-V semiconductor clad layer disposed on the substrate with a lattice mismatch of 0.5% or more; group III-V semiconductor light propagation layers disposed on the clad layer, including an active layer and light confining layers on both sides of the active layer, the light confining layers containing Al as the group III element; a group III-V semiconductor buffer layer disposed between the substrate and the clad layer, the buffer layer including a composition graded layer gradually changing the lattice constant, and having a cross hatched step on the surface thereof; and an intermediate layer of group III-V semiconductor disposed between the buffer layer and the clad layer, the intermediate layer containing phosphorous as the group V element. A semiconductor laser of 1 .mu.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: May 4, 1999
    Assignee: Fujitsu Limited
    Inventor: Toru Uchida
  • Patent number: 5876497
    Abstract: The conventional fabrication processes of SOI substrate employed wet etching for removing a porous single-crystal Si region, but wet etching involved difficulties in management of concentration for fabricating SOI substrates in high volume, which caused reduction in productivity.Therefore, provided is a fabrication process of SOI substrate comprises a step of forming a non-porous single-crystal Si region on a surface of a porous single-crystal Si region of a single-crystal Si substrate having at least the porous single-crystal Si region, a step of bonding a support substrate through an insulating region to a surface of the non-porous single-crystal Si region, and a step of removing the porous single-crystal Si region, wherein the step of removing the porous single-crystal Si region comprises a step of performing dry etching in which an etch rate of the porous single-crystal Si region is greater than that of the non-porous single-crystal Si region.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: March 2, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadashi Atoji
  • Patent number: 5868834
    Abstract: The disclosure describes a method of manufacturing a Group II-VI compound semiconductor thin film by a vapor-phase epitaxy using an organic metal compound of Group II element and a hydride or an organic metal compound of Group VI element as the raw material, which comprises repeating alternate introduction of an organic metal compound of Group II element and a halide gas, a halogen gas or a mixture thereof; or adding a halide gas, a halogen gas or a mixture thereof to a gas for vapor-phase epitaxy.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: February 9, 1999
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Kenji Shimoyama, Toshinari Fujimori, Hideki Goto
  • Patent number: 5846321
    Abstract: A method of growing a single crystal thin film characterized by heating a silicon single crystal substrate placed in a reactor vessel, then while the temperature of the silicon single crystal substrate is 850.degree. C. or below, introducing a mixed gas composed of hydrogen fluoride gas and hydrogen gas into the reactor vessel for removing a native oxide film on a main surface of the silicon single crystal substrate in an ambient of hydrogen gas; and thereafter, growing a single crystal thin film by a vapor phase epitaxy on said main surface free from the native oxide film at a temperature of 1,000.degree. C. or below. With this method, both evaporation of a dopant caused by outdiffusion and autodoping can be suppressed with a substantial reduction of the processing time.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: December 8, 1998
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Masanori Mayusumi
  • Patent number: 5792698
    Abstract: A method of manufacturing a semiconductor light emitting device employs an MOCVD process. The method sequentially forms, on a GaAs substrate, at least an InGaAlP clad layer, an active layer, an InGaAlP clad layer, a GaAlAs or InGaAlP current diffusion layer, and a GaAlAs or InGaAlP light scattering layer. The flow-rate ratio (V/III ratio) of a V-group source gas to a III-group source gas for forming the light scattering layer is smaller than that for forming the current diffusion layer. As a result, the surface of the light scattering layer is roughened to improve light emission efficiency.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: August 11, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuhiko Nishitani
  • Patent number: 5785755
    Abstract: Disclosed are methods of preparing multilayer structures with InGaAsP layers of different compositions by metal organic vapor phase epitaxy, which result in formation of sharp heterointerfaces. After an InGaAsP well layer has been grown, the process is kept on standby with a flow of AsH.sub.3 and PH.sub.3, which are sources comprising elements of group V, at the well's composition ratios, and then with a flow of a source comprising an element of group V, including TBP (TBP/standby step), and an InGaAsP barrier layer is grown which has a smaller arsenic content than the well layer. TBP has a decomposition temperature approximately 100.degree. C. lower than PH.sub.3, and thus provides a phosphorus pressure which is five times or more as high as that of PH.sub.3 at identical growth temperatures and at identical V/III ratios.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: July 28, 1998
    Assignee: NEC Corporation
    Inventors: Takahiro Nakamura, Satoshi Ae
  • Patent number: 5755878
    Abstract: In the formation of a thin film on the surface of a semiconductor crystal substrate by using a horizontal type vapor phase growth apparatus, the distribution of the thickness and resistivity of the thin film can be properly obtained by adjusting the concentration distribution of the raw material gas in the mixture gas in the width direction of the reaction vessel over the substrate surface. And in the reaction vessel, carrier gas is supplied from the position close to the transfer port of the substrate, and raw material gas is supplied from the position located in the downstream side of a vortex generation region caused by the flow of the carrier gas.
    Type: Grant
    Filed: October 23, 1995
    Date of Patent: May 26, 1998
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
  • Patent number: 5746829
    Abstract: The invention provides a method for concentrating impurity contained in a semiconductor crystal sample 11 by irradiating repeatedly a specified position of the semiconductor crystal sample 11 with a laser beam having a specified intensity by means of a laser oscillator 13. Then the invention provides a method for analyzing impurity contained in the impurity concentrated area of the semiconductor crystal sample 11 in high sensitivity by means of a specified physical analyzing means. According to demand, a method of the invention concentrates impurity by means of a laser beam after forming an insulating film such as an oxide film and the like transparent to the laser beam on the surface of the semiconductor crystal sample. At the same time, the invention provides a concentrator and an analyzer to be used for these concentrating method and analyzing method.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: May 5, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Matsunaga, Hiroshi Yamaguchi, Mitsuhiro Tomita, Seizou Doi, Masahiko Yoshiki, Shoji Kozuka, Masayuki Onuma
  • Patent number: 5723360
    Abstract: Fine processing of InP epitaxial wafers including As, In and P for producing laser diodes, light emitting diodes or photodiodes. The InP epitaxial wafer is selectively covered with striped protection mask films. The wafer is etched by some etchant which forms normal-mesas or mountain-shaped stripes under the masks. Then the wafer is again etched by a gas of thermally dissolved AsCl.sub.3 till the stripes have rectangle sections with erect surfaces. Buried layers of InP are grown on the eliminated parts of the wafer.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: March 3, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takashi Iwasaki
  • Patent number: 5718760
    Abstract: Large single crystals of silicon carbide are grown in a furnace sublimation system. The crystals are grown with compensating levels of p-type and n-type dopants (i.e., roughly equal to levels of the two dopants) in order to produce a crystal that is essentially colorless. The crystal may be cut and fashioned into synthetic gemstones having extraordinary toughness and hardness, and a brilliance meeting or exceeding that of diamond.
    Type: Grant
    Filed: February 5, 1996
    Date of Patent: February 17, 1998
    Assignee: Cree Research, Inc.
    Inventors: Calvin H. Carter, Valeri F. Tsvetkov, Robert C. Glass
  • Patent number: 5705224
    Abstract: A vapor deposition apparatus and method in which pulse waveform light is applied to a sample sealed in a reaction chamber. The sample is exposed to gaseous material while the pulse waveform light is applied creating one or plural atomic layers. Alternate layers of plural substances or alternate multiple layers of plural substances can be formed by alternating the introduction of gaseous materials with the application of pulse waveform light.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: January 6, 1998
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Junichi Murota, Shoichi Ono, Masao Sakuraba, Nobuo Mikoshiba, Harushige Kurokawa, Fumihide Ikeda
  • Patent number: 5693139
    Abstract: A cycle of alternately or cyclically introducing external gases containing molecules of component elements of a compound semiconductor to be formed on a substrate is repeated while appropriately controlling the pressure, substrate temperature and gas introduction rate in a crystal growth vessel, so that a monocrystal which is dimensionally as precise as a single monolayer can grow on the substrate by making use of chemical reactions on the heated substrate surface.Doped molecular layer epitaxy of a compound semiconductor comprising individual steps of introducing and evacuating a first source gas, introducing and evacuating a second source gas, and introducing and evacuating an impurity gas which contains an impurity element. The doped impurity concentration varies almost linearly with the pressure during doping in a wide range.
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: December 2, 1997
    Assignees: Research Development Corporation of Japan, Jun-Ichi Nishizawa, Oki Electric Company, Soubei Suzuki
    Inventors: Junichi Nishizawa, Hitoshi Abe, Soubei Suzuki
  • Patent number: 5685904
    Abstract: The present invention is a method for making multi-quantum well structures having superior interfacial crystalline quality. In particular, it is an LP-MOCVD crystal growth method using continuous growth stages to produce well-defined heterojunctions of uniform thickness for multi-quantum well (MQW) lasers, including MQW lasers structures having output wavelengths less than approximately 1.55 .mu.m. The continuous growth stages are characterized by essentially instantaneous gas switching sequences from a first gaseous mixture used to grow separate confinement layers (SCL) and barrier layers to a second gaseous mixture used to grow quantum well layers. By continuous growth stages it is meant that there is no intentional pause between well and barrier layer growth stages, that is, the gaseous mixture used for a particular growth stage is introduced into the LP-MOCVD reactor just as the last of the previous gaseous mixture is venting out of the reactor.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: November 11, 1997
    Assignee: Lucent Technologies Inc.
    Inventor: Christopher James Pinzone
  • Patent number: 5686349
    Abstract: A thin film transistor includes: an insulating film having a surface; a semiconductor film formed on the surface of the insulating film; a source electrode and a drain electrode which are in contact with the semiconductor film; and a gate electrode which is electrically insulated from the semiconductor film. In the thin film transistor, a portion of the semiconductor film at distances of less than 500 angstroms from the surface of the insulating film contains at least silicon including a microcrystalline structure having a conductivity of 5.times.10.sup.-9 S/cm or more. Also, a method for fabricating such a thin film transistor is disclosed.
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: November 11, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yukihiko Nakata
  • Patent number: 5637531
    Abstract: A process for fabricating a multilayer crystalline structure of nitrides of metals from group III of periodic table including GaN, AlN and InN is provided. The process includes the steps of heating a group III metal (26) to a temperature T1 under an equilibrium nitrogen pressure while maintaining group III metal nitride stability to form a first crystal layer of the group III metal nitride. Thereafter the method includes the step of forming a second crystal layer (28) of the group III metal nitride by decreasing the nitrogen pressure such that the second crystal layer grows on the first layer with a growth rate slower than the growth rate of the first layer at a temperature T2 not greater than temperature T1. The second layer (28) grows on at least a portion of the first layer at a predetermined thickness under the new nitrogen pressure.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: June 10, 1997
    Assignee: High Pressure Research Center, Polish Academy
    Inventors: Sylwester Porowski, Jan Jun, Izabella Grzegory, Stanislaw Krukowski, Miroslaw Wroblewski
  • Patent number: 5624720
    Abstract: A process for forming a deposition film comprises introducing a gaseous starting material for forming a deposition film and a gaseous oxidizing agent having an oxidation action on the gaseous starting material separately into a reaction space to chemically contact these two, thereby generating a plurality of precursors including precursor in an excited state, and utilizing at least one of the generated precursors as a supply source for film-constituting members, thereby forming a deposition film on a substrate provided in a film-forming space, the deposition film being formed while supplying a bias energy to the substrate and changing the intensity of the bias energy.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: April 29, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiyuki Osada, Jun-Ichi Hanna
  • Patent number: 5593497
    Abstract: A method for forming a deposited film comprises the step of introducing a starting material (A) which is either one of a gaseous starting material for formation of a deposited film and a gaseous halogenic oxidizing agent having the property of oxidative action on said starting material into a film forming space in which a substrate having a material which becomes crystal neclei for a deposited film to be formed or a material capable of forming crystal nuclei selectively scatteringly on its surface is previously arranged to have said starting material (A) adsorbed onto the surface of said substrate to form an adsorbed layer (I) and the step of introducing a starting material (B) which is the other one into said film forming space, thereby causing surface reaction on said adsorption layer (I) to form a crystalline deposited film (I).
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: January 14, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Jinsho Matsuyama, Yutaka Hirai, Masao Ueki, Akira Sakai