Abstract: A plasma-enhanced physical vapor deposition method in which VHF power is applied to the sputter target in addition to a D.C. voltage that is also applied to the target, the VHF power level being 3.5 kW or greater, so that the D.C. target power may be reduced to less than 500 W while still attaining a very high ion fraction (in excess of 50%), permitting a very small workpiece-to-target spacing not exceeding a fraction (7/30) of the workpiece diameter to enhance the ionization fraction throughout the process region.

Abstract: In a suspension board, a conductor layer having a predetermined pattern is formed on the upper surface of a first insulating layer. The first insulating layer has a thick portion having a large thickness and a thin portion having a small thickness. A reinforcing layer is formed on the upper surface of the first insulating layer so as to overlap with a boundary between the thick portion and the thin portion.

Abstract: Provided is printed circuit board for minimizing dielectric losses experienced by a low-current portion of an electric circuit. The printed circuit board includes a first substrate supporting an electrically-conductive material patterned to form a conductive pathway between electric circuit components, and a surface-mount guard pad provided on a substantially-planar exposed surface of the first substrate and covering at least an area of the exposed surface including a footprint of the low-current portion on the first substrate. A second substrate is also provided with one or more electrically conductive pads that are surface mounted to the guard pad to couple the second substrate to the guard pad. The second substrate also supports a signal trace included in the low-current region for conducting a low-current signal.

Abstract: A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure. The upper stack structure has a thickness and has an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film. The lower stack structure has a thickness and has a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film. A ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.2.

Abstract: Disclosed are composite build-up materials for the manufacture of printed circuit boards, IC substrates, chip packages and the like. The composite build-up materials are suitable for embedding circuitry such as microvias, trenches and pads. The composite build-up materials comprise a carrier layer (1), a resin layer without reinforcement (2), and a resin layer with reinforcement (3). The circuitry (9) is embedded into the resin layer without reinforcement (2).

Abstract: A microelectronics device includes a first substrate, first electrodes disposed on the first substrate, an insulating layer covering the first electrodes, the insulating layer including openings on the first electrodes, and an anisotropic conductive film on the insulating layer, the anisotropic conductive film including conductive particles electrically connected to the first electrodes through the openings.

Abstract: An electronic component assembly comprises a printed component structure comprising at least one of a semiconducting ink, an insulating ink and a conducting ink deposited onto a substrate. The component structure defining at least one contact area, with a connecting lead disposed against or adjacent to the contact area. At least one layer of electrically insulating material encloses the component structure. At least one of the substrate and the layer of electrically insulating material comprises packaging material. The component structure can be printed on a substrate such as paper or another soft material, which is secured to a layer of insulating packaging material such as polyethylene. Instead, the substrate can be the insulating packaging material itself. Variations using hard and soft substrates are possible, and various examples of electronic component assembly are disclosed.

Abstract: A printed wiring board includes an insulative substrate, a wiring portion which is formed on a surface of the insulative substrate and has a predetermined wiring pattern, an insulative layer which is formed on the wiring portion and on which a part of the wiring layer is exposed as a terminal, a radiator plate provided on another surface of the insulative substrate, and a heat conductive portion which is formed inside the through hole penetrating through the surface and the other surface of the insulative substrate and connected to the wiring portion.

Abstract: A multilayer printed wiring board has a core substrate including first insulation layers, first conductive patterns formed on the first insulation layers, and first via conductors formed through the first insulation layers and connecting the first conductive patterns, and a buildup layer formed on the core substrate and including second insulation layers, second conductive patterns formed on the second insulation layers, and second via conductors formed through the second insulation layers and connecting the second conductive patterns. Each of the first insulation layers includes an inorganic reinforcing fiber material, each of the second insulation layers does not include an inorganic reinforcing fiber material, and the core substrate includes an inductor having the first conductive patterns and the first via conductors.

Abstract: Provided is a method for manufacturing a printed circuit board. The method for manufacturing a printed circuit board includes preparing an insulation board, irradiating a laser onto a graytone mask to each a surface of the insulation board, thereby forming a circuit pattern groove and a via hole at the same time, and filling the circuit pattern groove and the via hole to form a buried circuit pattern and the via. Thus, the circuit pattern groove and the via hole may be formed using the graytone mask at the same time without performing a separate process for forming the via hole. Therefore, the manufacturing process may be simplified to reduce the manufacturing costs.

Abstract: Embodiments of the present disclosure relate to the field of printed circuit boards and particularly to a multi-layer printed circuit board. The multi-layer printed circuit board includes at least two inner-layer circuit boards, each of which has a non-circuit pattern area including a welding area. Each welding area has at least one welding hole. Further, at least one prepreg is used to fill between two adjacent inner-layer circuit boards and is melted to fill into the welding hole in a welding process. In the multi-layer printed circuit board according to the embodiments of the disclosure, a welding area is arranged in a non-circuit pattern area, and one or more welding holes are arranged in the welding area so that a prepreg between two inner-layer circuit boards can be melted filling into the welding hole(s) in a welding process, thus enhancing effectively an adhesive force binding the inner-layer circuit boards.

Abstract: A multi-layer printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a second electrically-insulating layer, and a first electrically-conductive layer disposed between the first and second electrically-insulating layers. The second layer includes a third electrically-insulating layer and a second electrically-conductive layer. The first layer stack and/or the second layer stack include a cut-out area defining a void that extends therethrough.

Abstract: A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area.

Abstract: A moisture-resistant electronic device includes at least one electronic component at least partially covered by a moisture-resistant coating. The moisture-resistant coating may be located within an interior of the electronic device. The moisture-resistant coating may cover only portions of a boundary of an internal space within the electronic device. A moisture-resistant-coating may include one or more discernible boundaries, or seams, which may be located at or adjacent to locations where two or more components of the electronic device interface with each other. Assembly methods are also disclosed.

Abstract: Band electrode arrays, methods of manufacturing, and a method of using are disclosed. The arrays have individually addressable band electrodes such that diffusion layers of the band electrodes overlap. An exemplary method of manufacturing may comprise: a first insulating layer is disposed on a substrate; a first band electrode is disposed on the first insulating layer; a second insulating layer is disposed on the first insulating layer and completely covers the first band electrode; a second band electrode is disposed on the second insulating layer; a third insulating layer is disposed on the second insulating layer and completely covers the second band electrode; the first and second band electrodes are electrically insulated from each other and individually addressable; cross-sectional surfaces of the first and second band electrodes are exposed on the test surface; and these exposed cross-sectional surfaces substantially overlap each other in a direction perpendicular to the substrate.

Abstract: A printed wiring board includes a core substrate, a first conductive pattern formed on the substrate, an insulation structure having a first insulation layer and formed on the substrate such that the first insulation layer covers the first pattern, a second conductive pattern formed on the structure, and a second insulation layer formed on the structure such that the second insulation layer covers the second pattern. The structure has a via conductor connecting the first and second patterns through the first insulation layer, the first insulation layer includes a first layer containing a reinforcing fiber material and a second layer formed on the first layer such that the first layer is on the substrate side and a second layer is on the second insulation layer side, and the second layer is made of an insulating material which is the same material as an insulating material forming the second insulation layer.

Abstract: A method of manufacturing a multi-layer circuit board includes: forming a first circuit layer on a first surface of a first prepreg; stacking a second prepreg on a first surface of the first circuit layer; and forming at least one of a second or a third circuit layer on at least one of a first surface of the second prepreg and a second surface opposite of the first surface of the first prepreg, wherein, in the stacking of the first prepreg, the first prepreg and the second prepreg are semi-cured.

Abstract: An integrated structure for interconnection of electrical components is provided. In one embodiment, the integrated structure includes a through mold via (TMV) module having a substrate and at least one component coupled to the substrate. A flexible printed circuit board (flex-PCB) is integrated with the substrate of the TMV module. A TMV is provided through a body of the module to allow the flex-PCB to couple with a logic board.

Abstract: Disclosed are embodiments of a structure with a metal silicide transparent conductive electrode, which is commercially viable, robust and safe to use and, thus, optimal for incorporation into devices, such as flat panel displays, touch panels, solar cells, light emitting diodes (LEDs), organic optoelectronic devices, etc. Specifically, the structure can comprise a substrate (e.g., a glass or plastic substrate) and a transparent conducting film on that substrate. The transparent conducting film can comprise a metal silicide nanowire network. For example, in one embodiment, the metal silicide nanowire network can comprise multiple metal silicide nanowires fused together in a disorderly arrangement so that they form a mesh. In another embodiment, the metal silicide nanowire network can comprise multiple metal silicide nanowires patterned so that they form a grid. Also disclosed herein are various different method embodiments for forming such a structure.

Abstract: A packaging substrate is provided, which includes: a core layer having opposite first and second surfaces; two circuit layers formed on the first and second surfaces, respectively; a plurality of conductive through holes penetrating the core layer and electrically connected to the first and second circuit layers; two insulating protection layers disposed on the first and second surfaces of the core layer and the circuit layers; and a carrier attached to one of the insulating protection layers for preventing cracking of the packaging substrate during transportation or packaging.

Abstract: A multi-layered printed circuit board and a method of manufacturing the multi-layered printed circuit board are disclosed. The multi-layered printed circuit board in accordance with an embodiment of the present invention includes: an insulation layer; an inner-layer pad disposed inside the insulation layer; an inner-layer circuit wiring disposed inside the insulation layer and formed to be thinner than that of the inner-layer pad; a via connected with the inner-layer pad by penetrating the insulation layer; and an outer-layer circuit wiring formed on an outside surface of the insulation layer.

Abstract: A card structure includes a first substrate, a second substrate, and a connector. The first substrate includes a base surface, wherein at least one electronic part region and a terminal region are disposed on the base surface. The second substrate is disposed on the base surface and is coupled to the terminal region of the first substrate. The connector is disposed on the base surface to juxtapose the second substrate. The connector includes a connecting surface, a contact unit, and a plurality of contact regions disposed on the connecting surface and coupled to the contact unit and the terminal region, such that the plurality of contact regions are coupled to the second substrate via the terminal region of the first substrate.

Abstract: A laminated body of the present invention includes a resin layer in which a core portion composed of a fiber base member having a thickness of 25 ?m or less is embedded, the resin layer having two surfaces, and the resin layer through which at least one via-hole is adapted to be formed, and a metal layer bonded to at least one of the two surfaces of the resin layer, and the metal layer having at least one opening portion provided so as to correspond to the via-hole to be formed. Further, a method of manufacturing a substrate of the present invention includes preparing the above laminated body, forming the via-hole so as to pass through the resin layer by irradiating a laser beam onto the resin layer, and removing the metal layer from the resin layer after the via-hole is formed. Further, a substrate of the present invention is manufactured by using the above method. Furthermore, a semiconductor device of the present invention includes the above substrate, and a semiconductor element mounted on the substrate.

Abstract: A flexible circuit assembly can include a base layer, a plurality of circuit traces and an insulative layer. The plurality of circuit traces can each be coupled to a pair of circuit pads, and the circuit traces can be formed on an upper side of the base layer. The insulative layer can be formed over the circuit traces to isolate the circuit traces from an external environment. The base layer, plurality of circuit traces and insulative layer can form a flexible circuit sheet. The base layer and the insulative layer can include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device.

Abstract: Disclosed herein is a printed circuit board, including: a core layer; and a plurality of circuit layers stacked on the core layer, wherein one of the circuit layers includes a mesh pattern and a solid pattern, and another of the circuit layers include a first signal pattern opposite to the mesh pattern and a second signal pattern opposite to the solid pattern, the second signal pattern having a high-speed signal line with a higher speed, as compared with the second signal pattern.

Abstract: A circuit board having a removing area is provided. The circuit board includes a first dielectric layer, a first laser resistant structure disposed on the first dielectric layer and located at the periphery of the removing area, a second dielectric layer disposed on the first dielectric layer, a circuit layer disposed on the second dielectric layer, a second laser resistant structure disposed on the second dielectric layer and located at the periphery of the removing area, and a third dielectric layer disposed on the second dielectric layer. The second laser resistant structure is insulated from the circuit layer. There is a gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on a first surface overlaps the first laser resistant structure. The third dielectric layer exposes the portion of the circuit layer within the removing area.

Abstract: A thin layer substrate has a plurality of micron sized electrically conductive whisker components which are arranged in parallel and extending from one surface of the substrate to another surface to provide electrically conductive paths though the substrate. Such a substrate may be usable for micron sized LEDs.

Abstract: A cable in one embodiment comprises a plurality of leads; and an electrostatically dissipative adhesive operatively electrically coupling the leads together, the adhesive comprising a mixture of an adhesive material and electrically conductive particles intermixed with the adhesive material. A method in one embodiment comprises applying an electrostatically dissipative adhesive to exposed leads of a cable for operatively electrically coupling the leads together, the adhesive comprising a mixture of an adhesive material and electrically conductive particles intermixed with the adhesive material. Additional embodiments are presented.

Abstract: The disclosure discloses a wireless terminal with a reduced Specific Absorption Rate (SAR) peak. The wireless terminal comprises a Printed Circuit Board (PCB), wherein a fractal gap is formed at an edge of a metal ground on the PCB to disturb distribution of induced current at the edge of the metal ground. The disclosure also discloses a method for reducing an SAR peak. On the premise of the non-influence on the communication quality of the wireless terminal, the SAR and the production cost can be reduced and the structure space of wireless terminal can be saved by using the wireless terminal and the method.

Abstract: A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.

Abstract: An electronic component-embedded printed circuit board and a method of manufacturing the same. The printed circuit board includes a base substrate including a hollow electronic component case, an electronic component inserted into the electronic component case, circuit pattern layers formed on upper and lower surfaces of the base substrate, and an insulating layer formed to cover the circuit pattern layers. Accordingly, since the printed circuit board includes the electronic component case formed therein and the electronic component is inserted into only the printed circuit board, which has no defect after manufacture and final inspection of the printed circuit board, component loss due to yield of the printed circuit board can be reduced.

Abstract: A method for manufacturing an electronic substrate structure comprising a substrate, a glass layer, and a conductive layer. This method may include the steps of arranging the glass layer on the substrate, arranging the conductive layer that includes a precious metal particle on the glass layer while directly contacting the glass layer, and heating the glass layer together with the conductive layer at a temperature that is lower than a softening point of the glass layer so that the particle is put into the glass layer. The particle has a diameter of not less than 1 ?m and not more than 10 ?m.

Abstract: A multi-layer circuit board having a connector portion of an inner layer substrate being exposed, the multi-layer circuit board comprising: an inner layer substrate in which an inner layer circuit is formed, the inner layer circuit including the connector portion; and an outer layer substrate having an outer layer circuit formed on an insulating layer and having a region corresponding to the connector portion peeled off, an inner layer circuit side of the inner layer substrate and an insulating layer side of the outer layer substrate being adhered to one another via an adhesive layer so as to face one another, and a conductor layer other than the connector portion of the inner layer circuit being adhered to the outer layer substrate directly by the adhesive layer.

Abstract: A capacitive touch panel sensor in which waviness generated in a film furnished with a transparent electrode pattern can be small. The touch panel sensor according to the present invention includes a first film, a first transparent electrode pattern formed on the first film, a first adhesive layer laminated on the first film so as to cover the first transparent electrode pattern, a second film laminated on the first adhesive layer, a second adhesive layer laminated on the second film, a third film laminated on the second adhesive layer, and a second transparent electrode pattern formed on the third film, wherein Da/Db is 0.5 to 0.9 where a total thickness of the second film and the second adhesive layer is Da, and a distance between the first transparent electrode pattern and the second transparent electrode pattern is Db.

Abstract: An embedded multilayer printed circuit board includes first, second and third circuit substrates, and a flexible circuit substrate. The first circuit substrate includes a first base layer and a first electrically conductive layer. The second circuit substrate includes a second base layer and a second circuit layer. The second circuit substrate also defines a receiving hole. The third circuit substrate includes a third circuit layer, a third base layer, a fourth circuit layer, and an electronic element mounted on the third circuit layer. The third circuit layer and the fourth circuit layer are formed on the opposite sides of the third base layer. The electronic element is received in the receiving hole. The flexible circuit substrate includes a flexible base layer and a flexible circuit layer. The first circuit layer is electrically connected to the fourth circuit layer by the flexible circuit layer.

Abstract: A method has been described for making an electrical structure having an air dielectric and includes forming a first subunit including a sacrificial substrate, an electrically conductive layer including a first metal on the sacrificial substrate, and a sacrificial dielectric layer on the sacrificial substrate and the electrically conductive layer. The method further includes forming a second subunit including a dielectric layer and an electrically conductive layer thereon including the first metal, and coating a second metal onto the first metal of one or more of the first and second subunits. The method also includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate and sacrificial dielectric layer to thereby form the electrical structure having the air dielectric.

Abstract: A multilayer circuit board is provided, which includes multiple core boards stacked together. The core board includes an insulation layer and at least one conductor layer attached together. The conductor layer includes a circuit. The core board has at least one identification conductor disposed at an edge of at least one conductor layer. The identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards. The identification patterns of the multiple core boards are different from each other on the side surface of the multilayer circuit board along the stacking direction of the core boards. A manufacturing method of the multilayer circuit board is further provided.

Abstract: Printed circuit boards are provided with embedded components. The embedded components may be mounted within recesses in the surface of a printed circuit board substrate. The printed circuit board substrate may have grooves and buried channels in which wires may be mounted. Recesses may be provided with solder pads to which the wires may be soldered or attached with conductive adhesive. An integrated switch may be provided in an opening within a printed circuit board substrate. The integrated switch may have a dome switch member that is mounted within the opening. A cover member for the switch may be formed from a flexible layer that covers the dome switch member. Terminals for the integrated switch may be formed from conductive structures in an interior printed circuit board layer. Interconnects may be used to electrically connect embedded components such as switches, integrated circuits, solder pads for wires, and other devices.

Abstract: Provided is a flexible electronic assembly that uses no solder. Components or component packages are mounted on a flexible substrate. Vias connect through the substrate to the components' leads. Circuits are formed on the opposite side of the substrate interconnecting the component through the vias. The assembly is made flexible by removing encapsulent material between components.

Abstract: A ceramic printed circuit board (PCB) structure includes a ceramic substrate, silver paste layers and nano-enamel layers. A first silver paste layer of the silver paste layers is provided on the ceramic substrate. The other silver paste layers of the silver paste layers and the nano-enamel layer of the nano-enamel layers are interleaved with each other, and each silver paste layer consists of a circuit pattern for electrically connecting a plurality of electrical elements. Each nano-enamel layer except the last nano-enamel layer of the nano-enamel layers consists of an interlayer electrical connection line for electrically connecting two corresponding circuit patterns on two adjacent nano-enamel layers so as to form the ceramic PCB structure with a multilayer of circuit patterns. The working temperature and the electrical insulation are thus greatly improved.

Abstract: A structure for wireless communication having a plurality of conductor layers, an insulator layer separating each of the conductor layers, and at least one connector connecting two of the conductor layers wherein an electrical resistance is reduced when an electrical signal is induced in the resonator at a predetermined frequency.

Abstract: A multilayer wiring board includes inner-layer wiring boards each having wirings on both sides thereof; electrically insulating substrates each having through-holes filled with a conductive paste; and wirings formed in the outermost layers. The wiring boards and the electrically insulating substrates are stacked alternately in such a manner that the wirings of the wiring boards are embedded in the electrically insulating substrates at both ends of the conductive paste.

Abstract: A multiple layered apparatus and method for forming a z-axis interconnect is provided. The multiple layered apparatus comprises a protective layer, a dielectric layer, a conductive layer, and a support layer. A method for forming a z-axis interconnect using the multiple layer apparatus resulting in a thinner and less expensive structure for printed circuit board applications.

Abstract: Provided are a circuit board structure and a fabrication method thereof, including the steps of: forming a first circuit layer in a first dielectric layer and exposing the first circuit layer therefrom; forming a second dielectric layer on the first dielectric layer and the first circuit layer, and forming a second circuit layer on the second dielectric layer; forming a plurality of first conductive vias in the second dielectric layer for electrically connecting to the first circuit layer to thereby dispense with a core board and electroplated holes and thus facilitate miniaturization. Further, the first dielectric layer is liquid before being hardened and is formed on the first dielectric layer that enhances the bonding between layers of the circuit board and the structure.

Abstract: A wiring method is provided in which an insulating layer is formed on a surface of a semiconductor device 1 of which a plurality of connecting terminals are exposed, a resin film is formed on a surface of the insulating layer, a groove of a depth equal to or exceeding a thickness of the resin film is formed from a surface side of the resin film so that the groove passes in a vicinity of connecting terminals that are to be connected, and furthermore communicating holes which reach the connecting terminals to be connected from this portion that groove passes in the vicinity thereof are formed.

Abstract: A glazing and a process for manufacturing such a glazing, the glazing integrating a conducting wire, wherein a surface of the glazing includes a substrate made of a polymer material wherein the conducting wire is partly sunken and at the very most flush with the surface of the polymer material, or a substrate made of mineral glass or made of a polymer material onto which the conducting wire is adhesively bonded. The glazing can be applied in a transport vehicle, building trades, street furniture, interior fittings, electrical goods or electronics.

Abstract: In one embodiment of the present invention, a high frequency circuit board includes a laminate having a top surface with a groove; a semi-rigid cable positioned in the groove of the laminate; and a passivation layer filling the groove; wherein the semi-rigid cable is configured to transmit a high frequency signal, and the semi-rigid cable comprises a central conductor, an outer conductor, and an insulating layer between the central conductor and the outer conductor.

Abstract: In a multilayer board, a stacked body includes thermoplastic resin films and low-fluidity resin films with conductive patterns, which are alternately stacked. The stacked body and a resin base film are integrated by hot pressing. The base film has a terminal-connecting through hole for receiving an electrode terminal of an electronic component to be connected to a conductive pattern of the low-fluidity resin film disposed at an end of the stacked body. An electronic component mounting section of the stacked body, which is an area corresponding to the electronic component mounted on the base film in a stacking direction, is configured such that a number of the conductive patterns located in a corresponding section that corresponds to the through hole in the stacking direction is greater than a number of the conductive patterns located in a non-corresponding section without corresponding to the through hole in the stacking direction.

Abstract: In a circuit board, a laminate includes a plurality of laminated insulating material layers made of a flexible material. First external electrodes are provided on an upper surface of the laminate, and an electronic component is mounted thereon. Second external electrodes are provided on a lower surface of the laminate and mounted on a wiring board. An internal conductor is provided between first and second adjacent insulating material layers, fixed to the first insulating material layer, and not fixed to the second insulating material layer. The internal conductor is arranged so as to extend across regions obtained by connecting certain ones of the second external electrodes to certain ones of the first external electrodes located closest to the certain ones of the second external electrodes.

Abstract: The present invention relates to a terminal-integrated package method for a metal base package module that can effectively prevent short-circuit or breakage by not using wire bonding for connection with an external circuit.