With Encapsulated Wire Patents (Class 174/251)
  • Publication number: 20140008105
    Abstract: A circuit board is formed such that a printed circuit board is connected to an injection molded circuit board. An internal circuit conductor is exposed at conductor part at a printed circuit board mounting part. Through holes are provided in the printed circuit board. The conductor part is formed substantially perpendicular to the circuit board mounting part, and is inserted into a through hole. A female screw part is formed in the vicinity of the conductor part in the printed circuit board mounting part. The female screw part can be screwed together with a bolt, which is a securing member. The printed circuit board is connected to the conductor part by solder. A hole is formed in advance in the vicinity of the solder on the printed circuit board. The bolt passes through the hole and is secured to the female screw part.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicants: FURUKAWA AUTOMOTIVE SYSTEMS INC., FURUKAWA ELECTRIC CO., LTD.
    Inventors: Kyutaro ABE, Hiroyuki FUKAI, Yasushi KIHARA, Juro UTSUMI, Naomi TAKAHASHI
  • Publication number: 20140000940
    Abstract: A wiring board includes an insulating substrate having a side surface including a protrusion portion or a recess portion and a lower surface having a metal member bonded thereto; a wiring conductor embedded in the insulating substrate and having an exposed portion partially exposed above the protrusion portion or the recess portion from the side surface of the insulating substrate; and a metal member bonded to the lower surface of the insulating substrate. It is possible to suppress occurrence of ion migration between the wiring conductor and the metal member by increasing a distance between the exposed portion and the metal member without increasing a thickness of the wiring board.
    Type: Application
    Filed: October 27, 2011
    Publication date: January 2, 2014
    Applicant: KYOCERA CORPORATION
    Inventors: Yurie Onitsuka, Yousuke Moriyama
  • Patent number: 8618420
    Abstract: In some embodiments, a printed circuit board (PCB) comprises a substrate comprising an insulating material. The PCB further comprises a plurality of conductive tracks attached to at least one surface of the substrate. The PCB further comprises a multi-layer coating deposited on the at least one surface of the substrate. The multi-layer coating (i) covers at least a portion of the plurality of conductive tracks and (ii) comprises at least one layer formed of a halo-hydrocarbon polymer. The PCB further comprises at least one electrical component connected by a solder joint to at least one conductive track, wherein the solder joint is soldered through the multi-layer coating such that the solder joint abuts the multi-layer coating.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: December 31, 2013
    Assignee: Semblant Global Limited
    Inventors: Mark Robson Humphries, Frank Ferdinandi, Rodney Edward Smith
  • Patent number: 8614397
    Abstract: In a circuit device of the present invention, the lower surface side of a circuit board is covered with a second resin encapsulant, and the upper surface side and the like of the circuit board are covered with a first resin encapsulant. Since heat dissipation to the outside of the circuit device is achieved mainly through the second resin encapsulant, a particle size of filler contained in the second resin encapsulant is made larger than a particle size of filler contained in the first resin encapsulant. Heat dissipation to the outside of the circuit device is greatly improved.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: December 24, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Katsuyoshi Mino, Akira Iwabuchi, Ko Nishimura, Masami Motegi
  • Publication number: 20130333923
    Abstract: A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.
    Type: Application
    Filed: June 13, 2012
    Publication date: December 19, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mihaela Balseanu, Stephan A. Cohen, Alfred Grill, Thomas J. Haigh, JR., Son V. Nguyen, Mei-Yee Shek, Hosadurga Shobha, Li-Qun Xia
  • Publication number: 20130333924
    Abstract: A laminated multilayer electronic support structure comprising a dielectric with integral vias and feature layers and further comprising a planar metal core characterized by a thickness of less than 100 microns.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 19, 2013
    Inventors: Dror Hurwitz, Alex Huang
  • Publication number: 20130334694
    Abstract: A packaging substrate is provided, including: a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for defining a second core circuit layer therebetween, each of the first and second openings has a wide outer portion and a narrow inner portion, and the inner portion of each of the second openings is in communication with the inner portion of a corresponding one of the first openings; a first encapsulant formed in the first openings; a second encapsulant formed in the second openings; and a surface circuit layer formed on the first encapsulant and the first core circuit layer. The present invention effectively reduces the fabrication cost and increases the product reliability.
    Type: Application
    Filed: October 4, 2012
    Publication date: December 19, 2013
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ching Ho, Yu-Chih Yu, Ying-Chou Tsai
  • Patent number: 8609995
    Abstract: Disclosed is a manufacturing method of a multilayer wiring board. The multilayer wiring board includes an outer resin insulation layer made of an insulating resin material, containing a filler of inorganic oxide and having an outer surface defining a chip mounting area to which an electronic chip is mounted with an underfill material filled in between the outer resin insulation layer and the electronic chip and holes through which conductor parts are exposed. The manufacturing method includes a hole forming step of forming the holes in the outer resin insulation layer by laser processing, a desmear treatment step of, after the hole forming step, removing smears from inside the holes of the outer resin insulation layer, and a filler reducing step of, after the desmear treatment step, reducing the amount of the filler exposed at the outer surface of the outer resin insulation layer.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: December 17, 2013
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Satoshi Hirano, Yuuki Shiiba
  • Publication number: 20130329382
    Abstract: The flexible printed circuit board includes a plane part, a plurality of bending parts extending and bent from the plane part, wherein each of the plane part and the bending parts includes a base film, a wiring pattern, a cover film and a wiring pattern of the plane part and wiring patterns of the bending parts are electrically connected to each other. The display device including a display panel; one or more flexible printed circuit board electrically connected to the display panel; a main driving printed circuit board electrically connected to the flexible printed circuit board, wherein the one or more flexible printed circuit board includes a first part, a plurality of second parts extending from the first part, and each of the first parts and the second parts includes a base film, a wiring pattern, a cover film disposed on the base film and the wiring pattern.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 12, 2013
    Inventor: Chang Sub Jung
  • Publication number: 20130319730
    Abstract: A fabric-type multilayer PCB and a manufacturing method thereof are provided. The method electrically connects first and second circuit patterns by compressing the first and second unit circuits with a conductor therebetween to introduce the conductor into an insulating layer, and thus can save on manufacturing cost and achieve more precise junction. Also, the fabric-type multilayer PCB includes a conductor that is formed on a fabric material, and directly joined to the first and second circuit patterns to electrically connect the first and second circuit patterns, and thus enables efficient electrical connection. Moreover, even when a shape is deformed by the torsion of flexible fabrics, an electrical connection can be maintained.
    Type: Application
    Filed: November 28, 2012
    Publication date: December 5, 2013
    Applicant: Electronics & Telecommunications Research Institute
    Inventors: Yong Ki SON, Ji Eun KIM, Bae Sun KIM, Sung Yong SHIN, Il Yeon CHO
  • Publication number: 20130319731
    Abstract: A printed circuit board for a semiconductor package which is capable of reducing noise by electromagnetic interference (EMI), including: an upper circuit layer in which a first circuit pattern is formed; an intermediate circuit layer that is disposed below the upper circuit layer and has a second circuit pattern formed therein; a lower circuit layer that is disposed below the intermediate circuit layer and has a third circuit pattern formed therein; an insulating layer disposed between the first and second circuit patterns and between the second and third circuit patterns; vias that vertically connect the first, second and third circuit patterns; and EMI blocking vias that are arranged along edge portions of the first, second and third circuit patterns and are connected to a ground layer.
    Type: Application
    Filed: March 18, 2013
    Publication date: December 5, 2013
    Applicant: STS Semiconductor & Telecommunications Co., Ltd.
    Inventor: Yun Im Lee
  • Publication number: 20130313004
    Abstract: A package substrate includes a solder resist layer having a level surface, a circuit pattern buried in the solder resist layer, and a bump protruding from the solder resist layer.
    Type: Application
    Filed: July 30, 2013
    Publication date: November 28, 2013
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Yong AN, Chang-Sup Ryu, Jong-Kuk Hong
  • Publication number: 20130313003
    Abstract: A multilayer wiring board includes a first dielectric layer, a high-frequency signal line formed on a first surface of the first dielectric layer, a ground layer formed on a second surface of the first dielectric layer, and a second dielectric layer covering part of the ground layer. The high-frequency signal line is electrically connectable to a center conductor of a coaxial structure. The second dielectric layer is spaced from an edge of the first dielectric layer to which the coaxial structure is to be connected, so that a ground exposure portion of the ground layer is exposed on the edge of the first dielectric layer. The ground layer is electrically connectable directly to an outer conductor of the coaxial structure at the ground exposure portion.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 28, 2013
    Applicant: WAKA MANUFACTURING CO., LTD.
    Inventors: Hiroshi Okayama, Toru Takada
  • Publication number: 20130313002
    Abstract: A method for manufacturing a multilayer printed circuit board includes the step as follows: providing a glass wiring substrate, the glass wiring substrate comprising a first electrically conductive pattern, a glass base, and a second electrically conductive pattern, the second electrically conductive pattern comprising a plurality of first solder pads; laminating a first lamination substrate onto the glass wiring substrate, the first lamination substrate comprising a first base layer and a first electrically conductive material layer on the first base layer, such that the first base layer is sandwiched between the first electrically conductive pattern and the first electrically conductive material layer; patterning the first electrically conductive material layer to form a third electrically conductive pattern, and electrically connecting the third electrically conductive pattern to the first electrically conductive pattern, and forming a first solder mask on the glass wiring substrate, thereby obtaining a mu
    Type: Application
    Filed: August 1, 2012
    Publication date: November 28, 2013
    Applicant: ZHEN DING TECHNOLOGY CO., LTD.
    Inventor: SHIH-PING HSU
  • Publication number: 20130314954
    Abstract: One embodiment of a power supply input routing apparatus can include a multilayer printed circuit board configured to accept only an alternating current (AC) line voltage, return and ground signals. The AC power jumper board can advantageously route AC power from one section of the power supply to another without burdening the power supply design with extra layer requirements or negatively increasing power supply area. Embodiments including an electronic device having a power supply as above are also disclosed.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 28, 2013
    Applicant: Apple Inc.
    Inventors: Kevin S. FETTERMAN, Kathleen A. BERGERON, John Douglas FIELD, Edward H. FRANK, Michelle R. GOLDBERG, Harsha LAKSHMANAN, Manisha P. PANDYA, Bharat K. PATEL, Deborah Claire SHARRAH, Steve Xing-Fu ZHOU
  • Publication number: 20130306358
    Abstract: Provided is a method of manufacturing a circuit board including preparing a board structural body (11) and covering a conductor circuit element (13) on an outermost layer of the board structural body (11) with a cover film (14), wherein a heat treatment is performed while having a release material (15) interposed between the cover film (14) and a heat-processing device. The release material (15) is a laminate at least including, sequentially from the cover film toward the heat-processing device, a low friction film (16) selected from an ultrahigh-molecular-weight polyethylene film and a polytetrafluoroethylene film, a first aluminum foil (17), a first high-density polyethylene film (18a), a second high-density polyethylene film (18b), and a second aluminum foil (19). The first high-density polyethylene film (18a) and the second high-density polyethylene film (18b) are positioned such that respective MD directions are perpendicular to each other.
    Type: Application
    Filed: December 16, 2011
    Publication date: November 21, 2013
    Applicant: KURARAY CO., LTD.
    Inventors: Kazuyuki Ohmori, Tatsuya Sunamoto
  • Publication number: 20130299978
    Abstract: A wiring board and a semiconductor package are provided. The wiring board includes: a metal core including a first surface and a second surface opposite the first surface; a first buildup portion and a second buildup portion including an insulating layer and a pad pattern sequentially stacked, the first and second buildup portions being provided on the first surface and the second surface, respectively; a mask pattern including an opening exposing the pad pattern, the mask pattern being provided on the second buildup portion; and a bather pattern in an area in which a region of the metal core which overlaps with the pad pattern of the second buildup portion is removed, wherein a minimum width of an outer circumference of the barrier pattern is greater than a maximum width of the pad pattern of the second buildup portion.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In LEE, Kilsoo KIM
  • Patent number: 8581103
    Abstract: A ridge structural part made of laminated composite material incorporates electrically conducting cables, the structural part includes at least two structural layers including fibers held in place by a thermosetting or thermoplastic matrix, at least one conducting network layer located between two of the at least two structural layer, the at least one conducting network layer including a network of electrically conducting cables, said electrically conducting cables being arranged throughout said structural part in a substantially regular manner and being electrically insulated from said two structural layers by a dielectric material. The structural part also includes electrical connections, to which electrically conducting cables of the at least one network layer are electrically connected so as to form an electrical network by assembling several structural parts.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: November 12, 2013
    Assignee: European Aeronautic Defence and Space Company Eads France
    Inventor: Jesus Aspas Puertolas
  • Publication number: 20130286607
    Abstract: A circuit board includes an insulative substrate having a first surface on which an electronic component is mounted, a second surface opposite to the first surface, and a through-hole open in the first surface and the second surface, a first conductive layer formed on the first surface so as to reach the through-hole, to which the electronic component is electrically connected, a second conductive layer formed on the second surface so as to reach the through-hole and electrically connected to the first conductive layer through the through-hole, a third conductive layer formed over the second surface so as to reach the through-hole, covering at least part of the second conductive layer, and filling at least part of the through-hole, a first protective glass layer covering the second conductive layer and the third conductive layer, and an adhesive layer formed on the first protective glass layer.
    Type: Application
    Filed: April 26, 2013
    Publication date: October 31, 2013
    Applicant: KOITO MANUFACTURING CO., LTD.
    Inventors: Shinji Teraoka, Toshiyuki Tsuchiya, Nobuyuki Shimizu
  • Publication number: 20130277092
    Abstract: A joining sheet contains solder particles, a thermosetting resin, a thermoplastic resin, and a blocked carboxylic acid.
    Type: Application
    Filed: April 19, 2013
    Publication date: October 24, 2013
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hirofumi EBE, Yoshihiro FURUKAWA
  • Publication number: 20130279134
    Abstract: First and second signal wiring patterns are formed in a first conductor layer. A first electrode pad electrically connected to the first signal wiring pattern through a first via and a second electrode pad electrically connected to the second signal wiring pattern through a second via are formed in a second conductor layer as a surface layer. A third conductor layer is disposed between the first conductor layer and the second conductor layer with an insulator interposed between those conductor layers. A first pad electrically connected to the first via is formed in the third conductor layer. The first pad includes an opposed portion which overlaps the second electrode pad as viewed in a direction perpendicular to the surface of a printed board and which is opposed to the second electrode pad through intermediation of the insulator. This enables reduction of crosstalk noise caused between the signal wirings.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 24, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Seiji Hayashi, Takuya Kondo, Shoji Matsumoto
  • Patent number: 8562798
    Abstract: A physical vapor deposition reactor includes a metal sputter target, a D.C. sputter power source coupled to the metal sputter target and a wafer support pedestal facing the metal sputter target. A movable magnet array is adjacent a side of the metal sputter target opposite the wafer support pedestal. A solid metal RF feed rod engages the metal sputter target and extends from a surface of the target on a side opposite the wafer support pedestal. A VHF impedance match circuit is coupled to an end of the RF feed rod opposite the metal sputter target and a VHF RF power generator coupled to said VHF impedance match circuit. Preferably, the reactor of further includes a center axle about which the movable magnet array is rotatable, the center axle having an axially extending hollow passageway, the RF feed rod extending through the passageway.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: October 22, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Karl M. Brown, John Pipitone, Vineet Mehta
  • Publication number: 20130269984
    Abstract: Provided are a soldering device and a soldering method which allow for soldering at low cost with high yield and high reliability. The soldering device has: first organic fatty acid-containing solution bath 21 in which workpiece member 10 having a copper electrode is immersed in organic fatty acid-containing solution 31a; space section 24 having a steam atmosphere of organic fatty acid-containing solution 31b, the space section horizontally having ejection unit 33 to spray a jet stream of a molten solder to the copper electrode provided on workpiece member 10 and ejection unit 34 to spray a liquid to an excess of the molten solder for removal; and second organic fatty acid-containing solution bath 23 in which workpiece member 10 from which the excess of the molten solder is removed in space section 24 is immersed again in organic fatty acid-containing solution 31c.
    Type: Application
    Filed: April 14, 2012
    Publication date: October 17, 2013
    Applicant: TANIGUROGUMI CORPORATION
    Inventor: Katsumori Taniguro
  • Publication number: 20130269985
    Abstract: A resin composition which is capable of forming a film that has excellent heat resistance and slidability/bendability; a protective film for circuits, which uses the resin composition; and a dry film or the like which comprises the protective film are provided. Other aspects are a circuit board and a multilayer circuit board, each of which has excellent heat resistance and slidability/bendability. Furthermore, a protective film for circuit boards is provided, which is arranged in contact with a circuit of a printed wiring board, and contains a polyoxazolidone resin that has a weight average molecular weight of 3×104 or more.
    Type: Application
    Filed: December 26, 2011
    Publication date: October 17, 2013
    Applicant: Mitsui Chemicals Tohcello, Inc.
    Inventors: Shuji Tahara, Kiyomi Yasuda
  • Publication number: 20130271930
    Abstract: Some embodiments include a method of preparing a flexible substrate assembly. Other embodiments of related methods and structures are also disclosed.
    Type: Application
    Filed: June 7, 2013
    Publication date: October 17, 2013
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona Acting for and on behalf of Arizo
    Inventors: Jesmin Haq, Scott Ageno, Douglas E. Loy, Shawn O'Rourke, Robert Naujokaitis
  • Publication number: 20130264101
    Abstract: There is provided a wiring substrate including: a core substrate including: a first core substrate including: a plate-shaped first glass substrate; and a first through electrode formed through the first glass substrate; a second core substrate including: a plate-shaped second glass substrate; and a second through electrode formed through the second glass substrate, wherein a diameter of the second through electrode is different from that of the first through electrode; and an insulating member encapsulating the first and second core substrates, and a wiring layer formed on at least one surface of the core substrate. The first and second core substrates are arranged to be separated from each other when viewed from a top.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 10, 2013
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Jun FURUICHI, Akihiko TATEIWA, Naoyuki KOIZUMI
  • Publication number: 20130264100
    Abstract: A method for manufacturing a wiring substrate includes alternately stacking first wiring patterns and first insulative layers on a first surface of a core substrate and alternately stacking second wiring patterns and second insulative layers on a second surface of the core substrate at an opposite side of the first surface. The number of the second insulative layers excluding the outermost second insulative layer differs from the number of the first insulative layers. The method further includes forming a via hole in the outermost first insulative layer to expose a portion of the outermost first wiring pattern, and exposing the outermost second wiring pattern by reducing the outermost second insulative layer in thickness. The method further includes forming a via in the via hole and forming a wiring pattern, which is connected by the via to the outermost first wiring pattern, on the outermost first insulative layer.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 10, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Akio HORIUCHI
  • Publication number: 20130256000
    Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer, a second insulation layer formed on the first insulation layer and the first conductive patterns and having an opening portion, a wiring structure accommodated in the opening portion of the second insulation layer and including an insulation layer and conductive patterns on the insulation layer, second conductive patterns formed on the second insulation layer; and a via conductor formed in the second insulation layer and connecting one of the first conductive patterns and one of the second conductive patterns.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 3, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Makoto TERUI, Daiki Komatsu, Masatoshi Kunieda
  • Publication number: 20130256001
    Abstract: A multilayer flexible substrate includes a first structural layer including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and filled vias disposed in the insulating layer; and a second structural layer provided on a principal surface of a portion of the first structural layer and including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and a filled via provided in the insulating layer. The multilayer flexible substrate includes rigid regions and a flexible region that is more flexible than the rigid regions. In the multilayer flexible substrate, the filled via disposed in the flexible region has a higher porosity than the filled via disposed in the second structural layer.
    Type: Application
    Filed: May 28, 2013
    Publication date: October 3, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Norio SAKAI, Yoshihito OTSUBO
  • Publication number: 20130258625
    Abstract: A wiring board includes a first insulation layer, a second insulation layer formed on the first insulation layer, a wiring structure interposed between the first insulation layer and the second insulation layer and including an insulation layer and conductive patterns formed on the insulation layer, second conductive patterns formed on the second insulation layer, and a via conductor formed through the second insulation layer and connected to one of the second conductive patterns on the second insulation layer.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 3, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Makoto Terui, Daiki Komatsu, Masatoshi Kunieda, Takashi Kariya
  • Publication number: 20130256002
    Abstract: The flexible printed wiring board according to the present invention includes a first flexible insulating layer, a first conductor wiring laminated on the first insulating layer, a second single-layered insulating layer laminated on the first insulating layer, as it covers the first conductor wiring, and a second conductor wiring laminated on the second insulating layer. The first conductor wiring has a thickness in the range of 10 to 30 ?m, a line width in the range of 50 ?m to 1 mm, and a line gap in the range of 50 ?m to 1 mm. The thickness from the surface of the first conductor wiring to the surface of the second insulating layer is in the range of 5 to 30 ?m. The surface waviness of the part of the second insulating layer covering the first conductor wiring is 10 ?m or less.
    Type: Application
    Filed: February 18, 2011
    Publication date: October 3, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takayoshi Ozeki, Yohsuke Ishikawa, Yoshiaki Esaki, Hiroyuki Fukusumi
  • Publication number: 20130255999
    Abstract: Described embodiments provide a conductor interface for a photovoltaic module that includes a raised feature on a bottom surface. Methods of forming such structures are also disclosed, as are photovoltaic modules containing the conductor interface.
    Type: Application
    Filed: March 20, 2013
    Publication date: October 3, 2013
    Applicant: First Solar, Inc.
    Inventors: Benyamin Buller, Stephen P. Murphy, Raymond Domsic, Wenlai Feng
  • Publication number: 20130249069
    Abstract: A circuit package is provided, the circuit package including: an electronic circuit; a metal block next to the electronic circuit; encapsulation material between the electronic circuit and the metal block; a first metal layer structure electrically contacted to at least one first contact on a first side of the electronic circuit; a second metal layer structure electrically contacted to at least one second contact on a second side of the electronic circuit, wherein the second side is opposite to the first side; wherein the metal block is electrically contacted to the first metal layer structure and to the second metal layer structure by means of an electrically conductive medium; and wherein the electrically conductive medium includes a material different from the material of the first and second metal layer structures or has a material structure different from the material of the first and second metal layer structures.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Khalil Hosseini, Joachim Mahler, Edward Fuergut
  • Publication number: 20130248227
    Abstract: Provided are a conductive film and a method of manufacturing the same. The conductive film includes a substrate, a first conductive layer formed on the substrate, and a patterned second conductive layer formed on the first conductive layer. Here, oxide layers are formed on top and side surfaces of the second conductive layer. The conductive film may prevent defects of the conductive layer caused by rapid oxidation or damage to the substrate, and increase emission uniformity.
    Type: Application
    Filed: May 15, 2013
    Publication date: September 26, 2013
    Applicant: LG CHEM, LTD.
    Inventors: Ji Hee KIM, Jung Bum Kim, Jung Hyung Lee, Min Choon Park
  • Publication number: 20130248225
    Abstract: A method of laser ablation for electrical contact to a buried electrically conducting layer in diamond comprising polishing a single crystal diamond substrate having a first carbon surface, implanting the diamond with a beam of 180 KeV followed by 150 KeV C+ ions at fluencies of 4×1015 ions/cm2 and 5×1015 ions/cm2 respectively, forming an electrically conducting carbon layer beneath the first carbon surface, and ablating the single crystal diamond which lies between the electrically conducting layer and the first carbon surface.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 26, 2013
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Bradford B. Pate, Matthew P. Ray, Jeffrey W. Baldwin
  • Publication number: 20130248226
    Abstract: A printed electrical circuit and methods for additively printing electrical circuits. Patterned layers of conductive, insulating, semi-conductive materials, and other materials are print deposited on a flexible or rigid substrate to form electrical circuits. A buffering layer is selectively deposited to cover or encapsulate these materials to comprise a comfort layer that provides a soft and comfortable interface to the skin of a wearer. The comfort layer can be selectively deposited on the same press that the conductive, insulating, semi-conductive materials, and other materials are deposited. Further, the comfort layer is selectively deposited only where it is desired and exactly where it is desired.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 26, 2013
    Inventors: David G. Sime, Richard Koble
  • Patent number: 8541687
    Abstract: A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: September 24, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Voya Markovich, Timothy Antesberger, Frank D. Egitto, William Wilson, Rabindra N. Das
  • Publication number: 20130242498
    Abstract: A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof, and the second supplemental patterned conductive layer at another side thereof.
    Type: Application
    Filed: April 11, 2013
    Publication date: September 19, 2013
    Inventors: Yonggang Li, Islam Salama, Charan Gurumurthy, Hamid Azimi
  • Publication number: 20130241590
    Abstract: A method for forming a conductive film structure is provided, which includes: providing an insulating substrate having a surface; forming a plurality of trenches in the surface of the insulating substrate, wherein the trenches are extended substantially parallel to each other; disposing the insulating substrate into a plating solution and plating conducting layers within the trenches to form a plurality of micro-wires; and stacking a plurality of the insulating substrates or winding or folding the insulating substrate along an axis substantially parallel to an extended direction of the micro-wires to form a conducting lump.
    Type: Application
    Filed: May 3, 2013
    Publication date: September 19, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Min-Chieh CHOU, Tune-Hune KAO, Jen-Hui TSAI
  • Patent number: 8536459
    Abstract: A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: September 17, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Voya Markovich, Timothy Antesberger, Frank D. Egitto, William Wilson, Rabindra N. Das
  • Patent number: 8536456
    Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second signal layer, and a third signal layer in that order and includes a first slanted via and a second slanted via. The first signal layer includes an parallel first transmission wire and a second transmission wire. The first and second transmission wires are coupled with each other and cooperatively constitute a first differential pair with an edge-coupled structure. The second signal layer includes a third transmission wire. The third signal layer includes a fourth transmission wire parallel to and coupled with the third transmission wire. The third and fourth transmission wires cooperatively constitute a second differential pair with a broadside-coupled structure. The first slanted via obliquely are interconnected between the first transmission wire and the third transmission wire. The second slanted via obliquely are interconnected between the second transmission wire and the fourth transmission wire.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: September 17, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yung-Chieh Chen, Shou-Kuo Hsu, Hsien-Chuan Liang, Shin-Ting Yen, Dan-Chen Wu
  • Publication number: 20130235545
    Abstract: In a multilayer wiring board 100 having a high-density wiring region and a high-frequency propagation region mounted in the same board, it is possible to propagate a signal frequency of 40 GHz or more in the high-frequency propagation region by using a resin material with a dissipation factor (tan ?) of less than 0.01 as a material of an insulating layer used at least in the high-frequency propagation region. The insulating layer is formed of a polymerizable composition which contains a cycloolefin monomer, a polymerization catalyst, a cross-linking agent, a bifunctional compound having two vinylidene groups, and a trifunctional compound having three vinylidene groups and in which the content ratio of the bifunctional compound and the trifunctional compound is 0.5 to 1.5 in terms of a weight ratio value (bifunctional compound/trifunctional compound).
    Type: Application
    Filed: November 10, 2011
    Publication date: September 12, 2013
    Applicants: ZEON CORPORATION, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Tadahiro Ohmi, Tetsuya Goto, Masakazu Hashimoto
  • Publication number: 20130220674
    Abstract: Provided are an adhesive composition with good storage stability, heat resistance, moisture resistance reliability, and adhesion properties; and a curl- and heat-resistant adhesive film and a wiring film using the adhesive composition. The adhesive composition contains 100 parts by weight of a phenoxy resin (A) having plural alcoholic hydroxyl groups in a side chain of the molecule thereof; 2 to 60 parts by weight of a polyfunctional isocyanate compound (B) having an isocyanate group and at least one functional group selected from vinyl, acrylate, and methacrylate groups in the molecule thereof; and 5 to 30 parts by weight of a maleimide compound (C) having plural maleimide groups in the molecule thereof or/and reaction product thereof, in which a total amount of the components (B) and (C) is from 7 to 60 parts by weight.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 29, 2013
    Applicants: HITACHI CABLE, LTD., HITACHI CABLE FINE-TECH, LTD.
    Inventors: Hitachi Cable Fine-Tech, Ltd., Hitachi Cable, Ltd.
  • Publication number: 20130223030
    Abstract: A process of copper plating a through-hole in a printed circuit board, and the printed circuit board made from such process. The process comprises: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in the vertical direction; providing a through-hole in the printed circuit board in the vertical direction such that the interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 29, 2013
    Applicant: International Business Machines Corporation
    Inventor: International Business Machines Corporation
  • Publication number: 20130213692
    Abstract: A method of fabricating a circuit board includes the following steps. A first and a second patterned conductive layer are plated on the first and the second surface of a core substrate, respectively. A first and a second extending pad are individually plated on a first and a second pad of the first and the second patterned conductive layer, respectively. A first and a second thermal-curing type dielectric layer are individually formed on the first and the second surface to cover the first and the second patterned conductive layer and the first and the second extending pad, respectively. A portion of the first and the second thermal-curing type dielectric layer respectively covering the top of the first and the second extending pad are removed. A protective film covers the second extending pad. The extending pad is removed by an etching process.
    Type: Application
    Filed: July 10, 2012
    Publication date: August 22, 2013
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Chen-Yueh Kung
  • Publication number: 20130215587
    Abstract: Provided is a multilayer wiring board including a plurality of signal layers and ground layers. The multilayer wiring board includes: a first differential wiring wired to a third signal layer; and a second differential wiring wired to a ninth signal layer disposed above the third signal layer. The multilayer wiring board includes a first differential signal via and a second differential signal via that are connected to the first differential wiring. The multilayer wiring board includes a third differential signal via which is connected to the second differential wiring and a stub of which is terminated above the third signal layer. The multilayer wiring board includes a fourth differential signal via which is connected to the second differential wiring and a stub of which is terminated above the third signal layer, the first differential wiring wired to pass between the fourth differential signal via and the third differential signal via.
    Type: Application
    Filed: November 12, 2012
    Publication date: August 22, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130213693
    Abstract: A circuit board, structural units and a manufacturing method are provided, wherein one or more high temperature lamination processes are conducted for laminating the structural units and form a multi-layered circuit board.
    Type: Application
    Filed: February 4, 2013
    Publication date: August 22, 2013
    Applicant: HTC CORPORATION
    Inventor: HTC CORPORATION
  • Publication number: 20130214397
    Abstract: A ground layer of a multilayer wiring board includes: a first clearance through which a first differential via is inserted without coming into contact with the ground layer; and a second clearance through which a second differential via is inserted without coming into contact with the ground layer. A distance between an outer edge of the first clearance on the side of the second differential via and the first differential via is set shorter than a distance between an outer edge of the first clearance on the side opposite from the second differential via and the first differential via. A distance between an outer edge of the second clearance on the side of the first differential via and the second differential via is set shorter than a distance between an outer edge of the second clearance on the side opposite from the first differential via and the second differential via.
    Type: Application
    Filed: November 12, 2012
    Publication date: August 22, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130213694
    Abstract: A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board.
    Type: Application
    Filed: March 28, 2013
    Publication date: August 22, 2013
    Applicant: IBIDEN CO., LTD.
    Inventor: Ibiden Co., Ltd.
  • Publication number: 20130215588
    Abstract: A multilayered wiring substrate that includes at least one signal layer and at least one ground layer is provided. The multilayered wiring substrate includes a first signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to one of a pair of differential signaling wires provided in the signal layer, and is formed on a first grid point; and a second signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to the other of the pair of differential signaling wires, and is formed on a second grid point that is positioned diagonally adjacent with respect to the first signal via.
    Type: Application
    Filed: February 1, 2013
    Publication date: August 22, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED