Abstract: A multilayer circuit substrate includes: a first signal line and a first ground conductor formed in a first conductive layer; and a second signal line and a second ground conductor formed in a second conductive layer, the second conductive layer facing the first conductive layer via an insulating layer. The first signal line intersects with the second signal linein a plan view of the multilayer circuit substrate, and a space between the first ground conductor and first signal line is smaller in an intersection area of the first and second signal lines than a space in a non-intersection area, and a space between the second ground conductor and second signal line is smaller in the intersection area than a space in the non-intersection area.

Abstract: A base insulating layer is formed on a suspension body. A lead wire for plating and a wiring trace are integrally formed on the base insulating layer. A cover insulating layer is formed on the base insulating layer to cover the lead wire for plating and the wiring trace. A thickness of a portion of the cover insulating layer above a region of the base insulating layer in which the lead wire for plating is formed is set smaller than the thickness of a portion of the cover insulating layer above other regions of the base insulating layer.

Abstract: The invention relates to a method for producing a substrate comprising embedded conductive metal structures or metallizations, in particular for use as printed circuit boards. The aim of the invention is to allow the buried metallization of three-dimensional, i.e. curved or angular, substrates in addition to the two-dimensional flat and level, i.e. plate-shaped, substrates. According to the invention, this is achieved in that trenches and/or recesses are dug into the substrate using laser technology, and the metal structures are then produced in the trenches and/or recesses.

Abstract: A transparent conductive film includes a substrate, a transparent conductive layer, a lead electrode, and a first connecting wire, the substrate includes a first region and a second region located on the edge of the substrate; the transparent conductive layer is embedded in the first region, the lead electrode is formed on the second region; first connecting wire is formed on the substrate and located between the transparent conductive layer and the lead electrode, thereby the conductive material of the first conductive mesh and that of second conductive mesh are electrically connected; the first connecting is arranged between the transparent conductive layer and the lead electrode for electrically connecting the transparent conductive layer and the lead electrode, which can enhance the electrical connection strength between the transparent conductive layer and the lead electrode, such that the conductivity of the conductive film is great, and the yield is improved.

Abstract: Disclosed is a stacked multilayer structure, including a first circuit layer having bumps, a plastic film stacked on the first circuit layer to fill up the space among the bumps so as to form a co-plane, and a second circuit layer formed on the co-plane and connected to the first circuit layer. The plastic film includes a glass fiber layer which is embedded and not exposed. The adhesion between plastic film and the second circuit layer is greatly improved because the glass fiber layer of the plastic film filling up the space among the bumps is not deformed and exposed outwards. Therefore, the yield and reliability of the stacked multilayer structure is increased.

Abstract: A printed wiring board includes an outermost interlayer resin insulation layer, n outermost conductive layer formed on the outermost interlayer resin insulation layer and including multiple alignment marks, a connection wiring structure connecting the alignment marks, and a solder-resist layer formed on the outermost interlayer resin insulation layer and the outermost conductive layer. The solder-resist layer has openings exposing the alignment marks, respectively, and each of the alignment marks has an electroless plated film formed on each of the alignment marks.

Abstract: The present invention relates to a conductive layer of a touch screen, the conductive layer is a mesh composed of metal wires, the mesh comprises a plurality of mesh cells, the mesh cell comprises a plurality of mesh edges and nodes formed by connecting two adjacent edges, the conductive layer comprises a sensing region and a wire region which is electrically connected to the sensing region, the sensing region comprises a plurality of first sensing patterns and a plurality of second sensing patterns, the first sensing pattern and the second sensing pattern is adjacent and electrically insulated from each other, the mesh cells in each first sensing pattern are electrically connected with each other, the mesh cells in each second sensing pattern are electrically connected with each other. The present invention further relates to a touch screen.

Abstract: A patterned transparent conductor includes a substrate and additives at least partially embedded into at least one surface of the substrate and localized adjacent to the surface according to a pattern to form higher sheet conductance portions. The higher sheet conductance portions are laterally adjacent to lower sheet conductance portions.

Abstract: A printed circuit board and method of manufacturing same, the printed circuit board comprising a stack of layers. The stack of layers being comprised of alternating circuit layers and insulating layers that are laminated together. The stack of layers includes an area with resin cured to a degree. The area has a coefficient of thermal expansion that is dependent, at least in part, on the degree of curing of the resin.

Abstract: In a component-embedded circuit substrate having a plurality of capacitors embedded therein, the capacitors are connected in parallel, inspection electrodes are formed, and the inspection electrodes connect to respective terminal electrodes of the capacitor through via conductors. At the terminal electrodes of the capacitor, the connection position of the via conductors for connecting the inspection electrodes differs from the connection position of via conductors for connecting respective terminal electrodes of the capacitor.

Abstract: This disclosure relates generally to a chip package assembly arranged to be electrically coupled to a circuit board including a plurality of circuit board contacts. The chip package assembly may include a chip package including a first side and a second side, the second side including a first plurality of contacts arranged to be electrically coupled to the plurality of circuit board contacts and a second plurality of contacts arranged to be electrically coupled to a remote device via a connector assembly.

Abstract: Imprinting tools and processes for making such tools, circuitry that includes narrow, high aspect ratio traces having reduced parasitic capacitance to adjacent circuit features and processes for making such circuitry using the imprinting tools are described.

Abstract: A multilayer printed wiring board for mounting a semiconductor element includes a core substrate, a first laminated structure on first surface of the substrate and including a conductive circuit layer on the first surface of the substrate, a resin insulating layer and the outermost conductive circuit layer, and a second laminated structure on second surface of the substrate and including a conductive circuit layer on the second surface of the substrate, a resin insulating layer and the outermost conductive circuit layer. The outermost conductive layer in the first structure has solder pads positioned to mount a semiconductor element and solder bumps formed on the pads, respectively, the outermost conductive layer in the second structure has solder pads positioned to mount a wiring board, and the outermost conductive layers in the first and second structures have thicknesses formed greater than thicknesses of the conductive layers on the surfaces of the substrate.

Abstract: A microelectronic assembly including a dielectric region, a plurality of electrically conductive elements, an encapsulant, and a microelectronic element are provided. The encapsulant may have a coefficient of thermal expansion (CTE) no greater than twice a CTE associated with at least one of the dielectric region or the microelectronic element.

Abstract: An electrically conductive composite is disclosed that includes a dielectric material having a first side and a second side, conductive particles within the dielectric material layer, and a discontinuous layer of a conductive material on a first side of the dielectric layer. The conductive particles are aligned to form a plurality of conductive paths from the first side to the second side of the dielectric material, and each of the conductive paths is formed of at least a plurality of conductive particles. The discontinuous layer includes a plurality of non-mutually connected portions that cover portions of, but not all of, the first side of the dielectric material such that exposed portions of the underlying first side of the dielectric material remain exposed through the discontinuous layer, yet the discontinuous layer facilitates the electronic coupling together of a plurality of the conductive paths from the first side to the second side of the dielectric material.

Abstract: A method for mitigating voltage stress on a PCB includes applying AC voltage to a multi-terminal condenser structure of a multi-layered PCB. The terminal condenser structure is formed by overlapping a plurality of conductive traces between board layers of the multi-layered PCB. A corresponding dielectric layer is disposed between the overlapping conductive traces of the board layers. The overlapping conductive traces include a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal and the third terminal are disposed on a first layer of the multi-layered PCB, and the second terminal and the fourth terminal are disposed on a bottom layer of the multi-layered PCB. The first terminal and the second terminal are connected to a ground point, and the third terminal and the fourth terminal are connected to the AC voltage. Voltage stresses on the PCB are mitigated utilizing the multi-terminal condenser structure.

Abstract: A high-frequency signal line includes a laminate of a plurality of insulator layers, a signal line provided on a first principal surface of one of the insulator layers, a first ground conductor provided on a second principal surface of the insulator layer provided with the signal line, the first ground conductor including openings that overlap with the signal conductor, and a second ground conductor provided in or on the laminate so as to be opposed to the first ground conductor with the signal conductor positioned therebetween.

Abstract: A printed-board includes a first conductor-layer, a second conductor-layer provided to a layer different from the first conductor-layer, an insulation-layer provided between the first conductor-layer and the second conductor-layer, a plurality of through-holes that pass through the first conductor-layer, the second conductor-layer, and the insulation-layer, and a plurality of vias that are formed in the plurality of through-holes, respectively, and couple the first conductor-layer and the second conductor-layer, each of the plurality of vias including a conductor portion that occupies part of an internal space of the through-hole, and a non-conductor portion that occupies remaining part of the internal space, wherein in a given pair of vias adjacent to each other, the conductor portion of one of the pair of vias is arranged so as to face the non-conductor portion of another one of the pair of vias.

Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.

Abstract: A wiring board includes a core structure including a core substrate, and a buildup structure formed on the core structure and including an interlayer insulating layer and a conductive layer. The interlayer insulating layer does not contain inorganic fiber and includes a resin and an inorganic filler, and the conductive layer is formed on the interlayer insulating layer such that the inorganic filler in the interlayer insulating layer is not in contact with the conductive layer.

Abstract: Embodiments of the invention provide a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.

Abstract: A conductive film includes a substrate, a first matrix layer, a first conductive layer, a second matrix layer, and a second conductive layer. The substrate includes a first surface and an oppositely arranged second surface. The first matrix layer is attached to the first surface. The first conductive layer is embedded in the first matrix layer. The second matrix layer is attached to a side of the first matrix layer away from the substrate. The second conductive layer is embedded in the second matrix layer. Due to the capacitor formed between the first conductive layer and the second conductive layer, it just needs to attach the conductive film to a glass panel when the conductive film is adopted to manufacture a touch screen, without bonding two pieces of conductive films. Therefore, the touch screen using the conductive film has a smaller thickness. In addition, a method for manufacturing the conductive film and a touch screen including the conductive film are also provided by the present disclosure.

Abstract: Various embodiments provide a chip carrier structure. The chip carrier structure may include a structured metallic chip carrier; encapsulating material at least partially filling the structure; wherein the main surfaces of the metallic chip carrier are free from the encapsulating material.

Abstract: Boric acid has been found to provide anticorrosion properties when incorporated into silver nanowire containing films. Such compounds may be incorporated into one or more silver nanowire containing layers or in one or more layers disposed adjacent to the silver nanowire containing layers.

Abstract: A printed circuit board assembly for reducing the impact of heat generated from circuitry within a handheld or non-handheld device is provided. The printed circuit board assembly may include a printed circuit board comprising a plurality of conductive layers and a plurality of dielectric layers where each dielectric layer is disposed between a pair of conductive layers. Each conductive layer may include a first portion and a second portion separated by a gap where the gaps in the alternating conductive layers are misaligned. The first portion of each conductive layer may be substantially thermally isolated from the second portion of each conductive layer.

Abstract: A wiring board with a built-in electronic component includes a core substrate having a penetrating hole formed in the core substrate, an electronic component accommodated in the penetrating hole in the core substrate, a conductive pattern layer formed on a first surface of the core substrate and including a first conductive pattern and a second conductive pattern, and an interlayer insulation layer formed over the conductive pattern layer and the first surface of the core substrate. The second conductive pattern is formed adjacent to a periphery of the penetrating hole such that the second conductive pattern is formed along an outline of the periphery of the penetrating hole.

Abstract: Some implementations provide a substrate that includes several traces, a solder resist layer covering the several traces, and a testing pad coupled to a trace from the several traces. The testing pad is at least partially exposed and at least partially free of the solder resist layer when a chip is coupled to the substrate. In some implementations, the several traces have a pitch that is 100 microns (nm) or less. In some implementations, the substrate is a package substrate. In some implementations, the package substrate is a package substrate on which a thermal compression flip chip is mounted during an assembly process. In some implementations, the testing pad is free of a direct connection with a bonding component of the chip when the chip is coupled to the substrate. In some implementations, the bonding component is one of a solder ball.

Abstract: The present invention provides a substrate for suspension that includes a first structural part including a metal supporting substrate, an insulating layer, a wiring layer, and a cover layer, and a second structural part formed so as to extend continuously from the first structural part and has no metal supporting substrate. A position of an edge of an upper surface of the insulating layer coincides with a position of an edge of the lower surface of the cover layer or the position of the edge of the upper surface of the insulating layer is positioned on a side closer to the wiring layer than to the position of the edge of the lower surface of the cover layer at a boundary region between the first structural part and the second structural part.

Abstract: A printed circuit board includes a printed circuit board, a semiconductor device mounted on the printed circuit board, a capacitor element mounted on the printed circuit board 2, a ground conductor plane to which a ground terminal of the semiconductor device is connected, and first and second power source conductor planes which are arranged so as not to contact with each other. The second power source conductor plane and the ground conductor plane are arranged so as to oppose to each other to form a planar capacitor. The printed circuit board has a first connecting conductor which connects a power source terminal of the semiconductor device with the second power source conductor plane, and a second connecting conductor which connects the first power source conductor plane with the second power source conductor plane through a first terminal of the capacitor element. Thereby, an electromagnetic radiation noise is reduced.

Abstract: A method of flattening surface of conductive structure including a substrate, a dielectric layer on the substrate, and a conductive line formed in the dielectric layer is provided. A surface of the conductive line has a recess. A cover layer is formed on the substrate. A mechanical polishing process is performed to remove a portion of the cover layer. A remaining cover layer fills and levels the recess.

Abstract: The present invention relates to a multilayer transparent conducting electrode, comprising a substrate layer (1), an adhesion layer (2), a percolating network of metal nanofilaments (3) and an electrical homogenization layer (4), the said electrical homogenization layer (4) comprising: an elastomer having a glass transition temperature Tg of less than 20° C. and/or a thermoplastic polymer having a glass transition temperature Tg of less than 20° C. and/or a polymer, an optionally substituted polythiophene conducting polymer, and nanometric conducting or semiconducting fillers.

Abstract: A packaging substrate is disclosed, which includes: an encapsulant having opposite first and second surfaces; a plurality of conductive elements embedded in the encapsulant, wherein each of the conductive elements has a first conductive pad exposed from the first surface of the encapsulant and a second conductive pad exposed from the second surface of the encapsulant; and a protection layer formed on the second surface of the encapsulant and the second conductive pads so as to protect the second surface of the encapsulant from being scratched.

Abstract: A plastic film for a multi-modal input device has conductors that link a touch module and an operating element. Such input devices, for example, are in central consoles of motor vehicles, dishwashers, washing machines, telephones, or the like. Touch modules and operating element modules are interconnected by the layout of conductors in the form of a geometrically distorted electrical matrix on a single plastic film which forms a carrier for a combined input device. The conductors are electrically insulated from each other, but capacitively coupled to crossover points in the electrical matrix, the crossover points dividing the matrix into at least two areas. Strip conductors extend from the matrix at an edge area of the matrix of the touch module and connected to the operating elements forming a geometrically distorted matrix of conductors on the plastic film.

Abstract: Moisture barrier packages for electrical components mountable to a circuit board include a cover and a base configured to provide a metal to metal joint that hermitically seals an electrical component in an enclosure defined by the cover and the base. The base may include patterned metallizations using circuit board printing techniques that facilitate connection of the electrical component to the circuit board. The base of the moisture barrier package may be configured for surface mounting of the electrical component or through-hole mounting to complete the electrical connection to the board through the base.

Abstract: The invention concerns a method for producing a microelectronic device comprising a substrate and a stack comprising at least one electrically conductive layer and at least on dielectric layer, wherein it comprises the following steps: formation, from one face of the substrate, of at least one pattern that is in depression with respect to a plane of the face of the substrate, the wall of the pattern comprising a bottom part and a flank part, the flank part being situated between the bottom part and the face of the substrate, the flank part comprising at least one inclined wall as far as the face of the substrate, formation of the stack, the layers of the stack helping to at least partially fill in the pattern, thinning of the stack at least as far as the plane of the face of the substrate so as to completely expose the edge of said at least one electrically conductive layer flush in one plane, formation of at least one electrical connection member (710, 720) on the substrate in contact with the edge of sai

Abstract: A flex circuit including a plurality of layers folded on a first fold line and folded on a second fold line is disclosed. The plurality of layers may include a first conductive layer, an insulating layer adjacent the first conductive layer, and a second conductive layer adjacent the insulating layer. The flex circuit may include a plurality of slits extending through each layer of the plurality of layers, the plurality of slits disposed on the first fold line and the second fold line.

Abstract: The present invention provides a multi-layer flexible circuit board, comprising at least an electric circuit disposed on a vertical interval layer, wherein at least two sides of the electric circuit are covered by neighboring interval layer and another vertical interval composed layer of electric insulating material. The disclosure provides a non-pressing way to stack the multi-layer flexible circuit board, preventing fault crevice derived from a prior-known pressing way.

Abstract: A flexible circuit board comprises a substrate which has a polyimide layer recessed to define at least a compartment. The compartment includes an inner wall surface having a side wall and a bottom wall. The compartment is for containing a multilayer unit, wherein the multilayer unit includes an adhesion enhancing layer formed on the wall of the compartment, a first electrically conducting layer disposed on the adhesion enhancing layer, and a second electrically conducting layer formed on the first electrically conducting layer. The adhesion enhancing layer is palladium. The first electrically conducting layer is nickel. The substrate is composed of polyimide (PI).

Abstract: There is provided a wiring board. The wiring board includes: a first insulating layer; a plurality of wiring patterns on the first insulating layer so as to be spaced apart from each other; a plating layer on at least one of the wiring patterns; a second insulating layer containing silicone therein and having an opening, wherein an outermost surface of the plating layer is exposed from the opening and serves as a connection pad; and a silica film on the outermost surface of the plating layer.

Abstract: The present invention relates to a passive layer including graphene for the attenuation of near-field electromagnetic waves and heat dissipation. The passive layer blocks electromagnetic waves radiated from an external electronic device or prevents electromagnetic waves generated in an electronic device from emitting to the outside. The passive layer is designed to reduce interference between transmission circuits of a device in the near-field region or influence such as malfunction caused by external electromagnetic waves. The present invention also relates to an electromagnetic device and a circuit board, each including the passive layer.

Abstract: A double-layered transparent conductive film includes: a first substrate; a first imprint adhesive layer formed on the first substrate, the first imprint adhesive layer defining a first mesh-shaped groove, the first mesh-shaped groove forming a first mesh; a first conductive layer including conductive material filled in the first mesh-shaped groove; a tackifier layer formed on the first imprint adhesive layer and the first conductive layer; a second substrate formed on the tackifier layer; a second imprint adhesive layer formed on the second substrate, the second imprint adhesive layer defining a second mesh-shaped groove, the second mesh-shaped groove forming a second mesh, wherein one of the first mesh and the second mesh is a regular mesh, the other is a random mesh; and a second conductive layer including conductive material filled in the second mesh-shaped groove. During the lamination, no alignment accuracy is needed, such that the production efficiency is greatly improved.

Abstract: A conductive film includes a substrate, a first conductive layer, a matrix layer, and a second conductive layer. The substrate includes a first surface and an oppositely arranged second surface. The first conductive layer is embedded in the substrate. The matrix layer is set on the first surface of the substrate. The matrix layer is formed by solidified jelly coating. The second conductive layer embedded in the matrix layer. The second conductive layer is insulated from the first conductive layer. Due to the capacitor formed between the first conductive layer and the second conductive layer, it just needs to attach the conductive film to a glass panel when the conductive film is adopted to manufacture a touch screen, without bonding two pieces of conductive films. In addition, the matrix layer, formed by solidifying the jelly painted on the substrate, is with a much smaller thickness than the substrate. Therefore, the touch screen using the conductive film has a smaller thickness.

Abstract: In the mesh pattern of the conductive sheet of the invention in which openings having different shapes are arrayed in plan view, a standard deviation of an area of each of the openings is equal to or greater than 0.017 mm2 and equal to or less than 0.038 mm2, in a two-dimensional distribution of centroid positions of the openings; a standard deviation for a root mean square deviation of each of the centroid positions which are disposed along a predetermined direction, with respect to a direction perpendicular to the predetermined direction is equal to or greater than 15.0 ?m; or a standard deviation over a radial direction of a value expressed by a common logarithm of a standard deviation along an angular direction in a power spectrum of the mesh pattern is equal to or greater than 0.965 and equal to or less than 1.065.

Abstract: Molded splitter structures and systems and methods for manufacturing molded splitter structures are disclosed.

Abstract: A multilayer wiring substrate includes a substrate main body and a plurality of wiring lines. The substrate main body includes first and second main surfaces. The plurality of wiring lines extend from the first main surface toward the second main surface side in the substrate main body. The substrate main body includes a plurality of insulator layers laminated on each other. The wiring lines each include via conductors separately provided in the plurality of insulator layers. In at least one of the plurality of wiring lines, a diameter of the via conductor provided in a first insulator layer defining the first main surface of the substrate main body is smaller than a diameter of the via conductor provided in at least one of the plurality of insulator layers other than the first insulator layer.

Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.

Abstract: An adhesive varnish includes 100 parts by mass of a component A that includes a phenoxy resin including a plurality of hydroxyl groups in a side chain, 2 to 55 parts by mass of a component B that includes a polyfunctional isocyanate compound including, in a molecule thereof, an isocyanate and at least one of a vinyl group, an acrylate group and a methacrylate group, 5 to 30 parts by mass of a component C that includes a maleimide compound including a plurality of maleimide groups in a molecule thereof or/and a reaction product thereof, a component S1 including a low-boiling point solvent having a boiling point of not more than 100° C., and a component S2 including a high-boiling point solvent having a boiling point of more than 100° C.

Abstract: Disclosed herein are transparent conductors having high thermal capacity and improved protection against electrostatic discharge.

Abstract: A data transaction apparatus includes a housing, a system circuit board comprising a tamper detection circuit disposed in the housing, and a tamper protection device configured to seal the system circuit board within the housing in a detachable manner. The tamper protection device includes a tamper resistant board and a resin layer covering the tamper resistant board, wherein the tamper resistant board includes a flexible substrate and a plurality of fence-like lead wires disposed on the flexible substrate. In one embodiment of the present disclosure, the tamper detection circuit is triggered to generate a secure response when a tamper event is detected.

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.