Convertible Shape (e.g., Flexible) Or Circuit (e.g., Breadboard) Patents (Class 174/254)
  • Patent number: 10656220
    Abstract: A display device includes a display panel, a conductive layer disposed under the display panel, a first flexible printed circuit board including a first substrate portion having a side connected to the display panel, a bending portion extending from the first substrate portion, and a second substrate portion extending from the bending portion and disposed under the conductive layer. The second substrate portion includes a first sensing pattern. The display device further includes a coupling portion disposed between the second substrate portion and the conductive layer and coupling the second substrate portion and the conductive layer. The display device further includes a driver chip electrically connected to the first sensing pattern and configured to detect whether the coupling portion has been separated from either the second substrate portion or the conductive layer based on a capacitance that depends on a distance between the conductive layer and the first sensing pattern.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: May 19, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hee Gwon Lee, Sung Un Park
  • Patent number: 10660229
    Abstract: An electrical device is provided. The electrical device includes a case, a first electrical part, a second electrical part, and a connecting portion. The case includes a first case and a second case coupled to the first case. The first electrical part is fixed to the first case. The second electrical part is fixed to the second case. The connecting portion is configured to connect a first conductor extending from the first electrical part and a second conductor extending from the second electrical part each other. Either one of the first case and the second case includes a through hole. The connecting portion is disposed so as to be entirely visible from the through hole as viewed from an outside of the case.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: May 19, 2020
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Hiroki Umeda, Kenshi Yamanaka, Shinichi Miura, Hiromi Yamasaki, Hitoshi Imura, Yutaka Morimoto, Kazuki Hayashi, Hideaki Tachibana, Yoshiki Kawaguchi
  • Patent number: 10644079
    Abstract: An organic light emitting diode display includes a stretchable substrate, a plurality of pixel forming plates, first and second pixels, and a cut-out groove. The pixel forming plates are on the substrate and spaced apart from each other. The first and second pixels are on respective first and second pixel forming plates of the plurality of the pixel forming plates adjacent in a first direction. The first and second pixel forming plates are connected by a first bridge. The cut-out groove are in the first and second pixel forming plates and adjacent to an area connected to the first bridge.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 5, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jong Ho Hong, Won Il Choi, Hye Jin Joo, Won Sang Park, Mu Gyeom Kim, Man Sik Myeong, Hyo Yul Yoon
  • Patent number: 10638607
    Abstract: A conductor connection structure for a plurality of plate-like routing members includes the plurality of plate-like routing members, a plurality of terminal members, and a circuit board. Each of the plurality of plate-like routing members has a conductor exposed part in which a strip flat conductor is exposed, at a part of an insulating coating member coating an outer circumferential surface of the strip flat conductor. Each of the plurality of terminal members has a board connecting part connected to the conductor exposed part so as to be conducted to the strip flat conductor. The circuit board includes a plurality of circuit conductors, and terminal connecting parts on the plurality of circuit conductors are respectively electrically connected to the board connecting parts.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: April 28, 2020
    Assignee: YAZAKI CORPORATION
    Inventor: Masahito Ozaki
  • Patent number: 10624207
    Abstract: A touch sensor of this disclosure includes: a printed circuit board having a connection terminal; a substrate portion having a mounting portion on which the printed circuit board is mounted; a conductive layer disposed on the mounting portion of the substrate portion; and an adhesive agent connecting the connection terminal and the conductive layer to each other. A plurality of linear projections arranged in a first direction and extending in a second direction intersecting with the first direction are disposed on a surface of the substrate portion at the mounting portion, and the conductive layer is disposed on a groove portion positioned between the linear projections disposed adjacently to each other out of the plurality of linear projections.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: April 14, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tsutomu Aisaka, Hirotoshi Watanabe, Shigeki Sato
  • Patent number: 10615351
    Abstract: A flexible display assembly, a manufacturing method thereof, and a display panel are provided. The flexible display assembly comprises a display layer, a first thin film layer, and a second thin film layer. The display layer comprises a non-bending region and a bending region. The first thin film layer comprises at least a first inorganic layer and organic layer formed sequentially in the bending region. The second thin film layer comprises and a second inorganic layer and organic layer formed sequentially in the non-bending region. A modulus difference between the first inorganic layer and the display layer is less than that between the second inorganic layer and the display layer, and/or a thickness of the first inorganic layer is less than that of the second inorganic layer; a thickness of the first thin film layer is equal to that of the second thin film layer.
    Type: Grant
    Filed: November 23, 2017
    Date of Patent: April 7, 2020
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Chen Zhao
  • Patent number: 10607939
    Abstract: Semiconductor packages are provided. A semiconductor package includes a substrate including a first bonding region, a chip region, and a second bonding region. Moreover, the substrate includes first and second surfaces that are opposite to each other. The semiconductor package includes a pad group including a pad on the first surface in the chip region. The semiconductor package includes a semiconductor chip on the pad group. The semiconductor package includes a wire connecting the pad and the second bonding region. The wire includes a portion that extends along the second surface of the substrate. Related display devices are also provided.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: March 31, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji Ah Min, Ye Chung Chung
  • Patent number: 10602645
    Abstract: Methods, systems, and apparatus, for shielding a bending portion of a flexible display that can be incorporated in electronic devices. One of the apparatus includes a cover glass element; a driver integrated circuit (D-IC); a mandrel portion; a shaft portion; a panel, positioned between the cover glass element and the D-IC, and comprising an inner panel layer that wraps around at least a portion of the mandrel portion to form a bending portion of the panel, the panel attached on either side on the shaft portion; and a shielding layer positioned around the inner panel layer and configured to inhibit electromagnetic signals through the bending portion.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: March 24, 2020
    Assignee: Google LLC
    Inventors: Qi Qi, Wonjae Choi, Yi Tao
  • Patent number: 10595431
    Abstract: A mid-plane assembly includes a main circuit board portion including a plurality of electrical connectors configured to releasably engage a plurality of devices, a first circuit board portion, and a first electrical coupling assembly configured to electrically couple the first circuit board portion to the main circuit board portion and position the first circuit board portion essentially orthogonal to the main circuit board portion.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: March 17, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Ryan C. McDaniel, Stephen E. Strickland, Brian D. Kennedy
  • Patent number: 10595402
    Abstract: Provided is a stretchable circuit board including: a stretchable base material having stretchability; a film base material overlapping with part of a one-surface-side surface of the stretchable base material and having lower stretchability than that of the stretchable base material; a stretchable wiring line formed on the one-surface-side surface of the stretchable base material; and an adhesive layer formed on one surface side or the other surface side of the stretchable base material. The adhesive layer is formed on both of an overlapping region where the stretchable base material overlaps with the film base material and a non-overlapping region where the stretchable base material does not overlap with the film base material.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: March 17, 2020
    Assignee: NIPPON MEKTRON, LTD.
    Inventor: Masayuki Iwase
  • Patent number: 10593899
    Abstract: A display device includes a display panel having a display area and a non-display area, the non-display area being disposed at a peripheral portion of the display area and having a bending area; an integrated circuit (IC) disposed in the non-display area to drive the display panel; a first layer formed between the display area and the IC and covering the bending area; and a first member covering the IC and the first layer and overlapping with the bending area.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: March 17, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventor: Kyu Bong Jung
  • Patent number: 10591789
    Abstract: A connector, a display screen and a method for manufacturing the display screen are provided. The connector includes a substrate, and a conductor structure arranged on the substrate. One end of the conductor structure is connected to a data signal line on a display panel, and the other end of the conductor structure is connected to a driver integrated circuit IC arranged on a non-display side of the display panel. A target surface, away from the substrate, of the conductor structure is uneven. The connector reduces the probability of the conductor structure breaking under the stress of the substrate, thereby guaranteeing the good display effect of the display screen.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: March 17, 2020
    Assignees: BOE Technology Group Co., Ltd, Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: Yu Zhang, Jian He, Chuan Peng, Yan Cui, Chunhui Zhu
  • Patent number: 10593502
    Abstract: Electrically continuous shielding elements for use in communication cables are described. A shielding element may include a base layer of dielectric material extending in a longitudinal direction, and a plurality of longitudinally spaced segments of electrically conductive material may be formed on the base layer. A respective fusible element may be positioned between each adjacent set of longitudinally spaced segments included in the plurality of longitudinally spaced segments. Each fusible element may provide electrical continuity between the adjacent set of longitudinally spaced segments, and each fusible element may have a minimum fusing current between 0.001 amperes and 0.500 amperes.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: March 17, 2020
    Assignee: Superior Essex International LP
    Inventors: Thibaut Oscar Lanoe, Bernhart A. Gebs, Christopher W. McNutt
  • Patent number: 10586759
    Abstract: An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: March 10, 2020
    Assignee: Invensas Corporation
    Inventors: Hong Shen, Liang Wang, Gabriel Z. Guevara, Rajesh Katkar, Cyprian Emeka Uzoh, Laura Wills Mirkarimi
  • Patent number: 10581233
    Abstract: A method of winding a flexible cable, a carrying equipment and a gimbal are provided. The method is used for electrical connection in the carrying equipment, and includes winding a multilayer flexible cable provided in layered stack on a carrier device to form a winding structure, and the winding structure includes at least one force offsetting unit including a first bending part and a second bending part bent in opposite directions.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: March 3, 2020
    Assignee: ZEROTECH (SHENZHEN) INTELLIGENCE ROBOT CO., LTD.
    Inventors: Gengpeng Liu, Hongtao Sun
  • Patent number: 10575407
    Abstract: A system for carrying out a manufacturing method of an electromechanical structure apparatus includes an entity for producing conductors on a flat film, an entity for attaching electronic elements at locations on the flat film in relation to the desired three-dimensional shape of the flat film, the electronic elements including a number of SMT components, the locations of the electronic elements on the flat film selected such that the locations omit substantial deformation during subsequent 3D forming of the flat film, an entity for forming the flat film into a three-dimensional film and an entity for injection molding.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 25, 2020
    Assignee: TACTOTEK OY
    Inventors: Mikko Heikkinen, Jarmo Sääski, Jarkko Torvinen, Paavo Niskala, Mikko Sippari, Pasi Raappana, Antti Keränen
  • Patent number: 10564784
    Abstract: A capacitive sensor having a bending portion and a flat portion and bendable in the bending portion includes a plurality of first transparent electrodes, a plurality of second transparent electrodes, a coupling member, and a bridge wiring member. The first transparent electrodes are arranged in a first direction. The second transparent electrodes are arranged in a second direction crossing the first direction. The coupling member is provided integrally with either the first transparent electrodes or the second transparent electrodes. The bridge wiring member is provided separately from the first transparent electrodes or the second transparent electrodes, to which the coupling member is not provided, in a portion where the bridge wiring member crosses the coupling member. A direction in which the coupling member extends in the bending portion is different from a direction in which the coupling member extends in the flat portion.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: February 18, 2020
    Assignee: Alps Alpine Co., Ltd.
    Inventors: Yusuke Koike, Kiyoshi Kobayashi, Hideaki Takahashi
  • Patent number: 10566394
    Abstract: Disclosed is an organic light-emitting display panel, which comprises a substrate, the substrate comprises a display region and a non-display region, wherein, the non-display region comprises: an insulating layer, which is provided on the same side as the array layer and provided with at least one groove by which the substrate is exposed; a metal layer, which comprises a first part and a second part, the first part covers the groove and contacts the substrate at the bottom of the groove, and the second part covers an outside of the groove and contacts the insulating layer; and at least one bank, contacting the second part, and wherein the bank comprises an organic material.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: February 18, 2020
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventor: Xiaobo Cai
  • Patent number: 10558308
    Abstract: A capacitive sensor bonded to a panel having a flat-surface portion and a curved-surface portion includes a plurality of first transparent electrodes, a plurality of second transparent electrodes, a coupling member, and a bridge wiring member. The first transparent electrodes are arranged in a first direction. The second transparent electrodes are arranged in a second direction crossing the first direction. The coupling member is provided integrally with either the first transparent electrodes or the second transparent electrodes. The bridge wiring member is provided separately from the first transparent electrodes or the second transparent electrodes, to which the coupling member is not provided, in a portion where the bridge wiring member crosses the coupling member. A direction in which the coupling member extends in a portion bonded to the curved-surface portion is different from a direction in which the coupling member extends in a portion bonded to the flat-surface portion.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: February 11, 2020
    Assignee: Alps Alpine Co., Ltd.
    Inventors: Yusuke Koike, Isao Asano, Takashi Nishiyama
  • Patent number: 10561015
    Abstract: A flexible circuit board having enhanced bending durability and a method for preparing same are provided. The method comprises: forming a signal line and a first ground layer on a first dielectric body and forming a second ground layer on a bottom side of the first dielectric body; preparing a second dielectric body; preparing a first bonding sheet and a first protective sheet which is connected to one end of the first bonding sheet or of which one or more parts are overlapped on one end of the first bonding sheet; bonding the second dielectric body onto the first dielectric body by means of the first bonding sheet; forming a via hole such that the first ground layer and the second ground layer are conducted; and cutting in a width direction the second dielectric body placed on the first protective sheet.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: February 11, 2020
    Assignee: GigaLane Co., Ltd.
    Inventors: Sang Pil Kim, Da Yeon Lee, Hwang Sub Koo, Hyun Je Kim, Hee Seok Jung
  • Patent number: 10551877
    Abstract: A display device includes a substrate having a first area, a second area, and a bending area disposed between the first area and the second area. An inner wiring is disposed in the first area. An outer wiring is disposed in the second area. An interlayer insulating layer covers the inner wiring and the outer wiring, and includes a first contact hole. A conductive layer is disposed on the interlayer insulating layer, and is connected to the inner wiring or the outer wiring through the first contact hole. An inorganic protective layer covers at least a portion of the conductive layer and includes an inorganic insulating material.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyungjun Park, Wonkyu Kwak
  • Patent number: 10535585
    Abstract: In one general aspect, an integrated passive device (IPD) die includes at least one passive component that is embedded in an insulator material disposed on a front surface of a substrate. The IPD die includes a through-substrate via (TSV) extending from the backside of the substrate toward the front surface of the substrate. The TSV defines interconnect access to at least one passive component embedded in the insulator material disposed on the front surface of the substrate. The substrate has a thickness less than three-quarters of an original thickness of the substrate.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: January 14, 2020
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Takashi Noma, Hideyuki Inotsume, Kazuo Okada
  • Patent number: 10527894
    Abstract: The present disclosure provides a display panel and a backlight module opposite to the display panel. A circuit board is arranged at a first edge of the display panel, the circuit board is folded to extend from a first surface of the display panel away from the backlight module to a second surface of the backlight module away from the display panel, and at least one folding portion is arranged at a portion of the circuit board between the display panel and the backlight module. The display module further includes a cell tape configured to connect the display panel to the backlight module. The cell tape includes: a first region, attached to an edge of the first surface of the display panel; a second region, attached to an edge of the second surface of the backlight module; and a folding region, which is arranged between the first region and the second region, and connects the first region to the second region.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: January 7, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jianghui Zhan, Wei Lei, Jinmoo Park, Zhuhua Nie
  • Patent number: 10518293
    Abstract: Transducers are provided including a piezoelectric block having first and second opposing surfaces; a first conductive flexible support layer on the first surface of the piezoelectric block, the first flexible support layer having a first thickness; and a second flexible support layer on the second surface of the piezoelectric block, the second flexible support layer having a second thickness. Related devices are also provided.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: December 31, 2019
    Assignee: Sensus USA, Inc.
    Inventor: Justin Rorke Buckland
  • Patent number: 10517170
    Abstract: A multilayer board includes a flexible base material including laminated insulator layers and curved along an X-axis direction on a plane orthogonal or substantially orthogonal to a lamination direction, an interlayer connection conductor on the flexible base material, and a notch pair on the flexible base material at positions symmetrical or substantially symmetrical in the X-axis direction with respect to a position of the interlayer connection conductor, the notch pair extending in a Y-axis direction orthogonal or substantially orthogonal to the X-axis direction on the plane. The interlayer connection conductor is within a region defined by the notch pair and lines respectively joining ends of the notch pair in the Y-axis direction. A radius of curvature of a region of the flexible base material between the notch pair in the X-axis direction being greater than curvature radii of regions outside of the notch pair.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: December 24, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinya Oguri, Yuki Ito, Yuya Dokai, Isamu Morita
  • Patent number: 10517172
    Abstract: An embodiment of the present invention relates to a flexible printed circuit board (FPCB), which is applied to various electronic display devices, and may provide the FPCB, including a base, a first metal layer and a second metal layer on both surfaces of the base, a first plating layer on the first metal layer, a second plating layer on the second metal layer, and a first insulating pattern and a second insulating pattern respectively disposed on some region of the first plating layer and the second plating layer, wherein the first plating layer and the second plating layer may have different thicknesses.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: December 24, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jun Young Lim, Woong Sik Kim, Hyung Kyu Yoon
  • Patent number: 10502991
    Abstract: A flexible electronic display is provided. The display includes a substrate having a plurality of rigid portions, at least one display circuit positioned on a surface of each of the plurality of rigid portions, and at least one flexible interconnect electrically connected to the at least one display circuit. The at least one interconnect is flexible such that each of the plurality of rigid portions may be folded or stretched relative to one another.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: December 10, 2019
    Assignee: THE ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Hongyu Yu, Hanqing Jiang
  • Patent number: 10506724
    Abstract: An electronic circuit board includes a plurality of hard rigid board portions each of which has an insulating insulator and a conductive circuit pattern and electrically connects a mounted electronic component to the circuit pattern; and at least one soft flexible board portion which has an insulating insulator, has a conductive circuit pattern electrically connected to each of the circuit patterns of at least two rigid board portions among the plurality of rigid board portions, and is integrated with the rigid board portions which are electrically connected to the circuit pattern of the flexible board portion. The insulator of the flexible board portion is provided with a through-hole at a place where the circuit pattern of the flexible board portion is not stacked.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: December 10, 2019
    Assignee: YAZAKI CORPORATION
    Inventors: Masayuki Naohara, Tomohiro Sugiura, Yoshihiro Kawamura
  • Patent number: 10499497
    Abstract: Provided is a stretchable circuit board including: a stretchable base material having stretchability and including a stretchable wiring line on one main surface; an electrode formed on at least the main surface of the stretchable base material and connected to the stretchable wiring line; an adhesive layer directly or indirectly bonded to the main surface on which the electrode is formed and formed in a region of the main surface other than an electrode region including the electrode; and an adhesive layer separator detachably bonded to the adhesive layer and having an opening formed at a position corresponding to at least part of the electrode region.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: December 3, 2019
    Assignee: NIPPON MEKTRON, LTD.
    Inventor: Masayuki Iwase
  • Patent number: 10497918
    Abstract: A device (10; 10?) for connecting battery cells (30), characterized by: a multiplicity of cell connectors (14) for electrically connecting terminals (36) of the battery cells (30), and a carrier (12; 12?) for mechanically connecting the cell connectors (14) to one another.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: December 3, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Andreas Lemke, Thomas Kretschmar, Alfons Doerr, Davide Bossi, Martin Gerlach, Gerhard Schubert, Stefan Baumann
  • Patent number: 10492294
    Abstract: A printed wiring board includes: an insulating base material; a first conductive layer disposed on a main surface of the insulating base material in a first region and a second region defined on a plane along the main surface; a second conductive layer disposed on a main surface of the first conductive layer in the first region; and an insulating layer disposed on the main surface of the first conductive layer in the second region. The ratio of a first evaluation value E1 to a second evaluation value E2 is 0.91 or more and 0.99 or less. The first evaluation value E1 is an evaluation value of strength of a first laminated part in the first region and the second evaluation value E2 is an evaluation value of strength of a second laminated part in the second region.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: November 26, 2019
    Assignee: FUJIKURA LTD.
    Inventors: Yasuo Fukuda, Takayuki Okamura
  • Patent number: 10492288
    Abstract: A method of manufacturing a printed circuit board or a sub-assembly thereof comprises the following steps: providing at least two elements (1, 3) of insulating material coupling or connecting the elements (1, 3) of insulating material on at least one adjacent side surface covering the elements (1, 3) of insulating material with a layer (4) of conductive material on at least one surface building up at least one further layer (5, 6, 7, 8) of the printed circuit board (10) at least partly on the elements (1, 3) of insulating material, wherein the elements (1, 3) of insulating material are made of insulating material having different mechanical, chemical or physical properties. Furthermore a printed circuit board (10) or sub-assembly thereof is provided.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: November 26, 2019
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Simon Sebanz, Hannes Voraberger
  • Patent number: 10483211
    Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die is disposed on and electrically coupled to the first surface of the first RDL structure. A first molding compound is disposed on the first surface of the first RDL structure and surrounds the first semiconductor die. A plurality of solder balls or conductive pillar structures is disposed in the first molding compound and electrically coupled to the first semiconductor die through the first RDL structure. A method for forming the semiconductor package is also provided.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: November 19, 2019
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, I-Hsuan Peng, Ching-Wen Hsiao, Nai-Wei Liu, Wei-Che Huang
  • Patent number: 10485116
    Abstract: A foldable display device is discussed, which is capable of shielding the folding region of a housing, to which a flexible display panel is coupled, so as to prevent exposure of the folding region to the outside upon an operation of folding the housing, and which is capable of improving the flatness of the flexible display panel when the flexible display panel or the housing returns from the folded state to the unfolded state.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: November 19, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Jun-Hyung Kim
  • Patent number: 10477704
    Abstract: A multilayer board includes a first base material substrate including insulating base material layers that are laminated, a second base material substrate laminated on the first base material substrate to straddle a stepped portion, and a third base material substrate laminated on the second base material. The first base material substrate includes first and second conductor patterns respectively provided on surfaces in contact with the second base material substrate. The third base material substrate includes third and fourth conductor patterns. The second base material substrate includes a first interlayer connection conductor connecting the first and third conductor patterns, and a second interlayer connection conductor connecting the second and fourth conductor patterns, and has a higher flowability than the first and third base material substrates during lamination.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: November 12, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kuniaki Yosui
  • Patent number: 10458048
    Abstract: Electronic devices (4, 24) are mounted in sequence or series along a plurality of laterally spaced discrete lines (10) on a sheet of non-conductive flexible planar support material (50). The sheet is slit or stripped between said lines to create at least two yarns each in the form of a strip bearing a series of said devices. The width of each strip can be substantially the same as that of the mounted device or devices and is normally less than twice that of the device or devices. The thickness of the support material is normally no more than 10 ?m, and with the width of the devices typically being no more than 800 nm, a strip bearing the devices can thus be used as a yarn or strip for use in many applications, both functional and decorative, either alone or within a sleeve.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: October 29, 2019
    Assignee: NOTTINGHAM TRENT UNIVERSITY
    Inventor: Tilak Kithsiri Dias
  • Patent number: 10457594
    Abstract: The present invention relates to a chemically strengthened glass, in which CT1 and CT5 satisfy CT5/CT1?0.85, the CT1 satisfies CT1>?38.7×ln(t/1000)+48.2 [MPa] and an internal energy density rE satisfies rE?23.3×t/1000+15 [kJ/m2]. CS is a surface compressive stress value [MPa], ? (x) is a compressive stress value [MPa] at a position x in a depth direction, DOL is a compressive stress depth [?m], and t is a sheet thickness [?m].
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 29, 2019
    Assignee: AGC INC.
    Inventors: Kosho Akatsuka, Satoshi Ogami
  • Patent number: 10455695
    Abstract: A stretchable circuit board includes a stretchable substrate, a stretchable conducting film placed on one surface of the stretchable substrate and elongated in a first direction, an electric element placed on the one surface of the stretchable substrate, and a covering portion that covers a part of the stretchable conducting film and at least a part of the electric element, wherein, when an area of a first section as a section along an outer circumference of the covering portion in the stretchable conducting film is referred to as a first area and an area of a second section as a section of the stretchable conducting film orthogonal to the first direction in a location apart from the outer circumference of the covering portion toward outside is referred to as a second area, the first area is larger than the second area.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: October 22, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Yohei Yamada, Tomoyuki Kamakura
  • Patent number: 10440835
    Abstract: A method of manufacturing a component carrier is disclosed. The method includes forming a through hole between a first main surface and a second main surface of an electrically insulating layer structure by removing material from at least one of the main surfaces of the electrically insulating layer structure, in particular by irradiating at least one of the main surfaces of the electrically insulating layer structure with at least one laser shot. The at least one main surface from which material is removed, is not covered by an electrically conductive layer structure at least in a surface region in which the through hole is to be formed. Subsequent to formation of the through hole, at least partially filling the through hole and at least partially covering the main surfaces of the electrically insulating layer structure by an electrically conductive filling medium.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 8, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Gernot Grober
  • Patent number: 10424492
    Abstract: The present invention relates to an integrated circuit packaging, comprising: a plurality of electrical circuits using a first patterned conductive layer (103) formed by using a masking material (102); a second patterned conductive layer (105) having disposed on at least one side of the first patterned conductive layer (103); and a first dielectric layer (106) made from a laminating means, wherein the first patterned conductive layer (103) and the second patterned conductive layer (105) are disposed within the first dielectric layer (106), such that at least one side of the first dielectric layer (106) are located at the same plane with the first patterned conductive layer (103).
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: September 24, 2019
    Assignee: Twisden Ltd.
    Inventors: Loke Chew Low, Poh Cheng Ang, Linhui Yuan
  • Patent number: 10416826
    Abstract: A touch panel sensor includes a substrate and an electrode having a detection electrode and an extraction electrode connected to a detection electrode. The electrode, in any cross-section thereof in the thickness direction, includes a metal layer which occupies at least part of the cross-section. The metal layer of the detection electrode and the metal layer of the extraction electrode are formed integrally at a joint between the detection electrode and the extraction electrode. The detection electrode includes a conductive mesh having conductive wire arranged in a mesh pattern, the conductive wire having a height of not less than 0.2 ?m and not more than 2 ?m and a width of not less than 1 ?m and not more than 5 ?m. The conductive wire of the conductive mesh each have a base surface on the substrate side, and a flat top surface located opposite to the base surface.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: September 17, 2019
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yasuhiko Ishii, Yuichi Miyazaki, Youichirou Oohashi
  • Patent number: 10418333
    Abstract: Certain aspects of the present disclosure are directed to an integrated circuit (IC) package. The IC package generally includes an IC and a shielding sidewall disposed adjacent to the IC. In certain aspects, the IC comprises a first layer coupled to the shielding sidewall, a second layer comprising a first signal path, and a third layer disposed below the first layer and coupled to the shielding sidewall, wherein the second layer is disposed between the first layer and the third layer. In some cases, the IC also includes a plurality of vias configured to couple the first layer to the third layer, wherein at least a portion of the first signal path is disposed in an inner shielding region that spans from the first layer to the third layer and spans from the shielding sidewall to the plurality of vias.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: September 17, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Daeik Kim, Jie Fu, Manuel Aldrete
  • Patent number: 10420208
    Abstract: A printed circuit board is provided. The printed circuit board includes a flexible region. The flexible region includes a first copper layer, a first dielectric layer, a second copper layer, an adhesive layer, and a first metal layer, in the order listed. The first metal layer includes a metal film having a tensile strength greater than the first and second copper layers and greater than the dielectric layer.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: September 17, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Jonathan Bernard Lester, Bhret Robert Graydon, Matthew David Mickelson, Lauren Akemi Hamamoto Donegan Ryan
  • Patent number: 10405420
    Abstract: Embodiments include devices and method related to a foldable printed circuit board that may be used in SSD applications. One embodiment relates to a foldable printed circuit board comprising a first rigid portion, a second rigid portion, and a first flexible region coupling the first rigid portion to the second rigid portion. The foldable printed circuit board also includes a third rigid portion and a second flexible region coupling the second rigid portion to the third rigid portion, wherein the first rigid portion and the third rigid portion each have a width that is less than that of the second rigid portion. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 3, 2019
    Assignee: INTEL CORPORATION
    Inventors: Andrew Morning-Smith, Eugene Lim, Meng Zhai
  • Patent number: 10403989
    Abstract: A resin multilayer substrate includes a substrate main body including first, second, and third wiring portions connected to one another by a connecting portion. First, second and third external connection terminals are respectively included in the first, second and third wiring portions. The first external connection terminal includes a conductor exposed at a surface of the substrate main body. The second and third external connection terminals include connectors mounted on conductors on the surface of the substrate main body. An auxiliary mounting conductor is disposed between the first external connection terminal and the second and third external connection terminals on the surface of the substrate main body.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: September 3, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Chu Xu, Takahiro Baba
  • Patent number: 10403569
    Abstract: To improve signal transmission characteristics of a high frequency signal of 80 GHz or higher. A semiconductor device includes a wiring board having a structure in which a signal via structure and a grounding via structure have mutually overlapping portions in plan view.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: September 3, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Ryuichi Oikawa
  • Patent number: 10398025
    Abstract: A printed circuit board (PCB) structure and mounting assembly for joining two PCBs. A first PCB has a top and bottom surface faces and a peripheral end face separating the top and bottom surface. The first PCB has one or more conductive wire ends exposed at a surface of the peripheral end face; the exposed conductive wire ends forming multiple separate electrical contacts across the thickness and length of the PEF surface. A second PCB has a top surface face and one or more conductive pads exposed at the top surface at locations corresponding to locations of the multiple electrical contacts. A surface mount solder material is disposed on one or more exposed conductive pads for electrically connecting with corresponding the multiple electrical contacts. The disposed solder material stably joins the PEF surface of the first PCB to the top surface of the second PCB in a relative perpendicular orientation.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: August 27, 2019
    Assignee: International Business Machines Corporation
    Inventors: Todd E. Takken, Xin Zhang, Yuan Yao, Andrew Ferencz
  • Patent number: 10395842
    Abstract: A thin film capacitor includes a capacitor body formed by alternately stacking first and second electrode layers and a dielectric layer on a substrate, and having the second electrode layer disposed in an uppermost portion thereof, and a stress alleviation layer formed on the uppermost second electrode layer. The stress alleviation layer is formed of a material having a coefficient of thermal expansion higher than those of the substrate and the dielectric layer.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: August 27, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyo Yeol Lee, Seung Mo Lim, Dong Joon Oh, Yun Sung Kang, Hai Joon Lee
  • Patent number: 10393685
    Abstract: An impedance spectroscopy biosensor is provided that is fabricated on a stretchable substrate. The stretchable substrate is integrated with an impedance biosensor that undergoes cyclic strain without cracking. The biosensor is formed by curing an elastomer precursor while on a pre-tensioned membrane that includes a conductive electrode. The resulting elastomeric material is released from the support after curing which releases the pre-tensioned state to produce the biosensor.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: August 27, 2019
    Assignee: Research Foundation of the City University of New York
    Inventors: Ioana Voiculescu, Xudong Zhang
  • Patent number: 10393959
    Abstract: A method comprises bonding a first surface of an interposer wafer with a first exterior surface of a photonic wafer assembly. The photonic wafer assembly comprises one or more optical devices coupled with one or more metal layers and with one or more first optical waveguides. The method further comprises forming, from a second surface opposite the first surface, a plurality of first conductive vias extending at least partway through the interposer wafer and coupled with the one or more metal layers. The method further comprises forming, at the second surface, a plurality of first conductive pads coupled with the plurality of first conductive vias. The method further comprises forming one or more second conductive pads coupled with the one or more metal layers. The one or more second conductive pads are accessible at a second exterior surface of the photonic wafer assembly opposite the first exterior surface.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: August 27, 2019
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Ashley J. Maker, Matthew J. Traverso, Mark A. Webster, Jock T. Bovington