Termination Post Patents (Class 174/267)
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Patent number: 8927877Abstract: Disclosed herein is a system and method for mounting packages by forming one or more wire loop interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a first substrate. A first and second stud ball may each have at least one flat surface be disposed on a single mounting pad, and a wire having a bend region and forming a loop may be disposed between the stud balls. The stud balls may be formed from a deformed mouthing node formed on a wire. The loop may be mounted on a mounting pad on a first substrate and a second substrate may be mounted on the loop via a conductive material such as solder.Type: GrantFiled: August 8, 2012Date of Patent: January 6, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-An Shen, Yung Ching Chen, Ming-Chung Sung, Chih-Hang Tung, Chien-Hsun Lee, Da-Yuan Shih
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Patent number: 8907354Abstract: The present disclosure relates to an optoelectronic device, in particular to an arrangement for contacting an optoelectronic device. The optoelectronic device (200) includes an elastic electrode (208). A method for forming the elastic electrode (208) is described.Type: GrantFiled: July 8, 2010Date of Patent: December 9, 2014Assignee: OSRAM Opto Semiconductors GmbHInventor: Andrew Ingle
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Patent number: 8884167Abstract: A printed circuit board unit includes: a printed circuit board including a through hole including first and second inner surfaces opposite to each other; a terminal pin including an insertion portion inserted into the through hole; solder filled into the through hole, and joining the printed circuit board with the terminal pin, wherein the insertion portion includes a base portion abutting the first inner surface, and a protruding portion including: a projection surface projecting from the base portion to the second inner surface and abutting the second inner surface; and a recess surface located at a rear side of the projection surface and spaced apart from the first inner surface, and a length of the protruding portion in a thickness direction of the printed circuit board is greater than a thickness of the printed circuit board.Type: GrantFiled: January 9, 2012Date of Patent: November 11, 2014Assignee: Shinano Kenshi Co., Ltd.Inventors: Kazuya Miyasaka, Kouji Kobayashi, Akihito Fukuzawa
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Patent number: 8878078Abstract: A printed wiring board including solder pads excellent in frequency characteristic is provided. To do so, each solder pad 73 is formed by providing a single tin layer 74 on a conductor circuit 158 or a via 160. Therefore, a signal propagation rate can be increased, as compared with a printed wiring board of the prior art on which two metal layers are formed. In addition, due to lack of nickel layers, manufacturing cost can be decreased and electric characteristics can be enhanced.Type: GrantFiled: August 19, 2011Date of Patent: November 4, 2014Assignee: Ibiden Co., Ltd.Inventor: Toru Nakai
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Publication number: 20140318849Abstract: A portion of a flat conductor is exposed from an insulating layer covering at least one of surfaces of the flat conductor. A terminal includes a bottom plate on which the exposed portion of the flat conductor is provided, and crimp claws which are raised at two side edges of the bottom plate so that the exposed portion is disposed therebetween. The exposed portion is folded so as to define a bottom layer which faces the bottom plate and a top layer which faces opposite to the bottom plate. The top layer is configured to be plastically deformed so as to fill a gap between the top layer and inner surfaces of the crimp claws when the crimp claws are crimped onto the top layer, so that the bottom layer is in surface contact with the bottom plate.Type: ApplicationFiled: July 9, 2014Publication date: October 30, 2014Inventor: Naoki Ito
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Patent number: 8859077Abstract: A plurality of openings are formed in a resin insulation layer on a bottom surface side of a wiring laminate portion which constitutes a multilayer wiring substrate. A plurality of motherboard connection terminals are disposed to correspond to the openings. The motherboard connection terminals are primarily comprised of a copper layer, and peripheral portions of terminal outer surfaces thereof are covered by the outermost resin insulation layer. A dissimilar metal layer made of at least one metal which is lower in etching rate than copper is formed between an inner main surface of the outermost resin insulation layer and peripheral portions of the terminal outer surfaces.Type: GrantFiled: February 16, 2011Date of Patent: October 14, 2014Assignee: NGK Spark Plug Co., Ltd.Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Satoshi Hirano
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Publication number: 20140262470Abstract: A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.Type: ApplicationFiled: June 25, 2013Publication date: September 18, 2014Inventors: Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih, Chen-Hua Yu
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Publication number: 20140262460Abstract: A packaged microelectronic element includes connection component incorporating a dielectric layer (22) carrying traces (58) remote from an outer surface (26), posts (48) extending from the traces and projecting beyond the outer surface of the dielectric, and pads (30) exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts (74) exposed on the front surface of the microelectronic element are connected to the pads by elongated leads (76) such as wire bonds. Methods of making the connection component are also disclosed.Type: ApplicationFiled: December 10, 2013Publication date: September 18, 2014Applicant: Tessera, Inc.Inventors: YOICHI KUBOTA, Tec-Gyu Kang, Jae Park, Belgacem Haba
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Patent number: 8796559Abstract: Disclosed herein are a lead pin for a printed circuit board and a printed circuit board using the same. The lead pin for a printed circuit board includes: a connection pin; and a pin head part formed at one end portion of the connection pin and including a protrusion, the diameter thereof being formed to be increasingly small based on a surface contacting the connection pin and the outer peripheral surface thereof being provided with a protrusion-shaped or depression-shaped band, whereby it forms a protrusion-shaped band or a depression-shaped band on the pin head part of the lead pin to increase a contacting area with the solder, thereby improving an adhesion between the lead pin and the printed circuit board.Type: GrantFiled: January 10, 2011Date of Patent: August 5, 2014Assignee: Samsung Electro-Mechanics Co., LtdInventors: Yong Ho Baek, Seok Hyun Park, Ki Taek Lee
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Patent number: 8797760Abstract: A substrate includes: a base; and a plurality of bonding terminals arranged on at least one surface of the base, wherein the plurality of bonding terminals include a first bonding terminal and a second bonding terminal, the first bonding terminal and the second bonding terminal include, in plan view of the base, a circle contacting portion extending along the circumference of a circle tangent to the first bonding terminal and the second bonding terminal, all of the plurality of bonding terminals are arranged so as not to protrude from an area including the circle and the inside thereof, and the circle contacting portion includes at least a first circle contacting portion disposed in the first bonding terminal and a second circle contacting portion disposed in the second bonding terminal.Type: GrantFiled: July 27, 2012Date of Patent: August 5, 2014Assignee: Seiko Epson CorporationInventor: Kenji Sato
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Patent number: 8785789Abstract: Disclosed herein are a printed circuit board (PCB) and a method for manufacturing the same. The PCB includes a base substrate, a circuit layer formed on the base substrate and including a connection pad, a solder resist layer formed on an upper portion of the base substrate and having an opening exposing the connection pad, a metal post formed on upper portions of the connection pad and the solder resist layer and having a plurality of diameters, and a seed layer formed on the upper portion of the solder resist layer and inner walls of the opening along an interface of the metal post.Type: GrantFiled: February 22, 2012Date of Patent: July 22, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hueng Jae Oh, Boo Yang Jung, Dae Young Lee, Jin Won Choi
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Patent number: 8779300Abstract: A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad and a thickness of the stress buffer metal layer being 1-20 ?m, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post.Type: GrantFiled: January 20, 2012Date of Patent: July 15, 2014Assignee: Unimicron Technology Corp.Inventor: Shih-Ping Hsu
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Patent number: 8772643Abstract: A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.Type: GrantFiled: February 16, 2011Date of Patent: July 8, 2014Assignee: NGK Spark Plug Co., Ltd.Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Satoshi Hirano
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Patent number: 8767408Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to an interposer with an encapsulated third layer of components disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can couple signals between the components on the first and second layers.Type: GrantFiled: August 22, 2012Date of Patent: July 1, 2014Assignee: Apple Inc.Inventors: Shawn X. Arnold, Douglas P. Kidd, Sean A. Mayo, Scott P. Mullins, Dennis R. Pyper, Jeffrey M. Thoma, Kenyu Tojima
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Publication number: 20140174811Abstract: Disclosed herein are a printed circuit board and a manufacturing method thereof. The manufacturing method of the printed circuit board according to an exemplary embodiment of the present invention includes forming an insulating layer for a circuit pattern protection on a base substrate having a predetermined circuit pattern on at least one surface thereof; removing a part of the insulating layer to form an opened region having a predetermined pattern; applying copper particles onto the insulating layer including the opened region and then irradiating laser on a portion corresponding to the opened region; and fusing the copper particles applied onto the opened region by the laser irradiation to one another to form a copper post on the opened region.Type: ApplicationFiled: November 1, 2013Publication date: June 26, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Young Soon KIM
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Patent number: 8755196Abstract: A wiring board including a first insulation layer, a conductive pattern formed on the first insulation layer, a second insulation layer formed on the conductive pattern and the first insulation layer and having an opening portion exposing at least a portion of the conductive pattern, and a connection conductor formed in the opening portion of the second insulation layer such that the connection conductor is positioned on the portion of the conductive pattern. The connection conductor has a tip portion which protrudes from a surface of the second insulation layer and which has a tapered side surface tapering toward an end of the tip portion.Type: GrantFiled: July 1, 2011Date of Patent: June 17, 2014Assignee: Ibiden Co., Ltd.Inventors: Shinji Ouchi, Shigeru Yamada, Makoto Terui, Yoshinori Shizuno
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Patent number: 8754336Abstract: A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.Type: GrantFiled: March 22, 2012Date of Patent: June 17, 2014Assignee: Shinko Electric Industries Co., Ltd.Inventor: Kentaro Kaneko
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Publication number: 20140158416Abstract: Some embodiments described herein include apparatuses and methods of forming such apparatuses. In one such embodiment, an apparatus may include an electronic arrangement, a first die, and a second die coupled to the first die and the electronic arrangement. The electronic arrangement may include an opening. At least a portion of the die may occupy at least a portion of the opening in the electronic arrangement. Other embodiments including additional apparatuses and methods are described.Type: ApplicationFiled: December 6, 2012Publication date: June 12, 2014Inventors: Youngseok Oh, Joe Walczyk
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Patent number: 8748751Abstract: Disclosed is an electronic component package (100) including a circuit board (10), an electronic component (20), and an adhesive layer (30). The circuit board (10) is provided with an electrically-conductive conductor post (16) which is buried in a base member (12), and a solder layer (18) which is provided at the front end (13) of the conductor post (16) while exposed from a surface (121) of the base member (12). An electrode pad (24) having a metal layer (22) mounted thereon is provided on the main surface (26) of the electronic component (20). The adhesive layer (30) contains a flux activating compound, and bonds the surface (121) of the base member (12) and the main surface (26) of the electronic component (20). Then, the metal layer (22) and the solder layer (18) are metal-bonded.Type: GrantFiled: November 19, 2009Date of Patent: June 10, 2014Assignee: Sumitomo Bakelite Co., Ltd.Inventors: Toshiaki Chuma, Masayoshi Kondo, Satoshi Tanaka, Kenichi Kanemasa
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Publication number: 20140151108Abstract: An insulating container as a base substrate includes a loading portion disposed on the other surface side, and mounting electrodes (mounting terminals) which are provided on a bottom surface having a front and rear relationship with the other surface and are connected to lands (external terminals) disposed on a printed circuit board using solder, a first end of each of the mounting electrodes on a center portion side of the bottom surface is disposed on a center portion side of the bottom surface with respect to a second end of each of the lands positioned on a center portion side of the bottom surface, and a third end on a side opposite to the first end in a plan view is disposed on a center portion side of the bottom surface with respect to a fourth end on a side opposite to the second end in a plan view.Type: ApplicationFiled: December 3, 2013Publication date: June 5, 2014Applicant: Seiko Epson CorporationInventors: Masaru Mikami, Takuo Kuwahara
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Patent number: 8742265Abstract: Disclosed is a tire mountable apparatus and method that includes a substrate defining a longitudinal direction, a top surface and a bottom surface. The substrate has a plurality of conductor terminals arranged in a substantially linear relationship. A first support element is located below the bottom surface of the substrate and a second support element is located above the top surface of the substrate. The plurality of conductor terminals are positioned between the first and second support elements. The substrate may be a piezoelectric device having a piezoelectric layer arranged between first and second conductive layers. The plurality of conductor terminals may be arranged in a substantially linear relationship along a line about 80° to about 100° to the longitudinal direction of the substrate, and the longitudinal direction of the substrate being substantially perpendicular to the direction of rotation of the tire.Type: GrantFiled: April 30, 2009Date of Patent: June 3, 2014Assignees: Compagnie Generale des Etablissements Michelin, Michelin Recherche et Technique S.A.Inventors: David Alan Weston, Raymond Leslie Hodgkinson
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Publication number: 20140146503Abstract: There is provided a wiring substrate. The wiring substrate includes: a wiring pattern of an outermost layer; a solder resist layer having an opening portion therein, wherein a portion of the wiring pattern is exposed through the opening portion, and the exposed portion of the wiring pattern is defined as a connection pad; and a solder bump on the connection pad. The connection pad includes: a solder layer; and a metal post that is entirely covered by the solder layer, wherein a portion of the solder layer is interposed between the connection pad and the metal post.Type: ApplicationFiled: November 22, 2013Publication date: May 29, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Teruaki CHINO
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Publication number: 20140146507Abstract: In a circuit board for a semiconductor package, the contact pad of the circuit board is partially exposed through a contact hole and a subsidiary pad is provided around the contact hole in such a way that the contact hole is defined by the subsidiary pad. A subsidiary film having the subsidiary pad is provided on a mask pattern for protecting an internal circuit pattern and the contact pad from their surroundings. A contact terminal is provided on the subsidiary film in such a way that the contact hole is at least partially filled with the contact terminal and the subsidiary pad is covered with the contact terminal and an external body is bonded to the contact terminal. The contact area between the circuit board and the contact terminal is enlarged due to the subsidiary pad, thereby increasing the contact reliability of the semiconductor package.Type: ApplicationFiled: October 3, 2013Publication date: May 29, 2014Applicant: Samsung Electronics Co., Ltd.Inventor: Jong-Won LEE
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Patent number: 8729403Abstract: First and second terminals project from a circuit board and lie adjacent to each other with an interspace formed between the first and second terminals. An electronic apparatus further includes a projecting member projecting along a neighboring terminal which is one of the first and second terminals at such a position that the neighboring terminal is located between the projecting member and the interspace. The projecting member is located at an adjacent position adjacent to the neighboring terminal, to attract molten solder from the interspace toward the projecting member during soldering to join the first and second terminals to the circuit board.Type: GrantFiled: September 14, 2011Date of Patent: May 20, 2014Assignee: Hitachi Automotive Systems, Ltd.Inventors: Daisuke Yasukawa, Kazuhiko Nakano, Hirofumi Watanabe, Atsushi Yamaguchi
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Patent number: 8729398Abstract: An electrical assembly comprises a substrate having a dielectric layer and one or more electrically conductive traces overlying the dielectric layer. An electrical component is mounted on a first side of the substrate. The electrical component is capable of generating heat. A plurality of conductive through holes in the substrate are located around a perimeter of the electrical component. The conductive through holes are connected to a conductive trace for heat dissipation. A cooling cavity has bores that face a second side of the substrate opposite the first side. A plurality of respective compliant pins are inserted into corresponding conductive through holes and the bores, wherein a generally exposed portion of the compliant pin is exposed to air or a coolant liquid within the cooling cavity.Type: GrantFiled: March 28, 2012Date of Patent: May 20, 2014Assignee: Deere & CompanyInventor: Jeffrey S Duppong
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Patent number: 8692129Abstract: A printed wiring board includes an interlayer insulation layer, first pads positioned to mount a semiconductor element and forming a first pad group on the insulation layer, second pads forming a second pad group on the insulation layer and positioned along a peripheral portion of the first group, a first solder-resist layer formed on the insulation layer and having first openings exposing the first pads, respectively, and second openings exposing the second pads, respectively, conductive posts formed on the second pads through the second openings of the first solder-resist layer, respectively, and a second solder-resist layer formed on the first solder-resist layer and having a third opening exposing the first pads and fourth openings exposing surfaces of the posts, respectively. The second openings have a diameter greater than a diameter of the posts, and the second solder-resist layer is filling gaps formed between the second openings and the posts.Type: GrantFiled: March 26, 2012Date of Patent: April 8, 2014Assignee: Ibiden Co., Ltd.Inventors: Toshiaki Kasai, Takema Adachi
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Patent number: 8692136Abstract: There are provided a method of repairing a probe card and a repaired probe board. The method of repairing a probe card includes: in a board body composed of a sintered ceramic having first and second pillar surfaces disposed at a position opposed to each other, preparing the board body including a plurality of main channels for electrically connecting a first pad formed on the first pillar surface to a second pad formed on a second pillar surface and reserved channels disposed to be adjacent to the main channels to repair to damaged main channels; when the main channels are damaged; removing the first and second pads formed in the main channels and the reserved channels; forming cavities by partially removing the board between the damaged main channels and the reserved channels adjacent to the main channel; and forming repair connection parts in the cavities in order to electrically connect the damaged main channels to the reserved channels adjacent thereto.Type: GrantFiled: December 9, 2010Date of Patent: April 8, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kwang Jae Oh, Joo Yong Kim, Yoon Hyuck Choi, Bong Gyun Kim
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Patent number: 8686300Abstract: A printed wiring board includes a resin insulation layer having a first surface and a second surface on an opposite side of the first surface, the resin insulation layer having an opening for a first via conductor, a pad formed on the first surface of the resin insulation layer and provided to mount an electronic component, a first conductive circuit formed on the second surface of the resin insulation layer, and a first via conductor formed in the opening and connecting the pad and the first conductive circuit. The pad has an embedded portion embedded in the resin insulation layer and a protruding portion protruding from the resin insulation layer, and the embedded portion has an external shape which is greater than an external shape the protruding portion.Type: GrantFiled: October 27, 2009Date of Patent: April 1, 2014Assignee: Ibiden Co., Ltd.Inventors: Satoru Kawai, Kenji Sakai, Liyi Chen
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Patent number: 8687372Abstract: A flexible circuit assembly that includes a flexible circuit substrate. A spacer is attached to a first side surface of the substrate, and a die carrier is attached to the opposite side surface of the substrate. The die carrier includes one or more photonic die mounted thereon that face an opening formed through the substrate so that the photonic die transmits and/or receives optical signals through the opening. Wire bonds electrically connect the photonic die to an electrical pad on the first side surface of the substrate. The spacer helps to space the wire bonds from an optical connector that connects to the flexible circuit assembly, so that the wire bonds do not interfere with the mechanical connection between the flexible circuit assembly and the optical connector.Type: GrantFiled: December 6, 2011Date of Patent: April 1, 2014Assignee: Lockheed Martin CorporationInventors: Roger J. Karnopp, Gregory M. Drexler, Gregory J. Whaley
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Patent number: 8677617Abstract: A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending from the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.Type: GrantFiled: April 28, 2010Date of Patent: March 25, 2014Assignee: International Business Machines CorporationInventor: Brian Samuel Beaman
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Patent number: 8674231Abstract: Provided is an endoscope in which the work of connecting cables to a circuit board in the distal end of an insertion part can be easily performed. When a bundle-wire cable obtained by bundling a plurality of single-wire cables and a plurality of coaxial cables are connected to a circuit board arranged at the distal end of an insertion part, terminals that connect cores of the single-wire cables, terminals that connect cores of the coaxial cables, terminals that connect shields of the coaxial cables, and terminals that connect the shield of the bundle-wire cable are arranged in tandem at predetermined intervals on the common plane of the circuit board.Type: GrantFiled: June 14, 2012Date of Patent: March 18, 2014Assignee: Fujifilm CorporationInventor: Masaki Takamatsu
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Patent number: 8664541Abstract: A modified 0402 footprint for a PCB, including: at least two padstacks each having a minimum area consistent with the 0402 standard; and each padstack modified on at least two corners such that the padstack's footprint can be placed beneath a ball grid array (‘BGA’), the BGA having approximately a 1 millimeter pitch, and such that the padstack may be placed at least at a minimum distance away from a closest via in the PCB, wherein each padstack has a trace to a via not directly under a padstack in the PCB and each padstack has no via within the padstack.Type: GrantFiled: July 25, 2011Date of Patent: March 4, 2014Assignee: International Business Machines CorporationInventors: Mark E. Andresen, William T. Byrne, Leslie M. Garrett, Paul D. Kangas, Larry G. Pymento, Wilson Velez
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Publication number: 20140022742Abstract: A compact transition structure includes a printed circuit board, wherein there is a rectangular region on one side of the printed circuit board and the rectangular region has a pair of long edges and a pair of short edges; a transition probe on the one side of the printed circuit board, wherein the transition probe extends into the rectangular region through a long edge of the rectangular region and has a terminal near a center of the rectangular region; and a coupler probe on the one side the printed circuit board, wherein the coupler probe extends into the rectangular region through a short edge of the rectangular region and has a terminal before the center of the rectangular region such that the coupler probe is electrically insulated from the transition probe.Type: ApplicationFiled: July 17, 2013Publication date: January 23, 2014Applicant: ZTE (USA) Inc.Inventors: Ying SHEN, Peng Gao
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Patent number: 8633401Abstract: A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.Type: GrantFiled: August 25, 2011Date of Patent: January 21, 2014Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd, Hon Hai Precision Industry Co., Ltd.Inventors: Hua-Li Zhou, Chia-Nan Pai, Shou-Kuo Hsu
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Patent number: 8629547Abstract: A structure of a semiconductor chip package is provided. The semiconductor chip package includes: a substrate; a semiconductor chip mounted on a first surface of the substrate; a plurality of electrode pads on a second surface, different from the first surface, of the substrate; and an electrostatic discharge protection pad overlapping a portion of a first electrode pad and a portion of a second electrode pad among the plurality of electrode pads.Type: GrantFiled: July 13, 2011Date of Patent: January 14, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Kyong-Soon Cho, Chang-Su Kim, Kwan-Jai Lee, Kyoung-Sei Choi, Jae-Hyok Ko, Keung-Beum Kim
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Publication number: 20130342986Abstract: Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.Type: ApplicationFiled: June 26, 2012Publication date: December 26, 2013Inventors: Tsung-Yu Chen, Rebecca Shia
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Publication number: 20130341078Abstract: A Z-directed component for mounting in a mounting hole in a printed circuit board according to one example embodiment includes a main body portion and a tapered end portion that facilitates insertion of the Z-directed component into the mounting hole in the printed circuit board. The tapered end portion is removably attached to the main body portion such that the tapered end portion may be removed after the Z-directed component is inserted into the mounting hole in the printed circuit board. A method for installing a Z-directed component having a removable tapered lead-in into the mounting hole according to one example embodiment includes inserting the Z-directed component into the mounting hole in the printed circuit board with the removable tapered lead-in leading the insertion and after the Z-directed component is inserted into the mounting hole, removing the removable lead-in from the rest of the Z-directed component.Type: ApplicationFiled: June 20, 2012Publication date: December 26, 2013Inventors: KEITH BRYAN HARDIN, Paul Kevin Hall, Zachary Charles Nathan Kratzer, Qing Zhang, John Thomas Fessler
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Publication number: 20130341788Abstract: A semiconductor device has a semiconductor substrate, an electrode pad formed on a surface of the semiconductor substrate, and a protruding electrode electrically connected to the electrode pad. The protruding electrode comprises a pedestal part formed on the electrode pad and a protruding part formed on the pedestal part. The protruding part has a columnar part with a width smaller than that of the pedestal part, and a tapered part with a width gradually increased from an end of the columnar part side toward an end of the pedestal part side. An angle of inclination of a side surface of the tapered part with respect to a plane surface perpendicular to the surface is larger than an angle of inclination of a side surface of the pedestal part and an angle of inclination of a side surface of the columnar part with respect to the plane surface.Type: ApplicationFiled: June 18, 2013Publication date: December 26, 2013Inventor: Yoshihiro Machida
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Patent number: 8604354Abstract: A printed wiring board including: an insulated substrate; a conductive circuit provided on one side of this insulated substrate; a cover layer covering the insulated substrate and the conductive circuit; and a conductive particle buried in this cover layer, wherein the conductive particle is buried in the cover layer so that the conductive particle contacts the conductive circuit and protrudes from the cover layer; and the conductive particle serves as an electric contact point.Type: GrantFiled: December 22, 2009Date of Patent: December 10, 2013Assignee: Fujikura Ltd.Inventors: Shoji Ito, Tomofumi Kitada, Tadanori Ominato
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Publication number: 20130301207Abstract: An embodiment is a memory card including a rectangular printed circuit card having a first side and a second side, a first length of between 151.35 and 161.5 millimeters, and first and second ends having a second length smaller than the first length. The memory card also includes a first plurality of pins on the first side extending along a first edge of the rectangular printed circuit card that extends along a length of the rectangular printed circuit card, a second plurality of pins on the second side extending on the first edge of the rectangular printed circuit card, and a positioning key having its center positioned on the first edge of the rectangular printed circuit card and located between 94.0 and 95.5 millimeters from the first end of the rectangular printed circuit card.Type: ApplicationFiled: May 8, 2012Publication date: November 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sungjun Chun, Brian J. Connolly
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Publication number: 20130286619Abstract: An interconnection element is provided for conductive interconnection with another element having at least one of microelectronic devices or wiring thereon. The interconnection element includes a dielectric element having a major surface. A plated metal layer including a plurality of exposed metal posts can project outwardly beyond the major surface of the dielectric element. Some of the metal posts can be electrically insulated from each other by the dielectric element. The interconnection element typically includes a plurality of terminals in conductive communication with the metal posts. The terminals can be connected through the dielectric element to the metal posts. The posts may be defined by plating a metal onto exposed co-planar surfaces of a mandrel and interior surfaces of openings in a mandrel, after which the mandrel can be removed.Type: ApplicationFiled: June 27, 2013Publication date: October 31, 2013Inventors: Jinsu Kwon, Kimitaka Endo, Sean P. Moran
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Publication number: 20130284509Abstract: A connection structure includes a column electrode; a first connecting portion connected to one end of the column electrode; and a second connecting portion connected to another end of the column electrode via solder, wherein a height of the column electrode is a width of the first connecting portion or greater.Type: ApplicationFiled: April 22, 2013Publication date: October 31, 2013Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Murayama, Shinji Nakazawa, Miki Suzuki
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Publication number: 20130252414Abstract: A system, method, and computer program product are provided for affixing a post to a substrate pad. In use, a post is affixed to each of one or more pads of a substrate, where each post receives a ball of a package during an assembly process.Type: ApplicationFiled: March 22, 2012Publication date: September 26, 2013Applicant: NVIDIA CORPORATIONInventors: Leilei Zhang, Abraham F. Yee, Shantanu Kalchuri, Zuhair Bokharey
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Patent number: 8536458Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.Type: GrantFiled: March 30, 2009Date of Patent: September 17, 2013Assignee: Amkor Technology, Inc.Inventors: Robert Francis Darveaux, David McCann, John McCormick, Louis W. Nicholls
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Patent number: 8519524Abstract: A chip stacking structure including a carrier, a first redistribution layer, a second redistribution layer, at least one first chip, at least one second chip, and at least one conductor is provided. The carrier has a first surface and a second surface opposite to each other. The carrier has at least one through hole. The first and second redistribution layers are disposed on the first and second surfaces of the carrier, respectively. The first and second chips are disposed on the first and second surfaces of the carrier and electrically connected with the first and second redistribution layers, respectively. The conductor is disposed on one of the first and second chips. The conductor is disposed in the through hole. The first and second chips are electrically connected by the conductor. A gap is formed between the conductor and an inner wall of the carrier which surrounds the through hole.Type: GrantFiled: August 16, 2012Date of Patent: August 27, 2013Assignee: Industrial Technology Research InstituteInventors: Sheng-Tsai Wu, John H. Lau, Heng-Chieh Chien, Ra-Min Tain, Ming-Ji Dai, Yu-Lin Chao
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Patent number: 8513532Abstract: A flexible circuit structure with stretchability comprises a flexible substrate, a metal layer, and a plurality of flexible bumps. The metal layer is formed on the flexible substrate. These flexible bumps are formed on the metal layer and the flexible substrate.Type: GrantFiled: February 23, 2011Date of Patent: August 20, 2013Assignee: Industrial Technology Research InstituteInventors: Yu-Hua Chen, Ying-Ching Shih
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Patent number: 8513819Abstract: A multi-die package includes a first semiconductor die and a second semiconductor die each having an upper surface with a plurality of bond pads positioned thereon. The multi-die package also includes a plurality of bonding wires each coupling one of the bond pads on the upper surface of the first semiconductor die to a corresponding one of the bond pads on the upper surface of the second semiconductor die. A bonding wire of the plurality of bonding wires includes a first portion extending upward from one of the second plurality of bond pads substantially along a z-axis and curving outward substantially along x and y axes in a direction towards the first semiconductor die. The bonding wire also includes a second portion coupled to the first portion and extending from the first portion downward to one of the first plurality of bond pads on the upper surface of the first semiconductor die.Type: GrantFiled: July 31, 2012Date of Patent: August 20, 2013Assignee: Carsem (M) SDN. BHD.Inventors: Liew Siew Har, Law Wai Ling
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Publication number: 20130203294Abstract: A read wiring trace and a write wiring trace are formed on an insulating layer. Connection terminals made of conductor are connected to the read wiring trace and the write wiring trace, respectively. Each connection terminal has at least one corner with a radius of curvature of not larger than 35 ?m.Type: ApplicationFiled: November 12, 2012Publication date: August 8, 2013Applicant: NITTO DENKO CORPORATIONInventors: Yoshito FUJIMURA, Jun ISHII
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Publication number: 20130161085Abstract: Disclosed herein are a printed circuit board (PCB) and a method for manufacturing the same. The PCB includes a base substrate, a circuit layer formed on the base substrate and including a connection pad, a solder resist layer formed on an upper portion of the base substrate and having an opening exposing the connection pad, a metal post formed on upper portions of the connection pad and the solder resist layer and having a plurality of diameters, and a seed layer formed on the upper portion of the solder resist layer and inner walls of the opening along an interface of the metal post.Type: ApplicationFiled: February 22, 2012Publication date: June 27, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hueng Jae Oh, Boo Yang Jung, Dae Young Lee, Jin Won Choi
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Patent number: 8466374Abstract: A base of circuit board, a circuit board, and a method of fabricating thereof are provided. The circuit board includes a substrate, a plurality of elastic bumps and a patterned circuit layer. The elastic bumps arranged in at least an array are located on the substrate. The patterned circuit layer is located on a portion of the elastic bumps and a portion of the substrate. The base of the circuit board and the method of fabricating thereof are also included in the present invention.Type: GrantFiled: June 3, 2009Date of Patent: June 18, 2013Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corporation, Hannstar Display Corporation, Chi Mei Optoelectronics Corporation, Industrial Technology Research InstituteInventors: Ngai Tsang, Kuo-Shu Kao