Termination Post Patents (Class 174/267)
  • Patent number: 8426748
    Abstract: A lead pin comprising including a body having a shaft portion and a flange portion. The flange portion has at least one flat portion configured to face a connection pad and groove portions positioned to face toward the connection pad and extending from a peripheral portion toward a center portion of the flange portion, the flat portion includes extending portions extending from a center of the flange toward the peripheral portion of the flange and connected at the center of the flange, and the groove portions are tilted to become deeper toward the peripheral portion of the flange.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: April 23, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Masanori Kawade, Hiroyuki Tsuruga, Makoto Ebina
  • Patent number: 8420955
    Abstract: A lead pin for a package substrate includes a coupling pin, a head portion, and a flowing prevention portion. The coupling pin is to be inserted into a hole which is formed in an external substrate. The head portion is formed at one end of the coupling pin. The flowing prevention portion is formed on the top surface of the head portion and prevents a solder paste from flowing toward the coupling pin on the top surface of the head portion when the head portion is mounted on the package substrate.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: April 16, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Won Choi, Seung Jean Moon, Ki Taek Lee
  • Publication number: 20130087376
    Abstract: An interposer includes a substrate having first and second opposing surfaces, the substrate having a sheet shape; and a plurality of spring electrodes fixed to the substrate in a certain arrangement, each of the plurality of the spring electrodes including a first pad disposed opposite the first surface of the mesh and extending in a first direction, a second pad disposed opposite the second surface of the mesh and extending in the first direction, and a post extending through the substrate between the first and second surfaces and connecting an end of the first pad to an end of the second pad.
    Type: Application
    Filed: September 14, 2012
    Publication date: April 11, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Yasuo MORIYA
  • Patent number: 8415781
    Abstract: An electronic component including a wiring board having a power-source pattern and a signal pattern, a semiconductor element mounted on the wiring board and having a power-source electrode pad and a signal electrode pad, a first connection portion being made of a conductive material and connecting the signal pattern of the wiring board and the signal electrode pad of the semiconductor element, and a second connection portion being made of a conductive material and connecting the power-source pattern of the wiring board and the power-source electrode pad of the semiconductor element. The conductive material of the first connection portion and the conductive material of the second connection portion are selected such that the conductive material of the second connection portion has an electrical resistance which is lower than an electrical resistance of the conductive material of the first connection portion.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: April 9, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Toshiki Furutani, Shinobu Kato
  • Patent number: 8399777
    Abstract: Disclosed herein are an electromagnetic bandgap structure and a printed circuit board having the same. The bandgap structure includes a conductive layer including a plurality of conductive plates, a first metal layer disposed under the conductive layer and including a first stitching pattern electrically connected to a first conductive plate of the plurality of conductive plates, and a second metal layer disposed under the first metal layer and including a second stitching pattern electrically connected to both the first stitching pattern and a second conductive plate of the plurality of conductive plates. The bandgap to structure includes stitching patterns formed in two layers different from the conductive layer, thus offering a stop-band having a desired bandwidth in a compact structure.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 19, 2013
    Assignees: Samsung Electro-Mechanics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Won Woo Cho, Young Soo Kim, Yoon Jung Kim, Dek Gin Yang, Myung Gun Chong, Hyung Ho Kim
  • Patent number: 8395058
    Abstract: A metal core circuit board assembly includes a circuit board having a through hole in an embodiment. A shaft for a pin is inserted in the through hole such that cap of the pin abuts a foil layer on the circuit board. The shaft diameter is sufficiently smaller than the through hole diameter such that the shaft is electrically isolated from a metal core for the circuit board. The cap is undercut about the through hole to further isolate the pin from the non-electrically isolated portion of the metal core circuit board.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: March 12, 2013
    Assignee: SureFire, LLC
    Inventors: Ronald S. Gibson, Deepanjan Mitra, Ammar Burayez
  • Patent number: 8389872
    Abstract: An electrode structure adapted for high applied voltage is provided, which comprises a conductive plate substrate and a covering layer disposed thereon such that a covering percentage of the covering layer over the conductive plate substrate is more than 50%. Since area of the conductive plate substrate covered by the covering layer is larger than the area exposed, the possibility of arcing is reduced and the breakdown voltage applied to the electrode structure may be increased.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: March 5, 2013
    Assignee: Hermes-Epitek Corp.
    Inventors: Chen Hsu, Chih-Ming Hu, Chun-Yen Lin, Wen-Sheng Lin, Shih-Chieh Jang
  • Patent number: 8383958
    Abstract: A robust mechanical structure is provided to prevent small foundation structures formed on a substrate from detaching from the substrate surface. The strengthened structure is formed by plating a foundation metal layer on a seed layer and then embedding the plated foundation structure in an adhesive polymer material, such as epoxy. Components, such as spring probes, can then be constructed on the plated foundation. The adhesive polymer material better assures the adhesion of the metal foundation structure to the substrate surface by counteracting forces applied to an element, such as a spring probe, attached to the plated foundation.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: February 26, 2013
    Assignee: FormFactor, Inc.
    Inventors: Gary W. Grube, Gaetan L. Mathieu, Benjamin N. Eldridge, Chadwick D. Sofield
  • Patent number: 8378231
    Abstract: A semiconductor device includes wiring boards each having an insulating board, conductor circuits and through-holes, the insulating board having top and bottom surfaces, the conductor circuits formed on the top and bottom surfaces, the through holes penetrating the insulating board and electrically connecting the conductor circuits of the top and bottom surfaces; conductor posts each having flange, head and leg portions, the flange portion having first and second surfaces and having an external diameter larger than that of the through-hole, the head portion protruding from the first surface, the leg portion protruding from the second surface; and electronic components each having an electrode formed on one or more surfaces and connected to the leg portion. The head portion is inserted until the first surface of the flange portion comes into contact with the bottom surface of the wiring board and electrically connected at an inner wall of the through-hole.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: February 19, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Kiyotaka Tsukada, Toshihiro Nomura, Daisuke Minoura
  • Patent number: 8379402
    Abstract: A wiring board having a lead pin is provided. The wiring board having the lead pin includes a connecting pad which is formed on the wiring board, and to which the lead pin is bonded through a conductive material. The lead pin includes: a shaft portion; a head portion which is provided on one end of the shaft portion; a protruded portion which is formed on a surface side of the head portion opposed to the connection pad; and a first taper portion which is formed between the head portion and a base part of the shaft portion.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: February 19, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kazuhiro Oshima, Yoshikazu Hirabayashi, Shigeo Nakajima, Yoshitaka Matsushita
  • Publication number: 20130033838
    Abstract: A substrate includes: a base; and a plurality of bonding terminals arranged on at least one surface of the base, wherein the plurality of bonding terminals include a first bonding terminal and a second bonding terminal, the first bonding terminal and the second bonding terminal include, in plan view of the base, a circle contacting portion extending along the circumference of a circle tangent to the first bonding terminal and the second bonding terminal, all of the plurality of bonding terminals are arranged so as not to protrude from an area including the circle and the inside thereof, and the circle contacting portion includes at least a first circle contacting portion disposed in the first bonding terminal and a second circle contacting portion disposed in the second bonding terminal.
    Type: Application
    Filed: July 27, 2012
    Publication date: February 7, 2013
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Kenji SATO
  • Publication number: 20130014981
    Abstract: An electromagnetic wave propagation apparatus includes: a planar propagation medium including a planar conductor, a first planar dielectric, a planar mesh conductor, and a second planar dielectric being overlaid on each other in order; at least one electromagnetic wave input port provided for the planar propagation medium; a power supply station that supplies the planar propagation medium with an electromagnetic wave as electric power or information through the electromagnetic wave input port; and at least one power receiving apparatus provided for a second planar dielectric of the planar propagation medium and includes an electromagnetic wave interface and a power receiving circuit. A dielectric board is provided with multiple conductor patterns as the electromagnetic wave interface. At least one connection means is provided between the conductor pattern and the power receiving circuit. At least one short-circuit means between the conductor patterns is provided at an end of the conductor pattern.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 17, 2013
    Inventors: Hiroshi SHINODA, Takahide TERADA, Kazunori HARA
  • Publication number: 20130008705
    Abstract: A coreless package substrate is provided, including: a circuit buildup structure including at least a dielectric layer, at least a circuit layer and conductive elements; first electrical contact pads embedded in the lowermost dielectric layer of the circuit buildup structure; a plurality of metal bumps formed on the uppermost circuit layer of the circuit buildup structure; a dielectric passivation layer disposed on a top surface of the circuit buildup structure and the metal bumps; and second electrical contact pads embedded in the dielectric passivation layer and electrically connected to the metal bumps. With the second electrical contact pads being engaged with the metal bumps and having top surfaces thereof completely exposed, the bonding strength between the second electrical contact pads and a chip to be mounted thereon and between the second electrical contact pads and the metal bumps can be enhanced.
    Type: Application
    Filed: October 26, 2011
    Publication date: January 10, 2013
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventors: Tzyy-Jang Tseng, Chung-W. Ho
  • Patent number: 8338718
    Abstract: A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to each other through vias formed in the insulating layers. In the peripheral region around the chip mounting area of the outermost insulating layer on one of both surfaces of the board, a pad is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude, and a pad whose surface is exposed from the insulating layer is arranged in the chip mounting area. A chip is flip-chip bonded to the pad of the package, and another package is bonded to the bump shaped pad in a peripheral region around the chip (package-on-package bonding).
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: December 25, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kentaro Kaneko, Hidemi Atobe
  • Patent number: 8330048
    Abstract: Disclosed herein are an electromagnetic bandgap structure and a printed circuit board having the same. The bandgap structure includes a conductive layer including a plurality of conductive plates; and a metal layer disposed over or under the conductive layer and including a stitching pattern to electrically connect a first conductive plate to a second conductive plate of the plurality of conductive plates. The bandgap structure includes a spiral stitching pattern formed in a metal layer different from the conductive layer, thus offering a stop-band having a desired bandwidth in a compact structure.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: December 11, 2012
    Assignees: Samsung Electro-Mechanics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Won Woo Cho, Young Soo Kim, Yoon Jung Kim, Dek Gin Yang, Myung Gun Chong, Hyung Ho Kim
  • Patent number: 8331104
    Abstract: According to one embodiment, an electronic device includes a circuit board housed in a housing. The circuit board further includes a conductive layer, an insulating layer and a signal line. The conductive layer includes a base portion including a surface, a plurality of first projecting portions formed integrally with the base portion and extending in parallel with each other on the surface of the base portion, and a plurality of second projecting portions formed integrally with the base portion and extending in parallel with each other to cross the plurality of first projecting portions. The insulating layer is stacked on the conductive layer to cover the surface of the base portion, and the signal line is stacked on the insulating layer and extends in a direction crossing directions in which the first and second projecting portions extend.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: December 11, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Daigo Suzuki
  • Patent number: 8324509
    Abstract: The invention provides an electronic component and a manufacturing method thereof that: can allow electronic components to be mounted on an external substrate at a higher density than before; can adjust the height (level) of a terminal electrode as required and desired, thereby solving problems that would occur in the inspection of the conventional electronic components; and can also improve the yield in the mounting of electronic components, thereby achieving increased productivity.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 4, 2012
    Assignee: TDK Corporation
    Inventors: Takashi Ohtsuka, Kyung-Ku Choi, Tatsuo Namikawa, Hitoshi Yamaguchi
  • Patent number: 8324510
    Abstract: A printed circuit board includes a multiple-layer electrical circuit board and a conductive arm, wherein the conductive arm has an unconnected end located opposite to the connected end of the conductive arm, wherein the conductive arm has a front side and a backside located opposite to the front side of the conductive arm, wherein the backside of the conductive arm is located adjacent to the multiple layer electrical circuit board. The unconnected end of the conductive arm includes a dimple portion formed integrally with and as a unitary part of a remaining portion of the conductive arm, the dimple portion being out of plane with in plane portions of the connected end of the conductive arm so that the dimple portion is at a greater distance from the circuit board than the in plane portions of the conductive arm, the dimple portion being connected to the in plane portions of the conductive arm via an integrally formed and unitary riser portion.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: December 4, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Patrick C. P. Cheung
  • Patent number: 8319116
    Abstract: Systems and methods for providing mechanically reinforced plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities and reliability, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. One or more electrically-nonfunctional lands (or “rib reinforcements”) are provided in internal conductive layers to mechanically support the walls of the PCB.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: November 27, 2012
    Assignee: Oracle America, Inc.
    Inventors: Jorge Eduardo Martinez-Vargas, Lien-Fen (Livia) Hu, Samuel Ming Sien Lee, James David Britton, Martin John Henson
  • Patent number: 8319114
    Abstract: A dual footprint mounting package for a surface mount power converter modules and its method of manufacture. Castellated regions are formed on the edge of the component package using the appropriate sized drill or milling bit. Edge plating is applied to the castellated surfaces to create edge pads. The edge plating provides electrical continuity between the edge pads and the SMT pads. Solder mask, or other materials, is applied to prevent solder from wicking between each SMT pad and its respective edge pad. Such component may be attached to a larger device PWB using either the edge pads or the SMT pads, or may even be attached using a combination of the two, such as in the event of a pad failure or other defect.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: November 27, 2012
    Assignee: Densel Lambda K.K.
    Inventors: Sun-Wen Cyrus Cheng, Paulette Lemond, Carl Milton Wildrick
  • Patent number: 8314347
    Abstract: A wiring board with lead pins includes: connection pads formed on a wiring board, and lead pins bonded through a conductive material to the connection pads, wherein each of the lead pins has a head portion that is formed in one end of a shaft portion to be larger in diameter than the shaft portion, the head portions are bonded to the connection pads by the conductive material, a face of the wiring board on which the connection pads are formed is resin-sealed by a first resin to be thicker than the head portions, except portions to which the head portions are bonded, and sides of faces of the head portions to which the shaft portions are connected are sealed to be in close contact with the first resin by a second resin.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: November 20, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kenta Uchiyama, Akihiko Tateiwa, Yuji Kunimoto
  • Patent number: 8294041
    Abstract: A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: October 23, 2012
    Assignee: Unimicron Technology Corp.
    Inventors: Cheng-Po Yu, Cheng-Hung Yu
  • Publication number: 20120247824
    Abstract: A suspension board with circuit includes a conductive pattern on a top surface thereof. A folded-back portion that is capable of being folded back toward a back surface side is provided therein. At the circumference edge of the folded-back portion, a part of the circumference edge is continuous to the suspension board with circuit around the folded-back portion via a bent portion and the remaining portion of the circumference edge is disposed apart from the suspension board with circuit around the folded-back portion by a penetrating space that penetrates the suspension board with circuit in a thickness direction. The conductive pattern at least includes a top-surface-side terminal that is disposed on the top surface of the suspension board with circuit and a back-surface-side terminal that is disposed in the folded-back portion.
    Type: Application
    Filed: March 16, 2012
    Publication date: October 4, 2012
    Applicant: NITTO DENKO CORPORATION
    Inventor: Tetsuya OHSAWA
  • Patent number: 8273996
    Abstract: A Z-directed connector component for insertion into a printed circuit board and providing electrical connections to internal conductive planes contained with the PCB and/or to external conductive traces on the surface of the PCB. In one embodiment the Z-directed component is housed within the thickness of the PCB allowing other components to be mounted over it. The body of the Z-directed connector component may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body. Methods for mounting Z-directed components are also provided.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: September 25, 2012
    Assignee: Lexmark International, Inc.
    Inventors: Keith Bryan Hardin, Richard Herman Dressman, John Thomas Fessler, Paul Kevin Hall, Brian Lee Naily
  • Patent number: 8263879
    Abstract: A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: September 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Gareth Hougham, Gerard McVicker, Xiaoxiong Gu, Sung K. Kang, Frank R. Libsch, Xiao H. Liu
  • Patent number: 8254136
    Abstract: A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwan-Ho Kim, Ick-Kyu Jang, Ji-Man Myeong
  • Patent number: 8232478
    Abstract: An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: July 31, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Je-Gwang Yoo, Chang-Sup Ryu
  • Patent number: 8232481
    Abstract: A wiring board with a columnar conductor includes a wiring board defined by a multilayer ceramic board, a columnar conductor on an upper surface of the wiring board, and an insulating support portion arranged to support a side of the columnar conductor and having an external shape that expands from a tip of the columnar conductor toward the wiring board.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: July 31, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Daigo Matsubara
  • Patent number: 8227710
    Abstract: Provided is a wiring structure and the like which can completely connect a wiring layer to a body to be wired while keeping insulation between two adjacent wiring layers and realize high density packaging due to a narrowed pitch. In a semiconductor-embedded substrate, a conductive pattern is formed on both sides of a core substrate and a semiconductor device is placed in a resin layer stacked over the core substrate. The resin layer has via-holes so that the conductive pattern and a bump of the semiconductor device protrude from the resin layer. Inside the via-holes, the bump and conductive pattern are respectively connected to via-hole electrode portions whose cross-sectional area has been increased toward the bottom of the via-hole. A void is defined between the via-hole electrode portion and upper portion of the inner wall of the via-hole.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: July 24, 2012
    Assignee: TDK Corporation
    Inventors: Kenji Nagase, Kenichi Kawabata
  • Patent number: 8227704
    Abstract: Disclosed is a printed circuit board including an electromagnetic bandgap structure. The electromagnetic bandgap structure, which includes a first dielectric material for interlayer insulation and is for blocking a noise, is inserted into the printed circuit board. The electromagnetic bandgap structure can include a first conductive plate, a second conductive plate arranged on a planar surface that is different from that of the first conductive plate, a third conductive plate arranged on a same planar surface as the first conductive plate, and a stitching via unit configured to connect the first conductive plate and the third conductive plate through the planar surface on which the second conductive plate is arranged. A second dielectric material having a permittivity that is different from that of the first dielectric material is interposed between any two of the first conductive plate, the second conductive plate, and the third conductive plate.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: July 24, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae-Hyun Park, Han Kim, Kang-Wook Bong
  • Patent number: 8228676
    Abstract: A small form factor USB Bluetooth dongle includes a printed circuit board (PCB), a USB contact area, and a radio frequency (RF) transceiver die. The PCB includes a first primary surface and a second primary surface. The USB contact area is fabricated on the first primary surface. The RF transceiver die is mounted on the second primary surface, wherein the RF transceiver is in accordance with Bluetooth.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: July 24, 2012
    Assignee: Broadcom Corporation
    Inventors: Craig Alan Kochis, Thomas Herbert Ramsthaler
  • Publication number: 20120181078
    Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.
    Type: Application
    Filed: March 29, 2012
    Publication date: July 19, 2012
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasushi Inagaki, Katsuyuki Sano
  • Publication number: 20120181077
    Abstract: A printed circuit board unit includes: a printed circuit board including a through hole including first and second inner surfaces opposite to each other; a terminal pin including an insertion portion inserted into the through hole; solder filled into the through hole, and joining the printed circuit board with the terminal pin, wherein the insertion portion includes a base portion abutting the first inner surface, and a protruding portion including: a projection surface projecting from the base portion to the second inner surface and abutting the second inner surface; and a recess surface located at a rear side of the projection surface and spaced apart from the first inner surface, and a length of the protruding portion a thickness direction of the printed circuit board is greater than a thickness of the printed circuit board.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 19, 2012
    Applicant: SHINANO KENSHI CO., LTD.
    Inventors: Kazuya MIYASAKA, Kouji KOBAYASHI, Akihito FUKUZAWA
  • Patent number: 8222536
    Abstract: A wiring substrate is provided with a substrate, a conductive circuit formed on a surface of the substrate, and an insulating layer which covers the conductive circuit. In a fitting portion of the wiring substrate, the insulating layer is formed with an opening portion through which a portion of the conductive circuit is exposed or displayed as an exposed surface. On the exposed surface of the conductive circuit, an electrode layer is formed which is made of a conductive member. A bottom surface of the electrode layer is connected to the conductive circuit. An upper surface of the electrode layer is extended in the widthwise direction W of wirings of the conductive circuit so as to cover even a part of the insulating layer.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: July 17, 2012
    Assignee: Fujikara Ltd.
    Inventors: Shuzo Hirata, Akinobu Ono
  • Patent number: 8213184
    Abstract: A method of testing integrated circuit chips. The method includes: attaching integrated circuit chips to an interposer of a temporary carrier, the carrier comprising: a substrate, a first interconnects on a bottom surface and a second array of interconnects on a top surface of the substrate, corresponding first and second interconnects electrically connected by wires in the substrate; the interposer, first pads on a top surface and a second pads on a bottom surface of the interposer, corresponding first and second pads electrically connected by wires in the interposer, and the second pads in physical and electrical contact with corresponding second interconnects; and the interposer including an interposer substrate comprising a same material as a substrate of the integrated circuit chip; connecting interconnects of the first array of interconnects to a tester; and testing the one or more integrated circuit chips.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventor: John Ulrich Knickerbocker
  • Patent number: 8212150
    Abstract: An EMI noise reduction board is disclosed. The electromagnetic interference (EMI) noise reduction board having an electromagnetic bandgap structure for shielding a noise includes: a first area having a ground layer and a power layer; a second area placed in a side portion of the first area having an electromagnetic bandgap structure therein. The electromagnetic bandgap structure includes: a plurality of first conductive plates and a plurality of second conductive plates placed on a same planar surface along the side portion of the first area; and a stitching via configured to electrically connect the first conductive plate to the second conductive plate through a planar surface that is different from the first conductive plate and the second conductive plate.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: July 3, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Mi-Ja Han, Dae-Hyun Park, Hyo-Jic Jung, Kang-Wook Bong
  • Publication number: 20120145442
    Abstract: A microelectronic assembly includes a first surface and a first thin conductive element exposed at the first surface and having a face comprising first and second regions. A first conductive projection having a base connected to and covering the first region of the face extends to an end remote from the base. A first dielectric material layer covers the second region of the first thin element and contacts at least the base of the first conductive projection. The assembly further includes a second substrate having a second face and a second conductive projection extending away from the second face. A first fusible metal mass connects the first projection to the second projection and extends along an edge of the first projection towards the first dielectric material layer.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 14, 2012
    Applicant: TESSERA RESEARCH LLC
    Inventors: Debabrata Gupta, Yukio Hashimoto, Ilyas Mohammed, Laura Mirkarimi, Rajesh Katkar
  • Publication number: 20120125675
    Abstract: An electronic component that can be mounted with good balance includes a substrate, a plurality of first terminals located on a peripheral portion of one main surface of the substrate, a ground electrode located in a center of the one main surface of the substrate and including openings, and at least two second terminals located on the one main surface of the substrate and within the openings of the ground electrode and that are electrically isolated from the ground electrode. The second terminals are arranged at positions that are point symmetrical about a center of the ground electrode.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 24, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Terumichi KITA
  • Patent number: 8183467
    Abstract: A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: May 22, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kentaro Kaneko
  • Patent number: 8183464
    Abstract: A substrate pad structure for connecting a lead connecting portion of an electronic device to a substrate is disclosed. The substrate pad structure includes a first pad portion and a second pad portion that are arranged on the substrate at corresponding positions of two end regions of the lead connecting portion, which has a continuous oblong shape. A space portion is provided between the first pad portion and the second pad portion, and the lead connecting portion includes a non-connected region located at a corresponding position of the space portion.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: May 22, 2012
    Assignee: Fujitsu Component Limited
    Inventors: Tohru Yamakami, Osamu Daikuhara
  • Patent number: 8183469
    Abstract: A wiring board includes an external connection terminal of a cylindrical shape, in which an electrode terminal of the electronic component to be mounted is fitted. In one configuration, a portion of the external connection terminal is electrically connected to a pad portion formed on an electronic component mounting surface side of the wiring board, and the external connection terminal is curvedly formed in such a shape that the outer periphery of the electrode terminal comes into close contact with the inner periphery of the middle portion of the external connection terminal when the electrode terminal is inserted into the external connection terminal.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: May 22, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Takaharu Yamano
  • Publication number: 20120118621
    Abstract: Disclosed herein is a printed circuit board, including: a base substrate having a connection pad; a lead pin bonded to the connection pad; and a surface treatment layer formed at the exposed portions of the connection pad and the lead pin.
    Type: Application
    Filed: April 20, 2011
    Publication date: May 17, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Won CHOI, Sung Won JEONG
  • Publication number: 20120111626
    Abstract: A printed circuit board, comprises an insulative substrate, a grounding layer located on a surface of the insulative substrate and defining a through slot, a plurality of conductive pins located on an outer surface of the printed circuit board; and a fence layer located between the conductive path and the grounding layer. Each conductive pin defines at least a soldering portion. The soldering portion is alignment to the through slot along a vertical direction.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 10, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: PING-SHENG SU, JUN CHEN, FENG-JUN QI, QING WANG
  • Publication number: 20120111615
    Abstract: A functional device according to an embodiment of the invention includes: an insulating substrate; a movable section; movable electrode fingers provided in the movable section; and fixed electrode fingers provided on the insulating substrate and arranged to be opposed to the movable electrode fingers. The fixed electrode fingers include: first fixed electrode fingers arranged on one side of the movable electrode fingers; and second fixed electrode fingers arranged on the other side of the movable electrode fingers. The first fixed electrode fingers and the second fixed electrode fingers are arranged to be spaced apart from each other.
    Type: Application
    Filed: October 20, 2011
    Publication date: May 10, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Mitsuhiro YODA, Shuichi KAWANO, Shigekazu TAKAGI, Seiji YAMAZAKI
  • Patent number: 8159827
    Abstract: When U-shape formed electronic components having an axial lead shape are mounted upright on a printed board, two U-shape formed electronic components having an axial lead shape are arranged so as not to be in the same straight line, and a wiring pattern is formed in a state where bent-side lead wires have the same electric potential, and the electronic components are inclined so as to place the bent-side lead wires close to each other, whereby the electronic components that tend to fall in the inclined direction can be mutually supported by the bent-side lead wires. Thus, the electronic components can be prevented from falling without spoiling a heat dissipation performance of the electronic component and the board, and without greatly deteriorating an assembly performance of the board.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Company
    Inventor: Hitoshi Kidokoro
  • Publication number: 20120085575
    Abstract: According to one embodiment, a manufacturing method for an electronic apparatus, which includes a housing, a substrate, pads on the substrate, and an electronic component, which includes a component body including a bottom surface, terminals arranged on the bottom surface of the component body, and a thermosetting resin disposed on the bottom surface of the component body and configured to remove an oxide film when heated, and is mounted on the substrate, the method includes putting the electronic component on the substrate, heating the electronic component, thereby softening the resin, causing the softened resin to flow, thereby forcing out a gas between the electronic component and the substrate and filling the resin between the electronic component and the substrate, and further heating the electronic component, thereby solder-bonding the terminals and the pads to one another and curing the resin between the electronic component and the substrate.
    Type: Application
    Filed: April 25, 2011
    Publication date: April 12, 2012
    Inventors: Nobuhiro Yamamoto, Takahisa Funayama
  • Patent number: 8153900
    Abstract: A wiring substrate with a lead pin is formed by bonding lead pins to electrode pads formed on a wiring substrate through conductive materials. In the lead pin, a conic protrusion part whose side surface is formed in a concave surface is formed in the end face side opposed to the electrode pad of a head part formed in one end of a shaft part. The lead pin is bonded to the electrode pad in a state in which the conductive material extends to the back surface side of a head part beyond a flange part of the head part and reaches the shaft part of the lead pin.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: April 10, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hirokazu Takeuchi, Kiyotaka Shimada, Masayoshi Ebe, Yoshinori Furihata
  • Patent number: 8148205
    Abstract: A method of making a microelectronic connection component is disclosed. A plurality of portions of a conductive, etch-resistant material is provided on a surface of a metallic sheet. The sheet is etched from the surface to form posts extending generally parallel to one another aligned with the portions of the etch-resistant material. A microelectronic device is provided having one of a front face or a rear face overlying first ends of the posts. Second ends of the posts remote from the first ends face away from the microelectronic device as interconnection terminals for the connection component. At least some of the posts are electrically connected to the microelectronic device.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: April 3, 2012
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Publication number: 20120067638
    Abstract: First and second terminals project from a circuit board and lie adjacent to each other with an interspace formed between the first and second terminals. An electronic apparatus further includes a projecting member projecting along a neighboring terminal which is one of the first and second terminals at such a position that the neighboring terminal is located between the projecting member and the interspace. The projecting member is located at an adjacent position adjacent to the neighboring terminal, to attract molten solder from the interspace toward the projecting member during soldering to join the first and second terminals to the circuit board.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 22, 2012
    Inventors: Daisuke YASUKAWA, Kazuhiko NAKANO, Hirofumi Watanabe, Atsushi YAMAGUCHI
  • Patent number: 8129627
    Abstract: A circuit board includes a semiconductor chip having an upper surface and side surfaces connected to the upper surface. A bonding pad is disposed on the upper surface of the semiconductor chip. A bump is disposed on the bonding pad and projects from the bonding pad by a predetermined height. A circuit board body has a recess part, and the semiconductor chip is positioned in the recess part so that the circuit board body covers the upper surface and the side surfaces of the semiconductor chip while exposing an end of the bump. A wiring line is disposed on the circuit board body and part of the wiring line is positioned over the bump. An opening is formed in a portion of the part of the wiring line over the bump to expose the bump. A reinforcing member physically and electrically connects the exposed bump and the wiring line.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: March 6, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Woong Sun Lee, Qwan Ho Chung, Ki Young Kim