Termination Post Patents (Class 174/267)
  • Patent number: 6465738
    Abstract: The present invention realizes proper grounding of a printed circuit board to a grounding conductor by solving the problems in soldering a grounding terminal to a printed circuit board by reflow soldering, relating to a mounting structure of a grounding terminal on a printed circuit board formed by soldering a grounding terminal to the printed circuit board. Two joint surfaces having different surface areas are formed within the joint part of the grounding terminal, and the grounding terminal is soldered to the conductive pattern on the printed circuit board corresponding to the joint surfaces by using the solder having an amount corresponding to the surface area of each joint surface. Also, the bending area as the center of elastic deformation of the contact part of the grounding terminal is formed at a predetermined distance away from the relatively small joint surface of the joint part.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: October 15, 2002
    Assignee: Kitigawa Industries Co., Ltd.
    Inventor: Hideo Yumi
  • Patent number: 6462281
    Abstract: A high-insulated stud comprises a first columnar conductive terminal of a first height, a second columnar conductive terminal of a second height lower than the height of the first conductive terminal that is placed in a row with and at a distance from the first conductive terminal, an insulating pedestal, and a first groove open at the top and a second groove intersecting the first groove and shallower than the first groove at the top of the first conductive terminal and a third groove open at the top, which is parallel with the first groove and whose bottom face is almost the same height as the bottom face of the first groove, at the top of the second conductive terminal.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: October 8, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Minoru Uchida, Hiroyuki Shimizu, Kiyoshi Chikamatsu
  • Publication number: 20020134583
    Abstract: A preferred method for coupling a transmission line to a circuit board includes the steps of: providing a circuit board with a first side and an opposing second side; dispensing solder upon the first side of the circuit board; providing a first coupler having a conductive lead portion and a ductile conductive tube portion extending from the conductive lead portion; engaging the conductive lead portion with the solder dispensed upon the first side of the circuit board; heating the circuit board, the solder and the conductive lead portion so that the solder reflows, thereby securing the first coupler to the first side of the circuit board; inserting an extremity of the first conductor into the ductile conductive tube portion; and crimping the ductile conductive tube portion so as to provide crimped retention of the first conductor therein. Circuit boards, devices and systems also are provided.
    Type: Application
    Filed: March 27, 2002
    Publication date: September 26, 2002
    Inventor: Robert Henry Noble
  • Patent number: 6455785
    Abstract: A bump connection is formed by stacking at least two metallic balls of different kinds of metals on a conductor of an electronic component such as a semiconductor device. The bump connection is obtained by forming the metallic balls using metallic wires. An apparatus for forming the connection includes a support, capillary member for having a wire pass therethrough, a pair of clamps for clamping the wire, and a “torch” (e.g., electrode, gas flame) which heats the tip of the wire, forming the ball. Successive balls can be formed by this apparatus atop the initially formed ball to provide a stacked configuration.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Hiroyuki Sakurai, Keizo Sakurai
  • Publication number: 20020117330
    Abstract: Contact structures exhibiting resilience or compliance for a variety of electronic components are formed by bonding a free end of a wire to a substrate, configuring the wire into a wire stem having a springable shape, severing the wire stem, and overcoating the wire stem with at least one layer of a material chosen primarily for its structural (resiliency, compliance) characteristics. A variety of techniques for configuring, severing, and overcoating the wire stem are disclosed. In an exemplary embodiment, a free end of a wire stem is bonded to a contact area on a substrate, the wire stem is configured to have a springable shape, the wire stem is severed to be free-standing by an electrical discharge, and the free-standing wire stem is overcoated by plating. A variety of materials for the wire stem (which serves as a falsework) and for the overcoat (which serves as a superstructure over the falsework) are disclosed.
    Type: Application
    Filed: December 28, 2001
    Publication date: August 29, 2002
    Applicant: FormFactor, Inc.
    Inventors: Benjamin Niles Eldridge, Gary William Grube, Igor Yan Khandros, Gaetan L. Mathieu
  • Patent number: 6441320
    Abstract: An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining a step having a step wall; b) a capping layer of first electrically conductive material coating the elevated surface only portions of the step wall, the capping layer having outer top and outer side portions; and c) a conductive trace of second electrically conductive material which is different from the first electrically conductive material; the conductive trace overlying the substrate, portions of the step wall not covered by the capping layer, and the outer side portions of the capping layer. Methods are disclosed for producing such a construction, for forming an electrically conductive projection outwardly extending from a substrate, and for providing an electrical interconnection between adjacent different elevation areas on a substrate.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: August 27, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 6441315
    Abstract: An apparatus providing improved interconnection elements and tip structures for effecting pressure connections between terminals of electronic components is described. The tip structure of the present invention has a sharpened blade oriented on the upper surface of the tip structure such that the length of the blade is substantially parallel to the direction of horizontal movement of the tip structure as the tip structure deflects across the terminal of an electronic component. In this manner, the sharpened substantially parallel oriented blade slices cleanly through any non-conductive layer(s) on the surface of the terminal and provides a reliable electrical connection between the interconnection element and the terminal of the electrical component.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: August 27, 2002
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Alec Madsen, Gaetan L. Mathieu
  • Patent number: 6437254
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 6432748
    Abstract: Disclosed is a structure of substrate and a fabricating method for IC (integrated circuit) chip package. Selected areas of the copper plate are etched for forming the plural conducting columns, and then an insulating layer is laminated to said copper plate to make said conducting columns embedded into said insulating layer. After portions of said insulating layer are removed for forming the plural blind vias each corresponding to exposed conducting columns, both said plural blind vias and the upper surface of said insulating layer are plated with a copper layer. An upper circuit layer and a lower circuit layer formed by etching said copper layer and said copper plate are covered with solder mask layers for protecting the substrate.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: August 13, 2002
    Assignee: Phoenix Precision Technology Corp.
    Inventor: Shih-Ping Hsu
  • Publication number: 20020104684
    Abstract: A tape circuit board for manufacturing a fine pitch semiconductor chip package, a method for manufacturing the tape circuit board, and a semiconductor chip package using the tape circuit board are provided. The tape circuit board includes an insulating base film having a first surface and a second surface. An adhesive layer is formed on the first surface of the base film. Further, wiring patterns are formed on the adhesive layer. Conductive bumps extend through the base film and the adhesive layer and are connected to the wiring patterns. The conductive bumps extend above the second surface of the base film.
    Type: Application
    Filed: January 28, 2002
    Publication date: August 8, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae-Woo Son, Hyoung-Chan Chang
  • Publication number: 20020096361
    Abstract: A pin standing resin substrate comprises: a resin substrate having a substantially plate-shaped main surface and comprising one of a resin and a composite material containing a resin, with a pin-pad exposed from the main surface; and a pin solder-jointed to the pin-pad, wherein the pin has been subjected to thermal treatment so as to soften the pin, and comprises a rod-like portion and an enlarged diameter portion having the same material as the rod-like portion, the enlarged diameter portion having a larger diameter than the rod-like portion and being formed at one end of the rod-like portion, and at least the enlarged diameter portion is soldered to the pin-pad.
    Type: Application
    Filed: April 10, 2001
    Publication date: July 25, 2002
    Inventors: Hajime Saiki, Noritaka Miyamoto
  • Publication number: 20020096360
    Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 25, 2002
    Inventors: Mon Nan Ho, C. H. Chen, Yen Cheng Huang, Li Huan Chen, Kuo Feng Peng, Jichen Wu, Allis Chen, Wen Chuan Chen
  • Patent number: 6423907
    Abstract: A connection component for making connections to a microelectronic element is made by providing leads on a surface of a polymeric layer and etching the polymeric layer to partially detach the leads from the polymeric layer, leaving a portion of each lead releasably connected to the polymeric layer by a small polymeric connecting element which can be broken or peeled away from the lead. Leads in a connecting element may be covered by an insulating jacket applied by a coating process, and the insulating jacket may in turn be covered by a conductive layer so that each lead becomes a miniature coaxial cable. This arrangement provides immunity to interference and facilitates operation at high speeds.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: July 23, 2002
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Konstantine Karavakis
  • Patent number: 6420661
    Abstract: A connector element for connecting microelectronic elements includes a dielectric sheet having pairs of elongated, flexible leads in registry on opposite surfaces of the sheet. The leads are connected at their terminal ends which are in registry with each other. The terminal ends are offset from the tip ends in a horizontal direction. The tip ends are releasably attached to the surfaces of the dielectric sheet. The tip ends may be connected to microelectronic elements, which may be displaced relative to each other in a vertical direction.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: July 16, 2002
    Assignee: Tessera, Inc.
    Inventors: Thomas Di Stefano, John W. Smith
  • Patent number: 6420658
    Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: July 16, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Patent number: 6416849
    Abstract: The surface metallurgy of a green sheet may be controlled during processing to provide an increased resistance to low strength structural failure of the metal-ceramic interface under an input-output pad structure and increased pin-pull strength of input-output pads on alumina multilayer ceramic substrates. The surface area on a green sheet in the region where an input-output pad is to be screened is roughened in order to increase the contact surface area between the green sheet and the input-output pad. The mechanical interlock between the metal-ceramic interface is strengthened by the increased number of bonding points between the green sheet and the input-output metallurgy and the use of different screening materials.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: July 9, 2002
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan
  • Publication number: 20020084107
    Abstract: A substrate is configured to electrically interconnect a semiconductor chip to an external device. The substrate preferably includes a ground plane that is electrically interconnected to a ground power of the semiconductor chip. An insulating layer is attached to the ground plane. A pattern layer is attached to the insulating layer. The pattern layer includes signal patterns that communicate electrical signals with the semiconductor chip and ground patterns that are electrically interconnected to the ground plane. The ground patterns can include bonding lands to provide electrical connection to the semiconductor chip. The bonding lands can be further provided with first via holes that electrically interconnect the ground patterns to the ground plane.
    Type: Application
    Filed: December 27, 2001
    Publication date: July 4, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tae-Sub Chang, Dong-Ho Lee
  • Patent number: 6399900
    Abstract: A contact structure for achieving an electrical connection with a contact target is formed by producing a contactor on a planar surface of a substrate by a microfabrication technology. The contact structure is comprised of a substrate having a planar surface, a groove formed on the substrate lower than the planar surface, and a contactor formed on the substrate. The contactor includes a horizontal portion which is a substantially straight beam with a fixed and a free end, and a contact portion mounted on the free end of the horizontal portion in a direction perpendicular to the horizontal portion. The fixed end is connected to the substrate and the free end is positioned over the groove on the substrate. The groove provides a free space for the contactor when it is pressed against the contact target such that the free end of the horizonal beam enters the groove.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: June 4, 2002
    Assignee: Advantest Corp.
    Inventors: Theodore A. Khoury, James W. Frame
  • Patent number: 6385052
    Abstract: A drive unit for power control of electric motors comprises a circuit board (10) with surface leads and a number of logic components as well as power controlling semi-conductors (11), and two or more power distribution bars (16) which extend along the circuit board (10) and are connected to a power source and/or one or more motor connections. Each of the power distribution bars (16) is a sheet metal stamping formed with a number of integral connector pins (20) which are to be received in a number of apertures (22) in the circuit board (10) and rigidly connected to the surface leads for communication with the semi-conductors (11). Each one of the power distribution bars (16) is stamped from a flexible thin sheet metal and is folded along a longitudinal line (31) into two parallel sections (32,33). The connector pins (20) extend from a first one (32) of the two sections (32,33).
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 7, 2002
    Assignee: Inmotion Technologies AB
    Inventor: Peter Klas Svensson
  • Patent number: 6376782
    Abstract: In a resinous circuit board having a circuitized substrate having conductive layers therewithin, a plurality of pin pads formed on a rear surface of the substrate, and a plurality of pins, each pin having a tip end portion and a head portion and soldered to the pin pad in such a manner as to contact at the head portion to the pin pad. The head portion of the pin consists of a flange section which is larger in diameter than the tip end portion, and a part-spherical abutment section bulging from the flange section in the direction opposite to the tip end portion and brought into contact with the pin pad. The part-spherical abutment section is made of eutectic silver solder which is lower in melting point than solder such as Sn—Ag solder which is used for soldering the pin to the pin pad. Since the silver solder and soft solder are present between the flange section and the pin pad, they can release the stress applied to the pin, thus making it possible to increase the joining strength considerably.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: April 23, 2002
    Assignee: NGK-Spark Plug Co., Ltd.
    Inventors: Kazuo Kimura, Hajime Saiki, Mitsuo Shiraishi, Yosuke Kondo
  • Publication number: 20020038726
    Abstract: A first wiring layer and metallized plated-through holes are formed in/on a substrate. A substrate layer is then applied to the top of the substrate by injection molding, during which an injected material passes through the plated-through holes, resulting in polymer studs being produced on an underside of the substrate. A second wiring layer, formed on the substrate layer, is electrically conductively connected to the first wiring layer by blind plated-through holes, and hence to external connections on the polymer studs by the plated-through holes.
    Type: Application
    Filed: February 26, 2001
    Publication date: April 4, 2002
    Inventor: Jozef Van Puymbroeck
  • Publication number: 20020027022
    Abstract: A front-and-back electrically conductive substrate includes a plurality of posts composed of a material that can be anisotropically etched and having an electrically conductive portion that has at least a first surface and a second surface that communicate with each other, and an insulative substrate that supports the plurality of posts.
    Type: Application
    Filed: February 15, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventor: Kiyokazu Moriizumi
  • Patent number: 6353191
    Abstract: An electrical connector apparatus for establishing a connection between an electrical connector and a substrate. A column of solder is disposed about a tail portion of a terminal of the electrical connector to form a solder column. The solder column being adapted for making an electrical contact between the electrical connector and the substrate. Increasing the height of the solder column improves compliance in the connection between the terminal and the substrate. This feature of improved compliance allows the terminal to absorb higher stresses present between the substrate and the connector body thereby avoiding fracture of the solder joint between the terminal and the substrate. In addition, the terminal tail acts to reinforce the solder column and this metal core of the solder column increases the mechanical properties of the attachment between the connector body and the substrate. A method of forming the solder column is also disclosed.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: March 5, 2002
    Assignee: FCI Americas Technology, Inc.
    Inventor: Donald K. Harper, Jr.
  • Patent number: 6353190
    Abstract: A circuit board assembly containing two pluralities of busbars or wires arranged in a lattice configuration, there being electrical continuity at each of the intersecting points. Slits are provided on each of the busbars which engage each other to complete the lattice. In the case of wires, they are bonded to each other. The conductive member thus formed may be sandwiched between two insulative films and is placed on an insulative plate which, in turn, is enclosed by an electrical connection box. The configuration provides substantial advantages in economy of production, simplified equipment required, and ease of altering the circuitry.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: March 5, 2002
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Tatsuya Sumida, Masanobu Sato, Kazuhiro Aoki
  • Publication number: 20020000329
    Abstract: An apparatus, program product and method for processing circuit boards containing area array surface treated bonding sites, such as noble metal terminal pads of a Land Grid Array (LGA) assembly. The circuit board includes a plurality of apertures patterned about the bonding site for form a footprint. A protective cover shaped to conform to the footprint includes posts registered to removably fit into the apertures. The protective cover remains overlaid on the circuit board during fabrication processes such as solder screen printing, rework, and washing, and then removed. Thus, contamination from the fabrication processes is avoided, as well as eliminating possible sources of contamination from use of adhesive tape for protection.
    Type: Application
    Filed: August 8, 2001
    Publication date: January 3, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark Kenneth Hoffmeyer, Daniel Scott Johnson
  • Patent number: 6331681
    Abstract: Electrical connection device for forming electrical connection between a first portion and a second portion of a semiconductor device. The first portion is set near or in contact with the second portion. The first and second portions are electrically connected by spraying fine metal particles of gold, nickel or copper in a carrier gas of helium, argon, hydrogen or nitgrogen on the first and second portions to form a metal bump. Prior to spraying the fine metal particles to form the metal bump, hard particles of titanium, copper, hafnium, zirconium or vanadium may be sprayed on the first and second portions to remove contamination layers.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: December 18, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuya Okumura
  • Publication number: 20010040460
    Abstract: A high density integrated test probe and method of fabrication is described. A group of wires are ball bonded to contact locations on the surface of a fan out substrate. The wires are sheared off leaving a stub, the end of which is flattened by an anvil. Before flattening a sheet of material having a group of holes is arranged for alignment with the group of stubs is disposed over the stubs. The sheet of material supports the enlarged tip. The substrate with stubs form a probe which is moved into engagement with contact locations on a work piece such as a drip or packaging substrate.
    Type: Application
    Filed: November 23, 1998
    Publication date: November 15, 2001
    Inventors: BRIAN SAMUEL BEAMAN, KEITH EDWARD FOGEL, PAUL ALFRED LAURO, MAURICE H. NORCOTT, DA-YUAN SHIH, GEORGE FREDERICK WALKER
  • Patent number: 6307161
    Abstract: Elongate contact structures (interconnection elements) are (formed on electronic components by bonding one (proximal) end of a core element to a terminal of the electronic component and applying a metallic material over the end portion of the core element. The metallic material may also cover a distal end portion of the core element. A central portion of the core element is not covered by the metallic material, but is preferably covered by a masking (insulating) material.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: October 23, 2001
    Assignee: FormFactor, Inc.
    Inventors: Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6303874
    Abstract: A liquid crystal display module (1) constructed such that a base end portion (20A) of a pin terminal (20) is joined to an input terminal (18) of a liquid crystal panel (10). A front end portion (20B) of the pin terminal (20) is disposed inwardly of the outer peripheral edge of the liquid crystal panel (10). This allows the portion where the pin terminal (20) is soldered to the circuit board (2) to be located at the back of the liquid crystal panel (10). The amount of space used for mounting the liquid crystal display module (1) onto the circuit board (2) can be minimized, that is it can be reduced by an amount based on the size of the liquid crystal panel 10, thereby allowing very efficient use of space.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: October 16, 2001
    Assignee: Seiko Epson Corporation
    Inventor: Eiji Muramatsu
  • Patent number: 6303876
    Abstract: An LSI package structure having a smaller size in which the wiring length is shortened. The wiring structure for connecting the LSI 2 with the wiring board 1 comprises first connecting terminals 3 arrayed on the LSI 2 and second connecting terminals 6 arrayed on the wiring board 1. The first connecting terminals 3 are arrayed on the outer periphery 5 of the facing surface 4 which faces the wiring board 1 and the second connecting terminals 6 are arrayed on the interfacing surface 7 which intersects with the outer periphery 5. In such a structure, the wiring board 1 is similar to the LSI 2 in size. The facing surface 4 actually intersects with the intersecting face 7 for forming a intersecting line 8. The facing surface 4 substantially intersects with the intersecting face 7 along the intersecting line 8. Such a structure makes the size of the wiring board 1 smaller than that of the LSI 2.
    Type: Grant
    Filed: May 12, 2000
    Date of Patent: October 16, 2001
    Assignee: NEC Corporation
    Inventor: Hirokazu Miyazaki
  • Patent number: 6300579
    Abstract: The present invention realizes proper grounding of a printed circuit board to a grounding conductor by solving the problems in soldering a grounding terminal to a printed circuit board by reflow soldering, relating to a mounting structure of a grounding terminal on a printed circuit board formed by soldering a grounding terminal to the printed circuit board. Two joint surfaces having different surface areas are formed within the joint part of the grounding terminal, and the grounding terminal is soldered to the conductive pattern on the printed circuit board corresponding to the joint surfaces by using the solder having an amount corresponding to the surface area of each joint surface. Also, the bending area as the center of elastic deformation of the contact part of the grounding terminal is formed at a predetermined distance away from the relatively small joint surface of the joint part.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: October 9, 2001
    Assignee: Kitagawa Industries, Co., Ltd.
    Inventor: Hideo Yumi
  • Publication number: 20010025725
    Abstract: An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining a step having a step wall; b) a capping layer of first electrically conductive material coating the elevated surface only portions of the step wall, the capping layer having outer top and outer side portions; and c) a conductive trace of second electrically conductive material which is different from the first electrically conductive material; the conductive trace overlying the substrate, portions of the step wall not covered by the capping layer, and the outer side portions of the capping layer. Methods are disclosed for producing such a construction, for forming an electrically conductive projection outwardly extending from a substrate, and for providing an electrical interconnection between adjacent different elevation areas on a substrate.
    Type: Application
    Filed: May 3, 2001
    Publication date: October 4, 2001
    Inventor: Salman Akram
  • Patent number: 6291780
    Abstract: A method of, and device (10) for, connecting a plurality of flexible printed circuits (12) each comprising a layer (14) of electrically insulating material and a layer (16) of electrically conducting material. The method including the steps of forming a hole (18) through each flexible printed circuit; positioning first and second substantially rigid plates (20,22) of electrically insulating material on either side of the flexible printed circuits with the holes in the flexible printed circuits aligned with a corresponding hole (26,28) in each plate; extending a rivet (24) of electrically conducting material through the aligned holes to electrically connect with the layers of electrically conducting material on the flexible printed circuits; and enlarging the ends (30,32) of the rivet to secure the flexible printed circuits between the plates. Provides an improved electrical and mechanical connection between FPCs.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: September 18, 2001
    Assignee: Delphi Technologies, Inc.
    Inventors: Bernd Schleife, Wulf Bramesfeld, Frank Schliep, Tarik Gunay
  • Patent number: 6274823
    Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond. The component carries the contact structures on both sides, the spacing of the structures on the first side being different than that of the second side.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: August 14, 2001
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6272741
    Abstract: A circuit board interconnect system includes a carrier board with a hybrid solder ball and pin grid array. A plurality of electrically conductive pins extend through the carrier board and are arranged in rows and columns to form a grid array. A first circuit board such as a multi-chip module (MCM) board has a plurality of conductive pads or traces formed on a lower surface thereof that are arranged to form a complementary grid array, i.e. the spacing and location of the conductive pads or traces corresponds to the spacing and location of the pins. A plurality of solder balls are provided with each ball being positioned on top of a corresponding pin so that each solder ball forms a solder connection between a pin and a corresponding conductive pad or trace. A second circuit board such as a computer mother board has a pin connector mounted on an upper surface thereof for individually receiving and providing electrical connection with each of the pins.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: August 14, 2001
    Assignees: Autosplice, Inc., Xetel Corp.
    Inventors: Craig M. Kennedy, Julian Curtis Hart, Fernando J. Ramirez
  • Patent number: 6271480
    Abstract: The electronic device is provide that includes a body having an underside; a plurality of conducting members for transferring electronic signals; and at least two alignment pins mounted perpendicularly on the underside. Each of the alignment pins has a flexible portion that is more easily bendable than the other portions.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: August 7, 2001
    Assignee: NEC Corporation
    Inventors: Yukio Yamaguti, Hironobu Ikeda
  • Publication number: 20010010121
    Abstract: A method of manufacturing a wiring board comprising the steps of winding an electrical wire around a insulating plate having a number of electrical wire grooves for placing an electrical wire therein and a number of terminal grooves formed at positions corresponding to the electrical wire grooves in which the attached pressure connection terminal is connected to the electrical wire making use of the electrical wire grooves; cutting the electrical wire wound around the insulating plate at desired positions; and attaching the pressure connection terminal at a desired position in the number of terminal grooves, a wiring board, and an electrical connection box manufactured by accommodating the wiring box in a casing.
    Type: Application
    Filed: January 26, 2001
    Publication date: August 2, 2001
    Inventors: Masakazu Murakami, Mitsuo Tanaka, Tatsuo Satori
  • Patent number: 6259040
    Abstract: The present invention relates to an electrical printed circuit board having plug contact elements oriented with its longitudinal axis parallel to the surface of the printed circuit board. The plug contact elements are connected to the printed circuit board by means of a reflow soldering process. The printed circuit board solves the technical problem of holding the plug contact elements, which are to be mounted horizontally on the printed circuit board, in designated positions from the time of placement until setting of the solder connection. The technical problem is solved, without the aid of additional mechanical components, adhesive media or the like, by aperture or slots in a second printed circuit board portion. The lengths and widths of the slots are dimensioned to cooperate with the lengths and widths of the plug contact elements to hold the plug contact elements in optimum soldering positions on the printed circuit board.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: July 10, 2001
    Assignee: Leopold Kostal GmbH & Co. KG
    Inventor: Uwe Hütz
  • Patent number: 6259038
    Abstract: A semiconductor chip mounting circuit board includes a substrate, a wiring circuit formed on a substrate, a conducting pad electrically connected to an electrode of a semiconductor chip which is to be mounted on the substrate. An insulating resist layer is formed on the substrate to cover the wiring circuit and the resist layer has an opening to expose therein the conducting pad. A conducting bump is formed on the conducting pad exposed in the opening. A resist layer has a measuring opening which exposes a reference surface. A height of the conducting bump can be measured by an optical means using the measuring opening.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: July 10, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Naoyuki Koizumi, Kenkichi Arai
  • Patent number: 6255601
    Abstract: A conductive feedthrough connector for conducting electrical current through a ceramic body. A ceramic body is generally fabricated by stacking a plurality of layers of ceramic material and then sintering the stack of layers to cure the layers into a unitary, solid ceramic body. In accordance with the present invention, as each layer is positioned, a portion of the layer is silk screened with conductive material prior to the next layer being positioned atop the silk screened layer. Each silk screen region is coaxially aligned along an axis through the ceramic body. The stack of silk screened layers are then sintered to form a solid ceramic body containing the plurality of stacked metal electrodes. A first conductor is then formed vertically into the ceramic body to interconnect the embedded electrodes. From the opposite side of the ceramic body, a second conductor is formed into the surface passing through and interconnecting one or more the layers of electrodes.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: July 3, 2001
    Assignee: Applied Materials, Inc.
    Inventor: Vince Burkhart
  • Patent number: 6248962
    Abstract: An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining a projection or a step having a step wall and being of the same material as the substrate; b) a capping layer of first electrically conductive material coating the top surface and only portions of the sides of the step or projection, the capping layer having outer top and outer side portions; and c) a conductive trace of second electrically conductive material which is different from the first electrically conductive material; the conductive trace overlying the substrate, portions of the sides of the step or projection not covered by the capping layer, and the outer side portions of the capping layer.
    Type: Grant
    Filed: October 22, 1998
    Date of Patent: June 19, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 6229101
    Abstract: A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole. The length of the secondary projection pair is less than the inside diameter of the through hole.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: May 8, 2001
    Assignee: Ibiden Co. Ltd.
    Inventors: Masataka Sekiya, Tsunehisa Takahashi, Akihiro Demura, Takuji Asai
  • Patent number: 6225573
    Abstract: There are provided a coating step for coating solder paste (3) onto the circuit board (1), a superimposing step for superimposing a connecting end (4a) of a terminal (4) also having a non-connecting end (4b) on the regions coated with solder paste (3), and a heating step for heating and melting the solder paste (3) in order to solder the connecting end (4a) onto the circuit board (1). A further step for coating adhesive material (6) onto the circuit board (1) is provided, and in the aforementioned superimposing step, the connecting end (4a) is brought into contact with the regions coated with the adhesive material (6). In the aforementioned heating step, the solder paste (3) is heated and caused to melt whilst the connecting end (4a) is in a bonded state with respect to the circuit board (1) by means of the adhesive material (6).
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: May 1, 2001
    Assignee: Rohm Co., Ltd.
    Inventor: Satoshi Nakamura
  • Patent number: 6191368
    Abstract: A lead element for a microelectronic connection has a rigid body section connected to two parallel strip-like flexible leg sections. The leg sections each have tip ends that are offset from the rigid body section in a horizontal direction. The tip end of one leg section is permanently connected to a first microelectronic element. The tip end of the other leg section is releasably connected to the first microelectronic element and permanently connected to a second microelectronic element. Moving the first tip end relative to the second tip end in a vertical direction causes flexure of the leg sections in opposite directions.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: February 20, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas Di Stefano, John W. Smith
  • Patent number: 6188028
    Abstract: A multilayer structure includes a plurality of stacked circuit panels interconnected by posts extending through each panel. Circuit traces provided on one or both surfaces of each circuit panel interconnect the connectors in a predetermined pattern. The connectors are provided with a blind via which is in electrical contact with a pair of contact pads on either surface of the circuit panel. One of the contact pads has an opening to allow access of a connecting post to the interior of the blind via, the other contact pad having a protruding post. The circuit panels are interconnected by inserting the post of one circuit panel into the blind via of an adjacent circuit panel.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: February 13, 2001
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Masud Beroz
  • Patent number: 6177636
    Abstract: A subtractively created interconnection scheme and apparatus, typically used with microelectronic devices, wherein a flexible support structure is attached to a conductive sheet. The conductive sheet is then selectively removed, preferably using an etching process, thereby producing a plurality of posts with tips which are substantially coplanar with respect to one another. Each post becoming an individual interconnection between the microelectronic device and a supporting substrate.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: January 23, 2001
    Assignee: Tessera, Inc.
    Inventor: Joseph C. Fjelstad
  • Patent number: 6172308
    Abstract: A terminal attachment structure includes a circuit assembly and a terminal attached to the circuit assembly. The circuit assembly has an insulating substrate and a circuit printed on the insulating substrate. The terminal is composed of a circuit-contact part, a connecting part to be connected with a mating terminal and a cradle part arranged between the circuit-contact part and the connecting part. When a force directing the insulating substrate is applied on the connecting part, the cradle part operates to receive the force. Accordingly, the circuit-contact part does not rise from the insulating substrate, so that clattering of the terminal against the circuit assembly can be prevented.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: January 9, 2001
    Assignee: Yazaki Corporation
    Inventors: Makoto Katsumata, Toshiyuki Mori, Hitoshi Ushijima
  • Patent number: 6166333
    Abstract: The present invention includes composite support substrate for both flexible and rigid board circuit applications and method of making the same. The composite substrate is composed of at least two materials formed under the circuitry. A first material is a conventional matrix such as a polyimide/acrylic adhesive, and a second material having unique properties that are useful locally in isolated locations. For instance, the second material may be nonporous to moisture, optically clear, and/or thermally conductive. The second material is integrated into the circuit matrix at specific localized areas where desired with portions coplanar with the first material so that circuit traces remain continuous as they pass from the first material to the second.
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: December 26, 2000
    Assignee: Packard Hughes Interconnect Company
    Inventors: William R. Crumly, Haim Feigenbaum
  • Patent number: 6150616
    Abstract: In an electroconductive contact unit, a base end of a compression coil spring which may be either a contact member itself or a spring member for urging a needle-shaped contact member is received in a support recess formed in a base board. An end of the internal conductor of the base board is exposed on the bottom end of the support recess, and is electrically connected to the base end of the compression coil spring. There is no need for any electric connector, and the electric resistance between the internal conductor of the base board and the contact member can be minimized. To ensure a favorable electric connection, a base end of the compression coil spring may be soldered to the exposed end of the internal conductor which may be either flat or recessed.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: November 21, 2000
    Assignee: NHK Spring Co., Ltd.
    Inventor: Toshio Kazama
  • Patent number: 6115912
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: September 12, 2000
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi