Termination Post Patents (Class 174/267)
  • Patent number: 6723928
    Abstract: An electronic device includes a flat flexible dielectric substrate less than 0.050 inch thick and having a generally round hole of a given diameter. A substantially square or polygonal terminal pin is inserted into the round hole in the substrate. The pin has a given cross-dimension between opposite diametral corners thereof greater than the diameter of the round hole. The difference between the cross-dimension of the pin and the diameter of the round hole is on the order of 7% to 67% of the diameter of the hole.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: April 20, 2004
    Assignee: Molex Incorporated
    Inventors: Paul Christopher Berg, Harry N. Etters, Robert M. Fuerst, Todd A. Hester, Fred Love Krehbiel
  • Patent number: 6720500
    Abstract: A plug-in type electronic control unit is comprised of a wiring board, a plurality of electronic parts mounted on one surface of the wiring board by utilizing a wireless bonding process, and a plug member mounted on the other surface of the wiring board by utilizing a wireless bonding process. It is possible to suppress the planar extent of the unit by such a laminated structure, and to suppress the extent of the unit in a laminating direction by the employment of the wireless bonding process. Thus, it is possible to achieve a reduction in size of the plug-in type electronic control unit.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: April 13, 2004
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventor: Masajiro Inoue
  • Publication number: 20040064941
    Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.
    Type: Application
    Filed: September 29, 2003
    Publication date: April 8, 2004
    Applicant: FormFactor, Inc.
    Inventors: Thomas H. Dozier, Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen, Michael A. Stadt
  • Patent number: 6717066
    Abstract: To accommodate thermal stresses arising from different coefficients of thermal expansion (CTE) of a packaged or unpackaged die and a substrate, the package incorporates two or more different interconnect zones. A first interconnect zone, located in a central region of the die, employs a relatively stiff interconnect structure. A second interconnect zone, located near the periphery of the die, employs a relatively compliant interconnect structure. Additional interconnect zones, situated between the first and second interconnect zones and having interconnect structure with compliance qualities intermediate those of the first and second zones, can optionally be employed. In one embodiment, solder connections providing low electrical resistance are used in the first interconnect zone, and compliant connections, such as nanosprings, are used in the second interconnect zone.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: April 6, 2004
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Yuan-Liang Li
  • Patent number: 6717068
    Abstract: The invention provides a magnetic head capable of positively preventing electrostatic breakdown of an MR magnetic head device, and a method of manufacturing the magnetic head. A circuit board comprises at least a pair of leads for constructing a circuit, lands connected respectively to the leads, and solder bumps formed respectively on the lands. The solder bumps are arranged in an adjacent relationship and, when the solder bumps are crushed, peripheral portions of the solder bumps are pressed or spread so as to overlap with each other. The magnetic head includes the circuit board.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: April 6, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventors: Michiharu Motonishi, Michiaki Moroe
  • Patent number: 6717421
    Abstract: In an electric contact probe assembly, an electroconductive patch is attached to a part of the support sheet so as to cover a through hole formed in the support sheet from a front side thereof, and a base end of an electroconductive resilient probe member is attached to the patch. The patch is connected to a terminal of a circuit board both electrically and physically via a solder lump placed in the through hole. The patch may also be attached to the reverse side of the support sheet. In this case, the base end of the resilient probe member is partly received in the through hole. The contact probe assembly of the present invention is suited for a high density design comprising a large number of extremely small resilient probe members one next to the other while simplifying the fabrication process.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: April 6, 2004
    Assignee: NHK Spring Co., Ltd.
    Inventor: Toshio Kazama
  • Patent number: 6711030
    Abstract: A printed circuit board unit has smaller number of pins in connectors for connection of wiring (signal lines and power source lines) between a plurality of printed circuit boards for increasing mounting space of the board and interconnection method of wiring between printed circuit boards. The printed circuit board unit includes a plurality of printed circuit boards having wiring formed thereon, a part of the wiring on the printed circuit boards electrically connected through connectors, a screw formed of electrically conductive body and fixing the plurality of printed circuit boards with preventing the connectors from disengaging from each other, and remaining part of the wiring on the printed circuit boards electrically connected through the screw.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: March 23, 2004
    Assignee: NEC Corporation
    Inventor: Akihiro Akiba
  • Patent number: 6688790
    Abstract: A keyboard input device comprises a lever-mounting plate for supporting the lower ends of a pair of lever members in an engaged manner, a circuit board on which the lever-mounting plate is placed and is forming a circuit pattern on a surface facing the lever-mounting plate, a hollow rubber spring adhered onto the circuit board, and a key top supported by the pair of lever members and is urged by the elastic urging force of the rubber spring in a direction to separate away from the circuit board, wherein the circuit board has an insulating layer for insulating and covering the circuit pattern, the insulating layer having a surface area larger than that of the lever-mounting plate permitting the lever-mounting plate to be placed thereon via an uppermost layer.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: February 10, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventor: Hideki Ito
  • Publication number: 20040003943
    Abstract: In the multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 8, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Kenji IIda
  • Patent number: 6674018
    Abstract: Proper grounding of a printed circuit board to a grounding conductor by solving the problems in soldering a grounding terminal to a printed circuit board by reflow soldering, relating to a mounting structure of a grounding terminal on a printed circuit board formed by soldering a grounding terminal to the printed circuit board. Two joint surfaces having different surface areas are formed within the joint part of the grounding terminal, and the grounding terminal is soldered to the conductive pattern on the printed circuit board corresponding to the joint surfaces by using the solder having an amount corresponding to the surface area of each joint surface. Also the bending area as the center of elastic deformation of the contact part of the grounding terminal is formed at a predetermined distance away from the relatively small joint surface of the joint part.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: January 6, 2004
    Assignee: Kitigawa Industries Co., Ltd.
    Inventor: Hideo Yumi
  • Patent number: 6674015
    Abstract: A multi-layer interconnection board, includes a multi-layer structure in which plural interconnections are provided and which includes a ground layer, and a hole part provided in the multi-layer structure. A conductive part is provided on an internal wall part of the hole part.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: January 6, 2004
    Assignee: Fujitsu Limited
    Inventor: Shinji Aoki
  • Publication number: 20040000428
    Abstract: A readily demountable socketless package to circuit board assembly is disclosed. The assembly includes a soft solder area and a metallic contact element, each located on copper pads. The metallic contact element is adapted to sufficiently penetrate the soft solder area to provide electrical contact. The metallic contact element can be either a sharp metallic element or a spring. Compressive force from a clamping mechanism ensures a secure electrical contact and adequate thermal performance.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 1, 2004
    Inventors: Mirng-Ji Lii, Yuan-Liang Li, Chia-Pin Chiu
  • Patent number: 6664484
    Abstract: A connection component for making connections to a microelectronic element is made by providing leads on a surface of a polymeric layer and etching the polymeric layer to partially detach the leads from the polymeric layer, leaving a portion of each lead releasably connected to the polymeric layer by a small polymeric connecting element which can be broken or peeled away from the lead. Leads in a connecting element may be covered by an insulating jacket applied by a coating process, and the insulating jacket may in turn be covered by a conductive layer so that each lead becomes a miniature coaxial cable. This arrangement provides immunity to interference and facilitates operation at high speeds.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: December 16, 2003
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Konstantine Karavakis
  • Patent number: 6660941
    Abstract: An electronic parts mounting board includes an electrode circuit base member having electrodes on at least one surface; projecting electrodes bonded to the electrodes of the electrode circuit base member; an insulating member provided on the electrode circuit base member in such a manner as to insulate the electrodes of the electrode circuit base member and the projecting electrodes; and circuit electrode patterns provided on the insulating member and the projecting electrodes. In this mounting board, the projecting electrodes are formed by forming specific projecting conductive members at specific positions of the circuit electrode patterns by plating, and pressing the projecting conductive members in the insulating member so as to pass through the insulating member and reach the electrodes of the electrode circuit base member.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: December 9, 2003
    Assignee: Sony Corporation
    Inventors: Sakan Iwashita, Haruhiko Makino, Hidetoshi Kusano
  • Patent number: 6660946
    Abstract: A pin standing resin substrate comprises: a resin substrate having a substantially plate-shaped main surface and comprising one of a resin and a composite material containing a resin, with a pin-pad exposed from the main surface; and a pin solder-jointed to the pin-pad, wherein the pin has been subjected to thermal treatment so as to soften the pin, and comprises a rod-like portion and an enlarged diameter portion having the same material as the rod-like portion, the enlarged diameter portion having a larger diameter than the rod-like portion and being formed at one end of the rod-like portion, and at least the enlarged diameter portion is soldered to the pin-pad.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: December 9, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Noritaka Miyamoto
  • Patent number: 6657136
    Abstract: Terminating resistances are provided to at least some pins of an ASIC or other multi-pin component mounted on a surface of a circuit board, by positioning a second circuit board on the surface of the main circuit board substantially opposite, and preferably aligned with or overlapping, the multi-pin component. The second circuit board accommodates a resistor such as a printed resistor, surface mount resistor or buried resistor. Preferably, vias in the main circuit board connect pins of the ASIC to terminating resistors. Preferably one or both of the ASIC and the second circuit board are coupled to the main circuit board by a ball grid array.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 2, 2003
    Assignee: Cisco Technology, Inc.
    Inventors: Peter Liao, Zsolt G. Takacs
  • Patent number: 6652311
    Abstract: A polarizing system is provided in a connector for electrically interconnecting the conductors of a flat flexible circuit to the conductors of a complementary connecting device. The flat flexible circuit has a longitudinal center-line and a pattern of polarizing holes therein asymmetrical to the center-line. A connector body member positions the flat flexible circuit thereon and has an asymmetrical pattern of polarizing posts insertable into the polarizing holes of the flat flexible circuit.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: November 25, 2003
    Assignee: Molex Incorporated
    Inventors: Yves LePottier, Robert M. Fuerst, David A. Pfaffinger, Jonathan D. Lohman
  • Patent number: 6648211
    Abstract: A pin standing resin substrate including a resin substrate having a substantially plate-shaped main surface and composed of one of a resin and a composite material containing a resin, and having a pin-pad exposed from the main surface; and a pin soldered to the pin-pad, wherein the pin has been thermally treated by heating so as to soften the pin. The pin has a rod-like portion composed of a copper base metal and an enlarged diameter portion made of the same material as the rod-like portion. The enlarged diameter portion has a larger diameter than the rod-like portion and is formed at one end of the rod-like portion. At least the enlarged diameter portion is soldered to the pin-pad. Also disclosed is a method of making the pin standing resin substrate, a pin for bonding with the resin substrate, and a method of making the pin.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: November 18, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Noritaka Miyamoto
  • Patent number: 6643923
    Abstract: A process for manufacturing a flexible wiring board according to the present invention includes growing metal bumps (16) using a mask film patterned by photolithography. Fine openings are formed in a polyimide film with good precision allowing fine metal bumps (16) to be formed with good precision. After metal bumps (16) have been formed, the mask film is removed and a liquid resin material is applied and dried to form a coating, which is then cured into a resin film. The coating can be etched at surface portions during coating stage to expose the tops of metal bumps (16).
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: November 11, 2003
    Assignee: Sony Chemicals Corp.
    Inventors: Hiroyuki Hishinuma, Hideyuki Kurita, Ryo Ito, Masayuki Nakamura
  • Patent number: 6633490
    Abstract: An electronic board assembly carrying connectors on each side of its lower edge which is adapted to withstand the relatively strong forces required to insert or remove the assembly, e.g., from a backplane board, and yet provide many electrical contacts along the interconnection sites. The electronic board assembly comprises two symmetrical elementary PCBs electrically coupled together, each carrying a connector on its external lower edge. In one embodiment, these two PCBs are coupled together by a flexible adhesive insulative layer and maintained by mechanical devices such that the distance between these two connectors is set to a predetermined distance (to align precisely with the backplane board). The mechanical device used to maintain a predetermined distance between the two connectors of the assembly may comprise a U-shaped member, the upper part of this member being strategically inserted between these connectors.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corporation
    Inventors: Bruno Centola, Claude Gomez, Christian Ouazana
  • Patent number: 6627824
    Abstract: A support circuit is adapted to be mechanically and electrically coupled to a semiconductor chip such that the support circuit and the chip in combination form a semiconductor chip assembly. The support circuit includes an insulative base and a conductive trace embedded in the insulative base. The conductive trace is a single continuous piece of metal, the conductive trace includes a pillar that extends above the insulative base and a routing line that is substantially covered by and extends below the insulative base, and an opening in the routing line has tapered sidewalls and a diameter that increases as height increases.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: September 30, 2003
    Inventor: Charles W. C. Lin
  • Publication number: 20030173107
    Abstract: A connection component including a flexible substrate having a top surface and a bottom surface, a layer of a compliant, dielectric material overlying the top surface of the substrate, the compliant material layer having a top surface remote from the substrate, an array of flexible, conductive leads having first ends attached to terminals accessible at the second surface of the substrate and second ends adjacent the top surface of the compliant layer, wherein each the lead comprises a core of a first conductive material surrounded by a layer of a second conductive material, the second conductive material having a greater yield strength than the first conductive material.
    Type: Application
    Filed: April 7, 2003
    Publication date: September 18, 2003
    Applicant: Tessera, Inc.
    Inventors: John W. Smith, Bruce McWilliams
  • Patent number: 6613979
    Abstract: A device and method wherein electrical components are mechanically suspended and electrically interconnected in an insulative elastomeric body, such as silicone, thereby eliminating the need for a circuit board or other circuit substrate. The device can change shape through compression, distension, flexure, and other external forces while maintaining its electrical performance and mechanical integrity. The device can be compressed and deformed to fit snugly within another device, such as the shell of an electrical connector or a plastic clamshell, simultaneously creating spring forces for reliable electrical contacts and an environmental seal. Accordingly, the device and method can be used for a wide variety of purposes such as electrical filtering for avionics, computer or automotive connectors, or a non-intrusive manner to package electronics for medical implants.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: September 2, 2003
    Assignee: Quell Corporation
    Inventors: Paul J. Miller, Kevin G. Foreman
  • Publication number: 20030132027
    Abstract: An integrated circuit contactor includes a base of an insulating material, the base being elastically deformable. A plurality of pads of a first conductive material are bonded to the base at positions corresponding to positions of terminals on an integrated circuit. A plurality of contacts of a second conductive material are bonded to the plurality of pads, respectively, the terminals of the integrated circuit being electrically connected to the contacts only when a pressure is exerted onto the contacts by the terminals of the integrated circuit, each contact having a projecting edge with a roughness produced by pulling a wire of the second conductive material apart from a corresponding one of the plurality of pads after the wire is bonded to the corresponding pad.
    Type: Application
    Filed: February 21, 2003
    Publication date: July 17, 2003
    Applicant: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Makoto Haseyama, Futoshi Fukaya, Susumu Moriya, Naomi Miyaji
  • Patent number: 6593533
    Abstract: A circuit board assembly containing two pluralities of busbars or wires arranged in a lattice configuration, there being electrical continuity at each of the intersecting points. Slits are provided on each of the busbars which engage each other to complete the lattice. In the case of wires, they are bonded to each other. The conductive member thus formed may be sandwiched between two insulative films and is placed on an insulative plate which, in turn, is enclosed by an electrical connection box. The configuration provides substantial advantages in economy of production, simplified equipment required, and ease of altering the circuitry.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: July 15, 2003
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Tatsuya Sumida, Masanobu Sato, Kazuhiro Aoki
  • Patent number: 6590781
    Abstract: An apparatus is provided, which includes a memory interface circuit, a clock signal generating circuit, and a plurality of memory circuits. The memory circuits are operatively coupled and arranged in an order on a plurality of memory modules, such that the memory module positioned at the beginning of the order is coupled to an output of the clock signal generating circuit and the memory interface circuit. The memory module that is positioned at the end of the order is unique in that it includes a clock signal terminating circuit connected to the last memory integrated circuit. With this configuration, a clock loop is formed by directly routing the clock signal from the output of the clock signal generating circuit through each of the memory modules in the order (without connecting to any of the intervening memory integrated circuits) to the memory integrated circuit positioned at the end of the order.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: July 8, 2003
    Assignee: Rambus, Inc.
    Inventors: Ravindranath T. Kollipara, David Nguyen, Belgacem Haba
  • Patent number: 6583366
    Abstract: A substrate includes at least one pin and solder. The substrate has a main surface and a substantially plate-like shape and comprises a pin pad exposed on the main surface. The pin comprises a shaft portion and an enlarged diameter portion (a flange) greater in diameter than the shaft portion and formed at one end of the shaft portion. The enlarged diameter portion comprises a shaft side plane located on the same side as the shaft portion, and a spherical surface swelling in opposition to the shaft portion. The solder is adapted to join the pin pad and at least the enlarged diameter portion of the pin. The solder extends from the pin pad beyond the circumferential edge of the shaft side plane of the enlarged diameter portion and spreads on the shaft side plane through wetting in such a manner as not to reach the shaft portion.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: June 24, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Hajime Saiki
  • Publication number: 20030111264
    Abstract: A shielded test contactor to electrically couple a device to be tested to test circuitry, comprises conductive material covered by or embedded in non-conductive material and defining a well to receive the device. Contacts extend from the embedded conductive material to connect the embedded conductive material to ground. Preferably, the contacts are extensions of the conductive material, through the non-conductive material. A second non-conductive material is preferably provided to support the embedded conductive material and define a floor of the well. Electrical connectors are preferably also supported by the second non-conductive material adjacent to the well, to electrically couple the device to test circuitry. For example, the connectors may be pins supported by the second non-conductive material and extending into the well. Preferably, the height of the conductive material defining the well is at least twice the height of the device to be tested.
    Type: Application
    Filed: December 13, 2001
    Publication date: June 19, 2003
    Inventors: Fern Nee Tan, Suk Yeak Lai, Tark Wooi Fong
  • Publication number: 20030106711
    Abstract: The present invention features a novel design for a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one indicators. Methods of fabricating a carrier substrate and fabricating a semiconductor device package using the combination pin one indicator and alignment fiducial of the present invention are also provided.
    Type: Application
    Filed: October 31, 2002
    Publication date: June 12, 2003
    Inventors: Brad D. Rumsey, Matt E. Schwab
  • Patent number: 6576301
    Abstract: A method for producing a contact structure having a contactor for achieving an electrical connection with a contact target. The method include the steps of providing a substrate, forming a polymer layer on a surface of the dielectric substrate, positioning a micromachining tool over the first abrasive layer and irradiating a beam of electro-thermal energy on a surface of the polymer layer to form a deposition pattern thereon, depositing conductive material in the deposition pattern on the polymer layer thereby forming a horizontal portion of the contactor, and repeating the above steps, thereby forming a contact portion of the contactor in a vertical direction on one end of the horizontal portion.
    Type: Grant
    Filed: October 14, 2000
    Date of Patent: June 10, 2003
    Assignee: Advantest, Corp.
    Inventors: Theodore A. Khoury, James W. Frame
  • Publication number: 20030099818
    Abstract: The invention provides abrasion resistant electrodes that comprise metal-coated conductive valleys between protrusions having a fractured metal coating thereon; electrical devices made from a plurality of said electrodes; and methods of making said devices.
    Type: Application
    Filed: November 28, 2001
    Publication date: May 29, 2003
    Applicant: 3M Innovative Properties Company
    Inventors: Paul D. Graham, Douglas A. Huntley
  • Publication number: 20030089524
    Abstract: A resin substrate is made of resin or a composite material containing resin. Pins each having the surface, on which Au plating is formed, are, with a soldering material made of Sn and Sb, soldered to a substrate body having a first main surface and formed into substantially a rectangular shape to project over the first main surface 2A of the substrate body. Wettability of the soldering material for securing the pins and the substrate body to one another is relatively low as compared with that of a Pb—Sn soldering material. Therefore, the height of upward movement of the soldering material along the pin can be reduced. Hence it follows that the pins can sufficiently deeply be inserted into the socket so that the gap between the first main surface of the substrate body and the upper surface of the socket is reduced.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 15, 2003
    Applicant: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Motohiko Itai
  • Publication number: 20030079911
    Abstract: Upper and lower planar circuit boards are connected in spaced apart parallel relationship by a plurality of contacts each made of a conductive pin, insulative collar and solder ball. The upper ends of the pins are inserted in plated though holes in the upper circuit board and soldered thereto by wave soldering or re-flow. The pins have shoulders to establish the penetration of the pins into the upper circuit board. The lower ends of the pins are bonded to conductive pads on the lower circuit board via the solder balls that are maintained in substantially round configuration by the insulative collars and accommodate variations in board co-planarity or pin length. Where the lower ends of the pins do not contact their corresponding conductive pads the volume of solder in the solder balls allows reliable fillet solder joints to be formed.
    Type: Application
    Filed: August 13, 2001
    Publication date: May 1, 2003
    Inventors: Robert M. Bogursky, Craig M. Kennedy, Kenneth Krone, Joseph J. Lynch
  • Patent number: 6555764
    Abstract: An integrated circuit contactor includes a base of an insulating material, the base being elastically deformable. A plurality of pads of a first conductive material are bonded to the base at positions corresponding to positions of terminals on an integrated circuit. A plurality of contacts of a second conductive material are bonded to the plurality of pads, respectively, the terminals of the integrated circuit being electrically connected to the contacts only when a pressure is exerted onto the contacts by the terminals of the integrated circuit, each contact having a projecting edge with a roughness produced by pulling a wire of the second conductive material apart from a corresponding one of the plurality of pads after the wire is bonded to the corresponding pad.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: April 29, 2003
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Makoto Haseyama, Futoshi Fukaya, Susumu Moriya, Naomi Miyaji
  • Publication number: 20030075358
    Abstract: A first microelectronic element is provided with leads having anchor ends connected to contacts and tip ends moveable with respect to the first microelectronic element. The leads can be provided on a carrier sheet that is assembled to the first microelectronic element, or may be formed in situ on the surface of the first element. The leads may be unitary strips of a conductive material, and the anchor ends of the leads may be bonded to the contacts of the first microelectronic element by processes such as thermosonic or ultrasonic bonding. Alternatively, stub leads may be provided on a separate carrier sheet or formed in situ on the front surface of the first microelectronic element, and these stub leads may be connected by wire bonds to the contacts of the first microelectronic element so as to form composite leads. The tip ends of the leads are joined to a second microelectronic element that is moved away from the first microelectronic element so as to deform the leads.
    Type: Application
    Filed: September 5, 2002
    Publication date: April 24, 2003
    Applicant: Tessera, Inc.
    Inventors: John W. Smith, Mitchell Koblis
  • Patent number: 6552277
    Abstract: The invention is directed to techniques for forming a connection between a pin and a circuit board using a pin having protruding portions and grooved surfaces that extend between the protruding portions. The protruding portions (i) prevent the pin from inadvertently slipping through a via of the circuit board, and (ii) maintains the pin's proper position relative to the circuit board via. The grooved surfaces enable gas to vent from a cavity in the via during the solder process thus enabling solder to flow within the via and form a reliable and robust solder joint between the pin and the circuit board via. In one arrangement, the protruding portions and grooved surfaces are at both ends of the pin enabling the pin to be soldered between two circuit board sections. In one arrangement, the pin is simultaneously soldered to both circuit board sections. In another arrangement, the pin is initially soldered to one circuit board section, and subsequently soldered to another circuit board section.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: April 22, 2003
    Assignee: EMC Corporation
    Inventor: Stuart D. Downes
  • Patent number: 6538214
    Abstract: An interposer includes a substrate having opposing surfaces. Conductive terminals are disposed on both surfaces, and conductive terminals on one surface are electrically connected to conductive terminals on the opposing surface. Elongate, springable, conducive interconnect elements are fixed to conductive terminals on both surfaces.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: March 25, 2003
    Assignee: FormFactor, Inc.
    Inventor: Igor Y. Khandros
  • Publication number: 20030051912
    Abstract: A device including a first solder pad and a second solder pad comprised of a post-soldering alloy composition on a substrate is provided. The alloy composition comprises two or more elements, and the post soldering alloy composition of the first solder pad has different amounts of the two or more elements than the alloy composition of the second solder pad. A method of making a solder pad comprises masking a substrate comprising at least a first solder pad and a second solder pad, wherein the mask exposes a greater area of the first solder pad so that the deposited element becomes part of an alloy composition of the first solder pad upon soldering thereby changing the melting point of the first solder pad.
    Type: Application
    Filed: April 19, 2002
    Publication date: March 20, 2003
    Inventor: Mindaugas F. Dautartas
  • Publication number: 20030051911
    Abstract: A post in ring interconnect used for 3-D stacking. A retaining ring is formed on a pad on a bottom surface of a top PCB substrate to be stacked with a bottom PCB substrate. A post is formed on a pad on a top surface of the bottom PCB substrate. A conductive paste is applied on the pad on the bottom surface of the top PCB substrate and retained in a pocket partially defined by the retaining ring. The retaining ring is aligned with the post. By performing a compression step, a eutectic bond is formed between the top and bottom PCB substrates by the post and the conductive paste.
    Type: Application
    Filed: April 5, 2002
    Publication date: March 20, 2003
    Inventors: Glen E. Roeters, Frank E. Mantz
  • Patent number: 6529026
    Abstract: An interconnect for making temporary electrical connections with semiconductor components includes a substrate with patterns of elastomeric contacts adapted to electrically engage contact locations (e.g., bond pads, solder bumps) on the semiconductor components. The elastomeric contacts can be formed of conductive elastomer materials, such as anisotropic adhesives and silver filled silicone, having metal particles for penetrating the contact locations. The substrate also includes patterns of metal conductors having non-oxidizing contact pads, which provide low resistance bonding surfaces for the elastomeric contacts. A method for fabricating the interconnect includes the step of depositing bumps in a required size and shape using stenciling, screen printing, or other deposition process. Following deposition, the bumps can be cured and planarized to form the elastomeric contacts. During a test procedure, the elastomeric contacts can be loaded in compression to compliantly engage the contact locations.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: March 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Salman Akram
  • Publication number: 20030029638
    Abstract: Upper and lower planar circuit boards are connected in spaced apart parallel relationship by a plurality of contacts each made of a conductive pin, insulative collar and solder ball. The upper ends of the pins are inserted in plated though holes in the upper circuit board and soldered thereto by wave soldering or re-flow. The pins have shoulders to establish the penetration of the pins into the upper circuit board. The lower ends of the pins are bonded to conductive pads on the lower circuit board via the solder balls that are maintained in substantially spherical configuration by the insulative collars and accommodate variations in board co-planarity or pin length. Where the lower ends of the pins do not contact their corresponding conductive pads the volume of solder in the solder balls allows reliable fillet solder joints to be formed.
    Type: Application
    Filed: February 28, 2002
    Publication date: February 13, 2003
    Applicant: Autosplice Inc.
    Inventors: Robert M. Bogursky, Craig M. Kenndey, Kenneth Krone, Joseph J. Lynch
  • Patent number: 6518518
    Abstract: A resin substrate is made of resin or a composite material containing resin. Pins each having the surface, on which Au plating is formed, are, with a soldering material made of Sn and Sb, soldered to a substrate body having a first main surface and formed into substantially a rectangular shape to project over the first main surface 2A of the substrate body. Wettability of the soldering material for securing the pins and the substrate body to one another is relatively low as compared with that of a Pb—Sn soldering material. Therefore, the height of upward movement of the soldering material along the pin can be reduced. Hence it follows that the pins can sufficiently deeply be inserted into the socket so that the gap between the first main surface of the substrate body and the upper surface of the socket is reduced.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: February 11, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Motohiko Itai
  • Patent number: 6515865
    Abstract: An improved and low cost electrical connection for use in circuit boards for key fobs incorporates a plurality of generally cylindrical pin members which are symmetric about a central axis. The use of the symmetric pin allows automatic insertion of the pin in that the orientation of the pin relative to the board is unimportant. The pin has a generally tapered transition portion which provides a contact surface for the battery, and this transition portion is also symmetric such that the orientation of the pin relative to the board is unimportant. Further, a stop face on the pin provides a stop for insertion of the pin into the circuit board such that the pin is at the desired height relative to the battery and such that the transition portion will provide electrical contact to the battery.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: February 4, 2003
    Assignee: Siemens VDO Automotive Corporation
    Inventors: Susan Johnson, Tejas B. Desai, Kyle Cleland
  • Patent number: 6512187
    Abstract: A circuit board assembly containing two pluralities of busbars or wires arranged in a lattice configuration, there being electrical continuity at each of the intersecting points. Slits are provided on each of the busbars which engage each other to complete the lattice. In the case of wires, they are bonded to each other. The conductive member thus formed may be sandwiched between two insulative films and is placed on an insulative plate which, in turn, is enclosed by an electrical connection box. The configuration provides substantial advantages in economy of production, simplified equipment required, and ease of altering the circuitry.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: January 28, 2003
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Tatsuya Sumida, Masanobu Sato, Kazuhiro Aoki
  • Patent number: 6506062
    Abstract: A substantially rigid circuit board connector 60 which is made by foldably coupling an electrically conductive circuit board portion 14 onto the body 46 of a rigid member 40, while allowing the tapered end portion 42 of the rigid member 40 to remain exposed.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: January 14, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Vijay Balubhai Patel, Hsin-Hong Huang
  • Patent number: 6498306
    Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: December 24, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Publication number: 20020179330
    Abstract: A microelectronic package includes first and second microelectronic elements in spaced-apart relationship which are electrically interconnected by a plurality of flexible leads and a layer of anisotropic conductive material. The flexible leads having one end attached to terminals on one of the microelectronic elements extends away therefrom having its opposite tip end electrically interconnected to contacts on the other microelectronic element by virtue of an interposed layer of the anisotropic conductive material.
    Type: Application
    Filed: July 25, 2002
    Publication date: December 5, 2002
    Applicant: Tessera, Inc.
    Inventor: Flynn Carson
  • Patent number: 6476333
    Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: November 5, 2002
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Gaetan L. Mathieu
  • Publication number: 20020148639
    Abstract: Multi-layer components such as circuit panels are fabricated by connecting conductive features such as traces one two or more superposed substrates using leads extending through an intermediate dielectric layer. The leads can be closely spaced to provide a high density vertical interconnection, and can be selectively connected to provide customization of the structure.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 17, 2002
    Applicant: Tessera, Inc.
    Inventors: John W. Smith, Belgacem Haba
  • Publication number: 20020148641
    Abstract: A mounting board has a board, retaining members mounted on the upper surface of the board, and a part retained by the retaining members. The part is mounted such that at least a part thereof is arranged below the lower surface of the board, and that the part is electrically connected to the board through the retaining members. Such an arrangement as described above eliminates the need of connecting the discharge gap element to the board by using lead wires, and of mounting it on the upper surface of the board. This lowers the height of the board and admits an elevated part.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 17, 2002
    Inventors: Fumihiro Minami, Yukari Yamasaki, Mutsuo Sekiya