Ion Beam Etching (e.g., Ion Milling, Etc.) Patents (Class 204/192.34)
  • Patent number: 11062879
    Abstract: Method for preparing site-specific, plan-view lamellae from multilayered microelectronic devices. A focused ion beam that is directed, with an etch-assisting gas, toward an uppermost layer of a device removes at least that uppermost layer and thereby exposes an underlying layer over, or comprising, a target area from which the site-specific, plan-view lamella is to be prepared, wherein the focused ion beam is in a face-on orientation in removing the uppermost layer to expose the underlying layer. In a preferred embodiment, the etch-assisting gas comprises methyl nitroacetate. In alternative embodiments, the etch-assisting gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: July 13, 2021
    Assignee: FEI Company
    Inventors: Noel Thomas Franco, Kenny Mani, Chad Rue, Joe Christian, Jeffrey Blackwood
  • Patent number: 11037794
    Abstract: A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: June 15, 2021
    Assignee: The Regents of the University of California
    Inventors: Xiaobin Xu, Qing Yang, Natcha Wattanatorn, Chuanzhen Zhao, Logan A. Stewart, Steven J. Jonas, Paul S. Weiss
  • Patent number: 11016228
    Abstract: Embodiments herein provide systems and methods for forming an optical component. A method may include providing a plurality of proximity masks between a plasma source and a workpiece, the workpiece including a plurality of substrates secured thereto. Each of the plurality of substrates may include first and second target areas. The method may further include delivering, from the plasma source, an angled ion beam towards the workpiece, wherein the angled ion beam is then received at one of the plurality of masks. A first proximity mask may include a first set of openings permitting the angled ion beam to pass therethrough to just the first target area of each of the plurality of substrates. A second proximity mask may include a second set of openings permitting the angled ion beam to pass therethrough just to the second target area of each of the plurality of substrates.
    Type: Grant
    Filed: February 9, 2020
    Date of Patent: May 25, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph Olson, Peter Kurunczi, Robert Masci
  • Patent number: 10962861
    Abstract: Photographic lighting devices, systems, and methods having a plurality of electrical energy storage/discharge (EESD) elements and/or one or more light sources in a single photographic lighting device to perform one or more photographic lighting effects. EESD elements and one or more light sources can be configured to have multiple separate light emissions occur in a single image acquisition window. The multiple light emissions are separated in an image acquisition window by a time period that is about shutter speed exposure time/(N?1), where N is the number of light emissions. In one such example, two light emissions are separated by a time period that is about shutter speed exposure time/(N?1).
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: March 30, 2021
    Assignee: Lab Partners Associates, Inc.
    Inventor: James E. Clark
  • Patent number: 10937922
    Abstract: A method for exposing side surfaces of a semiconductor body is disclosed. In an embodiment a method includes providing the semiconductor body having a laterally extending first main surface, forming a plurality of vertical side surfaces by partially removing material of the semiconductor body and thereby removing the first main surface in places, wherein each of the side surfaces forms an angle (?) between 110° and 160° inclusive with the remaining first main surface, applying a protective layer onto the semiconductor body so that, in a plan view, the protective layer completely covers the remaining first main surface and the obliquely formed side surfaces and partially removing the protective layer so that the protective layer is removed in regions on the obliquely formed side surfaces because of an inclination and remains at least partially preserved in regions on the remaining first main surface during a common process operation.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: March 2, 2021
    Assignee: OSRAM OLED GMBH
    Inventors: Jens Ebbecke, Sebastian Taeger
  • Patent number: 10864565
    Abstract: A method of producing a deforming tool (2) having a structured embossing surface (4) which can be brought into contact with a surface of a substrate (1) for plastic deformation of the substrate, includes the steps of determining a target structure to be produced on the substrate (1); geometrically distorting the target structure, such that an embossing image structure is obtained; inverting the embossing image structure, such that the embossing structure for the embossed surface (4) is obtained; and producing the embossing surface (4) of the deforming tool (2) according to the embossing structure.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: December 15, 2020
    Assignee: SMS Group GmbH
    Inventors: Arnt Kohlrausch, Hartmut Pawelski, Markus Schellmann
  • Patent number: 10775158
    Abstract: Optical grating components and methods of forming are provided. In some embodiments, a method includes providing an optical grating layer, and forming an optical grating in the optical grating layer, wherein the optical grating comprises a plurality of angled trenches disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the optical grating layer. The method may further include delivering light from a light source into the optical grating layer, and measuring at least one of: an undiffracted portion of the light exiting the optical grating layer, and a diffracted portion of the light exiting the optical grating layer.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Joseph C. Olson, Ludovic Godet, Rutger Meyer Timmerman Thijssen, Morgan Evans
  • Patent number: 10741385
    Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: August 11, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido Van Der Star, Toshiya Suzuki
  • Patent number: 10685816
    Abstract: A method MT includes etching a wafer W using plasma generated in a processing container. The etching includes a process of inclining and rotating a holding structure holding the wafer W during execution of the etching and the process successively creating a plurality of inclined rotation states RT(?, t) with respect to the holding structure. In the inclined rotation states, the wafer W is rotated about a central axis of the wafer W over a predetermined process time while maintaining a state where the central axis is inclined with respect to a reference axis of the processing container which is in the same plane as the central axis. A combination of a value ? of an inclination angle AN of the central axis with respect to the reference axis and the process time t differs for each of the plurality of inclined rotation states.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: June 16, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihiro Umezawa, Jun Sato, Kiyoshi Maeda, Mitsunori Ohata, Kazuya Matsumoto
  • Patent number: 10620357
    Abstract: A backlight unit including an input coupler, a holographic display apparatus including the backlight unit, and a method of manufacturing the input coupler are provided. The backlight unit includes the input coupler configured to cause light incident on a light incident surface of a light guide plate to travel into the light guide plate, the input coupler has a binary grating structure in which a plurality of barriers are arranged parallel to one another at a constant grating period, and the plurality of barriers are tilted from the light incident on the light incident surface.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sunghoon Lee, Hoon Song, Jungkwuen An, Sunil Kim, Chilsung Choi, Young Kim, Kanghee Won, Hongseok Lee
  • Patent number: 10608173
    Abstract: An ion beam apparatus may include a chamber assembly configured to hold a material and direct an ion beam on the material, a detector configured to detect a signal generated from the material based on the ion beam being directed on the material, and a controller configured to control at least one parameter associated with the chamber assembly based on the signal, such that at least one of an ion energy associated with the ion beam, an ion current associated with the ion beam, and an incident angle of the ion beam with respect to a top surface of the material is changed continuously with time.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: March 31, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yil-hyung Lee, Jong-Kyu Kim, Jongchul Park, Sang-Kuk Kim, Jongsoon Park, Hyeji Yoon, Woohyun Lee
  • Patent number: 10600653
    Abstract: A method for forming a fine pattern includes forming line patterns and a connection pattern on a semiconductor substrate, the line patterns extending in a first direction and spaced apart from each other in a second direction intersecting the first direction, and the connection pattern connecting portions of the line patterns adjacent to each other in the second direction, and performing an ion beam etching process on the connection pattern. The ion beam etching process provides an ion beam in an incident direction parallel to a plane defined by the first direction and a third direction perpendicular to a top surface of the semiconductor substrate, and the incident direction of the ion beam is not perpendicular to the top surface of the semiconductor substrate.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: KeunHee Bai, Jongchul Park, Seungjun Kim, Seungju Park, Young-Ju Park, Hak-Sun Lee
  • Patent number: 10559506
    Abstract: A method of inspecting a semiconductor device including setting a target place on a wafer, the target place including a deep trench, forming a first cut surface by performing first milling on the target place in a first direction, obtaining first image data of the first cut surface, forming a second cut surface by performing second milling on the target place in a second direction opposite to the first direction, obtaining second image data of the second cut surface, obtaining a plurality of first critical dimension (CD) values for the deep trench from the first image data, obtaining a plurality of second CD values for the deep trench from the second image data, analyzing a degree of bending of the deep trench based on the first CD values and the second CD values, and providing the semiconductor device meeting a condition based on results of the analyzing may be provided.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Kook Kim, Jun Chul Kim, Myung Suk Um, Yu Sin Yang, Ye Ny Yim
  • Patent number: 10553448
    Abstract: A method of processing a layer. The method may include providing the layer on a substrate, the substrate defining a substrate plane; directing an ion beam to an exposed surface of the layer in an ion exposure when the substrate is disposed in a first rotational position, the ion beam having a first ion trajectory, the first ion trajectory extending along a first direction, wherein the first ion trajectory forms a non-zero angle of incidence with respect to a perpendicular to the substrate plane; performing a rotation by rotating the substrate with respect to the ion beam about the perpendicular from the first rotational position to a second rotational position; and directing the ion beam to the exposed surface of the layer in an additional ion exposure along the first ion trajectory when the substrate is disposed in the second rotational position.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 4, 2020
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Tristan Y. Ma, Morgan Evans, Kevin Anglin, Robert J. Masci, John Hautala
  • Patent number: 10546719
    Abstract: Method for preparing site-specific, plan-view lamellae from multilayered microelectronic devices. A focused ion beam that is directed, with an etch-assisting gas, toward an uppermost layer of a device removes at least that uppermost layer and thereby exposes an underlying layer over, or comprising, a target area from which the site-specific, plan-view lamella is to be prepared, wherein the focused ion beam is in a face-on orientation in removing the uppermost layer to expose the underlying layer. In a preferred embodiment, the etch-assisting gas comprises methyl nitroacetate. In alternative embodiments, the etch-assisting gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: January 28, 2020
    Assignee: FEI Company
    Inventors: Noel Thomas Franco, Kenny Mani, Chad Rue, Joe Christian, Jeffrey Blackwood
  • Patent number: 10535699
    Abstract: An image sensor device includes a semiconductor substrate, including an array of pixel circuits, which define respective pixels of the device. A photosensitive layer is formed over the semiconductor substrate and configured to transfer charge to the pixel circuits in response to light incident on the photosensitive layer. An upper layer is formed over the photosensitive layer and is at least partially transparent to the light. Opaque partitions extend vertically through the upper layer in a checkerboard pattern aligned with the pixels in the array.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: January 14, 2020
    Assignee: INVISAGE TECHNOLOGIES, INC.
    Inventors: Hui Tian, Igor Constantin Ivanov, Edward Hartley Sargent
  • Patent number: 10522351
    Abstract: A method of forming a pattern includes forming a lower layer on a substrate, forming a mask pattern on the lower layer, the mask pattern extending in a first direction parallel to a top surface of the substrate, and performing an etching process using an ion beam on the substrate, such that the ion beam is irradiated in parallel to a plane defined by the first direction and a direction perpendicular to the top surface of the substrate, and is irradiated at a tilt angle with respect to the top surface of the substrate, wherein performing the etching process includes adjusting the tilt angle of the ion beam to selectively etch the lower layer or the mask pattern.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: December 31, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jongchul Park
  • Patent number: 10510942
    Abstract: The invention relates to a method for manufacturing a Josephson junction comprising a step for providing a substrate, extending along a longitudinal direction, a step for depositing a superconducting layer on the substrate so that this layer extends from the substrate in a transverse direction, perpendicular to the longitudinal direction, and a step for irradiation of ions in a central area of the layer defined in the longitudinal direction, the method being characterized in that it includes, prior to the irradiation step, a step for removing a portion of the central area of the superconducting layer so as to delimit a set of areas of the superconducting layer aligned in the longitudinal direction including the central area and two lateral areas.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 17, 2019
    Assignee: Thales
    Inventors: Denis Crete, Bruno Marcilhac, Yves Lemaître
  • Patent number: 10504951
    Abstract: Example embodiments relate to image sensors and imaging apparatuses. One embodiment includes an image sensor for acquiring an image of an object. The image sensor includes an array of photo-sensitive areas formed on a substrate. Each photo-sensitive area is a continuous area within the substrate and is configured to detect incident light. The image sensor also includes an array of interference filters. Each inference filter is configured to selectively transmit a wavelength band. The array of interference filters is monolithically integrated on the array of photo-sensitive areas. A plurality of the interference filers is associated with a single photo-sensitive area of the array of photo-sensitive areas. Each interference filter in the plurality of interference filters is configured to selectively transmit a unique wavelength band to the photo-sensitive area and each interference filter in the plurality of interference filters is associated with a respective portion of the single photo-sensitive area.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: December 10, 2019
    Assignee: IMEC VZW
    Inventor: Bert Geelen
  • Patent number: 10468240
    Abstract: There is provided a glow discharge mass spectroscope having a higher analytical sensitivity by increasing an amount of extracted ion beams without a significant change in device construction and drive conditions of conventional glow discharge systems.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 5, 2019
    Assignee: GLOW TECHNOLOGY KK
    Inventor: Takahiro Takahashi
  • Patent number: 10460862
    Abstract: An object of the invention is to provide: an MgB2 superconducting thin-film wire that exhibits excellent Jc characteristics even under a 20 K magnetic field; and a method for producing thereof. The MgB2 superconducting thin-film wire includes a long substrate and an MgB2 thin film formed on the long substrate. The MgB2 thin film has a microtexture such that MgB2 columnar crystal grains stand densely together on the surface of the long substrate, and has Tc of 30 K or higher. In grain boundary regions of the MgB2 columnar crystal grains, a predetermined transition metal element is dispersed and segregated. The predetermined transition metal element is an element having a body-centered cubic lattice structure.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 29, 2019
    Assignee: HITACHI, LTD.
    Inventors: Toshiya Doi, Shigeru Horii, Toshiaki Kusunoki
  • Patent number: 10310351
    Abstract: Embodiments of the invention generally provide electrochromic devices and materials and processes for forming such electrochromic devices and materials. In one embodiment, an electrochromic device contains a lower transparent conductor layer disposed on a substrate, wherein an upper surface of the lower transparent conductor layer has a surface roughness of greater than 50 nm and a primary electrochromic layer having planarizing properties is disposed on the lower transparent conductor layer. The upper surface of the primary electrochromic layer has a surface roughness less than the surface roughness of upper surface of the lower transparent conductor layer, such as about 50 nm or less.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: June 4, 2019
    Assignee: CLEARIST INC.
    Inventor: Paul Phong Nguyen
  • Patent number: 10204762
    Abstract: To expose a desired feature, focused ion beam milling of thin slices from a cross section alternate with forming a scanning electron image of each newly exposed cross section. Milling is stopped when automatic analysis of an electron beam image of the newly exposed cross section shows that a pre-determined criterion is met.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 12, 2019
    Assignee: FEI Company
    Inventors: Scott Edward Fuller, Jason Donald, Termsupt Seemuntchaiboworn
  • Patent number: 10176969
    Abstract: A method for rapid switching between operating modes with differing beam currents in a charged particle system is disclosed. Many FIB milling applications require precise positioning of a milled pattern within a region of interest (RoI). This may be accomplished by using fiducial marks near the RoI, wherein the FIB is periodically deflected to image these marks during FIB milling. Any drift of the beam relative to the RoI can then be measured and compensated for, enabling more precise positioning of the FIB milling beam. It is often advantageous to use a lower current FIB for imaging since this may enable higher spatial resolution in the image of the marks. For faster FIB milling, a larger beam current is desired. Thus, for optimization of the FIB milling process, a method for rapidly switching between high and low current operating modes is desirable.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: January 8, 2019
    Assignee: FEI Company
    Inventor: Thomas G. Miller
  • Patent number: 10083915
    Abstract: A semiconductor device includes a semiconductor substrate including a main chip region and a remaining scribe lane region surrounding the main chip region, a passivation layer on the main chip region, the passivation layer including a plurality of bridge patterns extending from the main chip region in a first direction across the remaining scribe lane region, a plurality of bump pads exposed by the passivation layer on the main chip region, a plurality of dam structures along edges of the main chip region on the remaining scribe lane region, the plurality of bridge patterns arranged on the plurality of dam structures at a first pitch in the first direction, a seed layer on the plurality of bump pads, and bumps on the seed layer.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: September 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-hyuk Kim, Sang-hyun Lee, Sung-jin Kim, Yong-cheol Seo, Jin-kuk Bae
  • Patent number: 10026590
    Abstract: A method for analyzing a sample with a charged particle beam including directing the beam toward the sample surface; milling the surface to expose a second surface in the sample in which the end of the second surface distal to ion source is milled to a greater depth relative to a reference depth than the end of the first surface proximal to ion source; directing the charged particle beam toward the second surface to form one or more images of the second surface; forming images of the cross sections of the multiple adjacent features of interest by detecting the interaction of the electron beam with the second surface; assembling the images of the cross section into a three-dimensional model of one or more of the features of interest. A method for forming an improved fiducial and determining the depth of an exposed feature in a nanoscale three-dimensional structure is presented.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: July 17, 2018
    Assignee: FEI Company
    Inventors: Stacey Stone, Sang Hoon Lee, Jeffrey Blackwood, Michael Schmidt, Hyun Hwa Kim
  • Patent number: 10010366
    Abstract: Surgical devices and methods are described herein that provide energy density control during tissue sealing. In general, these devices include a handle portion, an elongate shaft, and an end effector having a first jaw having a first tissue engaging surface and a second jaw having a second tissue engaging surface. The first tissue engaging surface can include an energy delivering electrode having a selected pattern of varying conductivity which may include a discrete region or a continuous pattern. The energy delivering electrode may be formed from a polymer substrate that includes a metal. The metal may be mixed into the substrate using an ion beam process. The amount of ions in the ion beam, the energy of the ion beam, or both may be varied to create the selected pattern of varying conductivity.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: July 3, 2018
    Assignee: Ethicon LLC
    Inventor: Geoffrey S. Strobl
  • Patent number: 10006085
    Abstract: The present invention relates to nanocones and nanomaterials. In one embodiment, the present invention provides a method of fabricating an array of nanostructures on a flexible film, comprising self-assembling a layer of particles on a film, and fabricating an array of nanostructures by etching and/or modifying the film. In another embodiment, the present invention provides a microarray comprising a nanomaterial comprising a film configured for an array of one or more nanocones.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: June 26, 2018
    Assignee: The Regents of The University Of California
    Inventors: Robert M. Corn, Mana Toma, Gabriel Loget, Han Wai M. Fung
  • Patent number: 9989808
    Abstract: A method for manufacturing a liquid crystal device that includes forming an inorganic alignment layer by emitting an alignment film material that is made of an inorganic material in an oblique direction onto a substrate, and forming an organic alignment layer that is a monomolecular film made of an organic material chemically bonded with the inorganic alignment layer on a surface of the inorganic alignment layer by treating the surface of the inorganic alignment layer with a silane coupling agent that has an alkyl group, wherein a pretilt angle of a liquid crystal molecule is set to a desired angle by selecting the silane coupling agent by the number of carbon atoms.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 5, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Huiping Zhang, Hideo Nakata, Shinsuke Seki, Takao Tanaka
  • Patent number: 9966237
    Abstract: A plasma sputtering apparatus according to one embodiment includes a chamber and a reservoir in fluidic communication with the chamber. The reservoir stores a vapor source therein, and is configured to release vapor at a predetermined rate. The vapor released by the reservoir is effective to diminish an etch rate of a first magnetic material, the vapor having a smaller effect on an etch rate of a second magnetic material that is different than the first magnetic material. The apparatus also includes a mount for a substrate and a plasma source.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: May 8, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Biskeborn, Calvin S. Lo, Cherngye Hwang, Andrew C. Ting
  • Patent number: 9966092
    Abstract: To provide an ion beam etching method which enables a highly uniform IBE process even under a low-angle-incident static condition, without increase in the size of an apparatus. The ion beam etching method includes: changing a position of an opening portion with respect to a substrate; etching the substrate with an ion beam passing through the opening portion; and reducing a tilt angle as a center of a site where the ion beam is incident on the substrate moves away from the ion source.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: May 8, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yasushi Kamiya, Hiroshi Akasaka, Kiyotaka Sakamoto
  • Patent number: 9931670
    Abstract: An ultrasonic transmitter includes a piezoelectric integrated thin film transistor (PITFT). The transistor includes a top gate electrode, a bottom gate electrode, and a piezoelectric layer. The piezoelectric layer generates vibrations in response to a voltage applied across the top gate electrode and the bottom gate electrode. The transistor includes micro-electrical-mechanical systems (MEMS) mechanically coupled to the PITFT. The MEMS includes a resonator that transmits ultrasonic pressure waves based on the vibrations.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: April 3, 2018
    Assignee: Konica Minolta Laboratory U.S.A., Inc.
    Inventor: Jun Amano
  • Patent number: 9927558
    Abstract: Embodiments comprise a system created through fabricating a lens array through which lasers are emitted. The lens array may be fabricated in the semiconductor substrate used for fabricating the lasers or may be a separate substrate of other transparent material that would be aligned to the lasers. In some embodiments, more lenses may be produced than will eventually be used by the lasers. The inner portion of the substrate may be formed with the lenses that will be used for emitting lasers, and the outer portion of the substrate may be formed with lenses that will not be used for emitting lasers—rather, through etching these additional lenses, the inner lenses may be created with a higher quality.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: March 27, 2018
    Assignee: TRILUMINA CORP.
    Inventors: Richard F. Carson, John R. Joseph, Mial E. Warren, Thomas A. Wilcox
  • Patent number: 9897856
    Abstract: A display panel and a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposed substrate that are opposite to each other, and a liquid crystal layer located between the array substrate and the opposed substrate. The display panel includes a display area and a non-display area, a phase shift layer is disposed at the non-display area of the array substrate, and the phase shift layer is configured to shift a phase of light passing through the phase shift layer. The display panel is used to solve color cast problem when a TFT-LCD displays a pure color, which is caused by cross color when the display panel is viewed at a side angle.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: February 20, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaochuan Chen, Shijun Wang, Lei Wang, Wenbo Jiang, Yanna Xue, Yue Li, Zhiying Bao, Wenjun Xiao, Zhenhua Lv, Yong Zhang
  • Patent number: 9870899
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 16, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9831428
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: November 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
  • Patent number: 9806393
    Abstract: A microwave/millimeter device having a narrow gap between two parallel surfaces of conducting material by using a texture or multilayer structure on one of the surfaces is disclosed. The fields are mainly present inside the gap, and not in the texture or layer structure itself, so the losses are small. The microwave/millimeter wave device further includes one or more conducting elements, such as a metallized ridge or a groove in one of the two surfaces, or a metal strip located in a multilayer structure between the two surfaces. The waves propagate along the conducting elements. At least one of the surfaces is provided with means to prohibit the waves from propagating in other directions between them than along the ridge, groove or strip. At very high frequency, the gap waveguides and gap lines may be realized inside an IC package or inside the chip itself.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: October 31, 2017
    Assignee: GAPWAVES AB
    Inventors: Per-Simon Kildal, Sjoerd Haasl, Peter Enoksson
  • Patent number: 9748441
    Abstract: A method of manufacturing a semiconductor light emitting device, including arranging a plurality of particles in a monolayer on a substrate, dry etching the plurality of particles arranged to provide a void between the particles in a condition IN which the particles are etched while the substrate is not substantially etched; and dry etching the substrate using the plurality of particles after the particle etching step as an etching mask, thereby forming an uneven structure on one surface of the substrate.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: August 29, 2017
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Yoshihisa Hatta, Kei Shinotsuka, Kotaro Dai, Yasuhito Kajita
  • Patent number: 9741536
    Abstract: Curtaining artifacts on high aspect ratio features are reduced by reducing the distance between a protective layer and feature of interest. For example, the ion beam can mill at an angle to the work piece surface to create a sloped surface. A protective layer is deposited onto the sloped surface, and the ion beam mills through the protective layer to expose the feature of interest for analysis. The sloped mill positions the protective layer close to the feature of interest to reduce curtaining.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: August 22, 2017
    Assignee: FEI Company
    Inventors: Sang Hoon Lee, Stacey Stone, Jeffrey Blackwood, Michael Schmidt
  • Patent number: 9721767
    Abstract: In some examples, a method comprising depositing a functional layer (e.g., a magnetic layer) over a substrate; depositing a granular layer over the functional layer, the granular layer including a first material defining a plurality of grains separated by a second material defining grain boundaries of the plurality of grains; removing the second material from the granular layer such that the plurality of grains of the granular layer define a hard mask layer on the functional layer; and removing portions of the functional layer not masked by the hard mask layer, wherein the depositing of the functional layer, the depositing of the granular layer, removing the second material, and removing the portions of the functional layer are performed in a vacuum environment.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: August 1, 2017
    Assignee: Regents of the University of Minnesota
    Inventors: Jian-Ping Wang, Hao Wang, Haibao Zhao
  • Patent number: 9660603
    Abstract: A method of fabricating a sloped termination of a molybdenum layer includes providing the molybdenum layer and applying a photo resist material to the molybdenum layer. The photo resist material is exposed under a defocus condition to generate a resist mask having an edge portion. The molybdenum layer is etched at least at the edge portion of the resist mask to result in a sloped termination of the molybdenum layer.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: May 23, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Neng Jiang, Elizabeth Costner Stewart, Nicholas S. Dellas
  • Patent number: 9653309
    Abstract: A process for forming trenches in a target material includes forming a masking layer onto the target material, where the masking layer comprises a material having high selectivity to a plasma etch gas adapted for etching the target material. A pattern is formed in the masking layer to expose portions of the target material and the sample is placed on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas. Ballistic ions within the plasma dark space form a trench structure within the target material. The process may further include repeating the steps of positioning the sample and etching the exposed portions of the target material with the substrate at a different angle to define a triangular structure.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: May 16, 2017
    Assignee: The Regents of the University of California
    Inventors: Robert C. Dynes, Peter Roediger, Travis Wong, Shane A. Cybart
  • Patent number: 9620382
    Abstract: Plasma-based atomic layer etching of materials may be of benefit to various semiconductor manufacturing and related technologies. For example, plasma-based atomic layer etching of materials may be beneficial for adding and/or removing angstrom thick layers from a surface in advanced semiconductor manufacturing and related technologies that increasingly demand atomistic surface engineering. A method may include depositing a controlled amount of a chemical precursor on an unmodified surface layer of a substrate to create a chemical precursor layer and a modified surface layer. The method may also include selectively removing a portion of the chemical precursor layer, a portion of the modified surface layer and a controlled portion of the substrate. Further, the controlled portion may be removed to a depth ranging from about 1/10 of an angstrom to about 1 nm. Additionally, the deposition and selective removal may be performed under a plasma environment.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: April 11, 2017
    Assignee: UNIVERSITY OF MARYLAND, COLLEGE PARK
    Inventors: Gottlieb S. Oehrlein, Dominik Metzler
  • Patent number: 9610717
    Abstract: A method for manufacturing composite of resin and other materials includes the following steps. A shaped piece made by materials different with resin is provided, and is degreased and cleaned. A resist layer with a lot of location holes is formed on the surface of the heterogeneous member by nano-imprint lithography, and a lot of small holes are formed on the surface of the heterogeneous member while the resist layer is removed. Then the heterogeneous member is inserted in an injection mold, and molten crystalline thermoplastic resin is injected into the mold, thus the resin embedded into the holes and bonding with the shaped piece. The method is environmentally friendly and suitable for mass production.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: April 4, 2017
    Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Shyan-Juh Liu, Kar-Wai Hon, Sha-Sha Liu
  • Patent number: 9599667
    Abstract: The various technologies presented herein relate to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC). Short wavelength illumination (e.g., visible light) is applied to thinned samples (e.g., ultra-thinned samples) to achieve a spatial resolution for laser voltage probing (LVP) analysis to be performed on smaller technology node silicon-on-insulator (SOI) and bulk devices. Thinning of a semiconductor material included in the IC (e.g., backside material) can be controlled such that the thinned semiconductor material has sufficient thickness to enable operation of one or more features comprising the IC during LVP investigation.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: March 21, 2017
    Assignee: Sandia Corporation
    Inventors: Joshua Beutler, John Joseph Clement, Mary A. Miller, Jeffrey Stevens, Edward I. Cole, Jr.
  • Patent number: 9515457
    Abstract: A particular quantum cascade laser includes a ridge-guide. The ridge-guide includes an angled facet that extends across a width of the ridge-guide and a flat facet that extends across the width of the ridge-guide. A first distance between the flat facet and the angled facet along a first side of the ridge-guide is different than a second distance between the flat facet and the angled facet along a second side of the ridge-guide.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: December 6, 2016
    Assignee: The Boeing Company
    Inventors: Michael Lee Tilton, Gregory C. Dente
  • Patent number: 9514953
    Abstract: Implementations described herein generally relate to semiconductor manufacturing and more particularly to methods for etching a low-k dielectric barrier layer disposed on a substrate using a non-carbon based approach. In one implementation, a method for etching a barrier low-k layer is provided. The method comprises (a) exposing a surface of the low-k barrier layer to a treatment gas mixture to modify at least a portion of the low-k barrier layer and (b) chemically etching the modified portion of the low-k barrier layer by exposing the modified portion to a chemical etching gas mixture, wherein the chemical etching gas mixture includes at least an ammonium gas and a nitrogen trifluoride gas or at least a hydrogen gas and a nitrogen trifluoride gas.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: December 6, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chia-Ling Kao, Sean Kang, Jeremiah T. Pender, Srinivas D. Nemani, He Ren, Mehul Naik
  • Patent number: 9507251
    Abstract: According to one embodiment, a method is disclosed for manufacturing a reflective mask. The method can include forming a reflection layer on a major surface of a substrate. The method can include forming an absorption layer on the reflection layer. The method can include forming a pattern region in the absorption layer. In addition, the method can include forming a light blocking region surrounding the pattern region in the absorption layer and the reflection layer. The forming the light blocking region includes etching-processing the reflection layer using a gas containing chlorine and oxygen.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: November 29, 2016
    Assignees: SHIBAURA MECHATRONICS CORPORATION, KABUSHIKI KAISHA TOPCON
    Inventors: Tomoaki Yoshimori, Makoto Karyu, Takeharu Motokawa, Kosuke Takai, Yoshihisa Kase
  • Patent number: 9500789
    Abstract: An array of nanowires with a period smaller then 150 nm can be used for applications such as an optical polarizer. A hard nanomask can be used to manufacture such structures. This nanomask includes a substantially periodic array of substantially parallel elongated elements having a wavelike cross-section. The fabrication method of the nanomask may be contactless and uses ion beams.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 22, 2016
    Assignee: Wostec, Inc.
    Inventors: Valery K. Smirnov, Dmitry S. Kibalov
  • Patent number: 9480140
    Abstract: A neutral beam is scanned across a workpiece surface and the beam angle is controlled in a manner that avoids variation in the beam source-to-workpiece distance during scanning.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sang Ki Nam, Ludovic Godet