Internal Coating (e.g., Coating Inside Of Cylinder, Etc.) Patents (Class 205/131)
  • Patent number: 10165691
    Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: December 25, 2018
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki Yoshida
  • Patent number: 9607928
    Abstract: A component can include a substrate having an opening extending between first and second surfaces thereof, and an electrically conductive via having first and second portions. The first portion can include a first layer structure extending within the opening and at least partially along an inner wall of the opening, and a first principal conductor extending within the opening and at least partially overlying the first layer structure. The first portion can be exposed at the first surface and can have a lower surface located between the first and second surfaces. The second portion can include a second layer structure extending within the opening and at least partially along the lower surface of the first portion, and a second principal conductor extending within the opening and at least partially overlying the second layer structure. The second portion can be exposed at the second surface.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: March 28, 2017
    Assignee: Invensas Corporation
    Inventor: Cyprian Emeka Uzoh
  • Patent number: 9512533
    Abstract: The electroplating equipment disposes a hollow first ring between a first mold and a through hole of a workpiece, and a hollow second ring between a second mold and the through hole of the workpiece, such that the first ring and the second ring provide substantially equivalent channel as the openings of the through hole when the first mold and the second mold are set to hold tight the workpiece. The first ring and the second ring, along with an injection channel of the first mold and a recycling channel of the second mold and the through hole of the workpiece, form a seamless flow channel for an electroplating fluid to flow and be electroplated on the wall of the through hole.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: December 6, 2016
    Assignee: MIN AIK PRECISION INDUSTRIAL CO., LTD.
    Inventors: Yu-Cheng Su, Chun-Yang Chang
  • Patent number: 9487881
    Abstract: An apparatus is disclosed for electroplating an inside wall of a transfer mold, the transfer mold being suitable for use in semiconductor device encapsulation. Specifically, the apparatus comprises a fixture, as well as a through-hole in the fixture for receiving an electrode to electroplate the inside wall of the transfer mold. In particular, the through-hole is configured to receive the electrode in a slide-fit to form a mutual interference fit for securing the electrode to the fixture. Upon fitting the electrode into the through-hole, the apparatus can then be used to electroplate the inside wall of the transfer mold by introducing the electrode into the space adjacent to the inside wall of the transfer mold. A device for use as an electrode in the apparatus is also disclosed.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: November 8, 2016
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Shu Chuen Ho, Kai Fat Yip, Eng Cheng Chng, Yew Lan Ngo, Saravana Ranganathan Damodaran
  • Patent number: 9395623
    Abstract: Durable seamless replication tools are disclosed for replication of seamless relief patterns in desired media, for example in optical recording or data storage media. Methods of making such durable replication tools are disclosed, including preparing a recording substrate on the inner surface of a support cylinder, recording and developing a relief pattern in the substrate, creating a durable negative relief replica of the pattern, extracting the resulting durable tool sleeve from a processing cell, and mounting the tool sleeve on a mounting fixture. Apparatus are disclosed for fabricating such seamless replication tools, including systems for recording a desired relief pattern on a photosensitive layer on an inner surface of a support cylinder. Also disclosed are electrodeposition cells for forming a durable tool sleeve having a desired relief pattern. The replication tool relief features may have critical dimensions down to the micron and nanometer regime.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: July 19, 2016
    Assignee: MicroContinuum, Inc.
    Inventor: W. Dennis Slafer
  • Patent number: 9237651
    Abstract: One disclosed embodiment comprises formation of a padless via in a substrate. The padless via includes a hole through a metal layer blanketing the substrate, as well as the underlying substrate. An inner wall of the padless via hole receives a seed layer of a conductive material. Electrolytic differential plating is then performed, resulting in a preferential accumulation of a conductive plating material on the via inner wall, relative to that deposited on a surface of the substrate. In one embodiment, the differential plating is performed by addition of an organic suppressant to a plating bath.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: January 12, 2016
    Assignee: BROADCOM CORPORATION
    Inventor: Tonglong Zhang
  • Publication number: 20150068910
    Abstract: Provided is an apparatus for anodizing an internal surface of a tube including an electrolyte container storing an electrolyte solution, a first solution conduit connected with the electrolyte container to receive the electrolyte solution, a first jig configured to fix one end of a targeted tube to a downstream end of the first solution conduit, a second solution conduit in which the other end of the targeted tube is connected to an upstream end to discharge the electrolyte solution flowing into the targeted tube, a second jig configured to fix the other end of the targeted tube to an upstream end of the second solution conduit, and a cathode rod inserted from the second jig and extended to the first jig through the inner portion of the targeted tube, in which, while the electrolyte solution passes through the inner portion of the targeted tube, a cathode is applied to the cathode rod and an anode is applied to the targeted tube to perform an anodizing process.
    Type: Application
    Filed: April 5, 2013
    Publication date: March 12, 2015
    Inventors: Joonwon Kim, Moo Hwan Kim, Kyong Bo Eom, Kanghoon Kim, Ho Seon Ahn, Chan Lee
  • Publication number: 20140299476
    Abstract: An electroplating method is disclosed. The method includes preparing a substrate having via holes in a surface thereof, performing a pretreatment of the substrate surface by immersing the substrate in a pretreatment liquid containing a plating suppressor to adsorb the plating suppressor onto the substrate surface, immersing the pretreated substrate in a plating solution containing a plating suppressor and a plating accelerator to replace the pretreatment liquid, attached to the substrate surface including interior surfaces of the via holes, with the plating solution, and then electroplating the substrate surface to fill the via holes with metal.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 9, 2014
    Inventors: Shingo YASUDA, Akira OWATARI, Mizuki NAGAI, Akira SUSAKI
  • Publication number: 20140262801
    Abstract: The methods inhibit or reduce dimpling and voids during copper electroplating of through-holes with flash copper layers in substrates such as printed circuit boards. An acid solution containing disulfide compounds is applied to the through-holes of the substrate followed by filling the through-holes with copper using an acid copper electroplating bath which includes additives such as brighteners and levelers.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Nagarajan JAYARAJU, Elie H. NAJJAR, Leon R. BARSTAD
  • Publication number: 20140251951
    Abstract: Systems and methods of treating, e.g., stripping and coating, a target surface of an article including a passageway are disclosed. The systems may fluidly connect a pressure masker including pressurized masking fluid to a first side of the passageway, passing the pressurized masking fluid through the passageway from the first side to a second side including the target surface, and, submerging at least a portion of the target surface in a treatment bath, wherein the pressurized masking fluid passing through the passageway prevents the treatment bath from entering the passageway.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Mark Lawrence Hunt, Michael Anthony DePalma
  • Patent number: 8815062
    Abstract: A plating pretreatment apparatus for a multi-cylinder block includes a plurality of cylinders that performs a plating pretreatment of a cylinder inner wall surface of each of the cylinders using an electrode disposed so as to oppose to the cylinder inner wall surface by sealing one end of the cylinder inner wall surface and introducing a treatment liquid to the cylinder inner wall surface. In such plating pretreatment apparatus, at least one of a power supply device that supplies electricity to the cylinder block and the electrode and a liquid feed pump that feeds the treatment liquid into a gap between the cylinder inner wall surface and the electrode is provided for each of the cylinders.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: August 26, 2014
    Assignee: Suzuki Motor Corporation
    Inventors: Tomohiro Asou, Seiya Kunioka, Hitoshi Muramatsu, Nobuyuki Suzuki, Naoyuki Suda, Akira Ishibashi, Minoru Imai, Manabu Suzuki, Masahiro Ogawa
  • Patent number: 8791005
    Abstract: A structure formed in an opening having a substantially vertical sidewall defined by a non-metallic material and having a substantially horizontal bottom defined by a conductive pad, the structure including a diffusion barrier covering the sidewall and a fill composed of conductive material.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: July 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mukta G. Farooq, John A. Fitzsimmons, Troy L. Graves-Abe
  • Publication number: 20140171296
    Abstract: Zero-valent silver compositions include 4-dimethylaminopyridine as stabilizers. The zero-valent silver and the 4-diemthylaminopyridine form stabilized nano-particles in solution. The zero-valent silver compositions may be used as catalysts in the metallization of non-conductive substrates.
    Type: Application
    Filed: December 13, 2012
    Publication date: June 19, 2014
    Applicant: Dow Global Technologies LLC
    Inventor: Kurt F. HIRSEKORN
  • Publication number: 20140138252
    Abstract: The invention relates to an aqueous acidic bath for electrolytic deposition of copper, comprising, at least one source of copper ions, at least one acid, at least one brightener compound, and at least one leveler for copper-deposition, wherein at least one leveler is a ruthenium compound, and to a process for the electrolytic deposition of copper, in particular for filling a blind micro Vertical Interconnect Access (VIA), through hole VIA, trench and similar structures on printed circuit boards, chip carriers and semiconductor wafers.
    Type: Application
    Filed: April 25, 2012
    Publication date: May 22, 2014
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Nina Dambrowsky, Uwe Hauf, Ingo Ewert, Christof Erben, René Wenzel
  • Publication number: 20140097089
    Abstract: Methods of preparing metal and metal alloys with partially microcrystalline anodic coatings are disclosed. Associated article therefrom are correspondingly disclosed. The partially microcrystalline anodic coatings exhibit steam, superheated steam, alkaline and acidic resistance. Partially microcrystalline anodic coating can be prepared by impregnation of micropores of a metal or metal substrate with metal precursor species, conversion of the metal precursor species into metal hydroxides, thermal treatment to dry out moisture and to promote phase transformation of the metal hydroxide product into metal oxides solids and bonding with metastable metal oxide substance in the pore structure of the metal or metal alloy substrate, and hydrothermal sealing to create sealed partially microcrystalline anodic coating.
    Type: Application
    Filed: December 12, 2013
    Publication date: April 10, 2014
    Applicant: SANFORD PROCESS CORPORATION
    Inventors: Timothy P. Cabot, John J. Tetrault, Dong-Jin Sung
  • Publication number: 20140083860
    Abstract: Stable zero-valent metal compositions and methods of making and using these compositions are provided. Such compositions are useful as catalysts for subsequent metallization of non-conductive substrates, and are particularly useful in the manufacture of electronic devices.
    Type: Application
    Filed: November 26, 2013
    Publication date: March 27, 2014
    Inventors: Maria Anna RZEZNIK, Feng LIU
  • Publication number: 20140038080
    Abstract: There is disclosed articles for and methods of confining volatile materials in the void volume defined by crystalline void materials. In one embodiment, the hydrogen isotopes are confined inside carbon nanotubes for storage and the production of energy. There is also disclosed a method of generating various reactions by confining the volatile materials inside the crystalline void structure and releasing the confined volatile material. In this embodiment, the released volatile material may be combined with a different material to initiate or sustain a chemical, thermal, nuclear, electrical, mechanical, or biological reaction.
    Type: Application
    Filed: October 9, 2013
    Publication date: February 6, 2014
    Inventors: William K. Cooper, James F. Loan, Christopher H. Cooper
  • Patent number: 8609254
    Abstract: Methods of preparing metal and metal alloys with partially microcrystalline anodic coatings are disclosed. Associated article therefrom are correspondingly disclosed. The partially microcrystalline anodic coatings exhibit steam, superheated steam, alkaline and acidic resistance. Partially microcrystalline anodic coating can be prepared by impregnation of micropores of a metal or metal substrate with metal precursor species, conversion of the metal precursor species into metal hydroxides, thermal treatment to dry out moisture and to promote phase transformation of the metal hydroxide product into metal oxides solids and bonding with metastable metal oxide substance in the pore structure of the metal or metal alloy substrate, and hydrothermal sealing to create sealed partially microcrystalline anodic coating.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: December 17, 2013
    Assignee: Sanford Process Corporation
    Inventors: Timothy P. Cabot, John J. Tetrault, Dong-Jin Sung
  • Publication number: 20130313121
    Abstract: A method of forming interconnects for three dimensional integrated circuits comprises attaching a metal layer on a first carrier, attaching a first side of a packaging component on the metal layer, wherein the packaging component comprises a plurality of through vias. The method further comprises filling the plurality of through vias with a metal material using an electrochemical plating process, wherein the metal layer functions as an electrode for the electrochemical plating process, attaching a second carrier on a second side of the packaging component, detaching the first carrier from the packaging component, forming a photoresist layer on the metal layer, patterning the photoresist layer and detaching exposed portions of the metal layer.
    Type: Application
    Filed: May 25, 2012
    Publication date: November 28, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hui Yu, Kuo-Chung Yee, Chen-Hua Yu, Yeong-Jyh Lin, Chia-Hsiang Lin, Liang-Ju Yen, Lawrence Chiang Sheu
  • Publication number: 20130292396
    Abstract: Electronic device housing structures and other structures may be formed from molded plastic. Plastic structures such as injection molding housing structures and other structures may be provided with openings. An opening may have sidewall surfaces. Machining operations and other techniques may be used in forming the openings. Openings may be processed to enhance resistance to stress-induced cracking of the plastic structures along the sidewall surfaces. Cracking resistance may be obtained by activating the surface using heat or laser treatment and by electroplating the activated surface to form a metal liner structure. Surface treatments using applied liquid chemicals or heat may form a treated layer on the surface of an opening with enhanced cracking resistance. A plastic sleeve or other insert may form a liner structure in an opening that resists cracking. Liner structures may also be formed by applying heat or light to a coating in an opening.
    Type: Application
    Filed: September 27, 2012
    Publication date: November 7, 2013
    Applicant: Apple Inc.
    Inventors: Richard H. Dinh, Daniel W. Jarvis
  • Publication number: 20130153427
    Abstract: An article having a metal surface is treated to have one or more desired effects, such as desired functional properties or a desired cosmetic appearance. The surface is anodized to create an oxide layer having pores therein and a metal deposition process is performed to deposit multiple different metals within the pores. A pretreatment act, such as degreasing, chemical etching, chemical polishing, and desmutting can also be conducted on the surface prior to anodization. The surface can also be dyed, sealed, and polished.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Applicant: Apple Inc.
    Inventor: Masashige TATEBE
  • Publication number: 20130075268
    Abstract: A method of forming through-substrate vias includes separately electrodepositing copper and at least one element other than copper to fill remaining volume of through-substrate via openings formed within a substrate. The electrodeposited copper and the at least one other element are annealed to form an alloy of the copper and the at least one other element which is used in forming conductive through-substrate via structures that include the alloy.
    Type: Application
    Filed: September 28, 2011
    Publication date: March 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Luke G. England
  • Publication number: 20120301734
    Abstract: A method of bonding a metal to a substrate involves forming an oxide layer on a surface of the substrate, and in a molten state, over-casting the metal on the substrate surface. The over-casting drives a reaction at an interface between the over-cast metal and the oxide layer to form another oxide. The other oxide binds the metal to the substrate surface upon solidification of the over-cast metal.
    Type: Application
    Filed: December 2, 2011
    Publication date: November 29, 2012
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Michael J. Walker, Anil K. Sachdev, Bob R. Powell, JR., Aihua A. Luo
  • Publication number: 20120279866
    Abstract: A multilayer structure is formed by electroetching or electroplating on a substrate. A seed layer is arranged on the substrate and a master electrode is applied thereto. The master electrode has a pattern layer forming multiple electrochemical cells with the substrate. A voltage is applied for etching the seed layer or applying a plating material to the seed layer. A dielectric material is arranged between the structures thus formed. The dielectric layer is planarized for uncovering the structure below and another structure layer is formed on top of the first. Alternatively, the dielectric layer is applied with a thickness two layers and the structure below is accessed by selective etching of the dielectric layer for selectively uncovering the top surface of the structure below. Multiple structure layer may also be formed in one step.
    Type: Application
    Filed: March 30, 2012
    Publication date: November 8, 2012
    Inventors: Mikael Fredenberg, Patrik Möller, Peter Wiwen-Nilsson
  • Publication number: 20120267249
    Abstract: A filter includes a membrane having a plurality of nanochannels formed therein. A first surface charge material is deposited on an end portion of the nanochannels. The first surface charge material includes a surface charge to electrostatically influence ions in an electrolytic solution such that the nanochannels reflect ions back into the electrolytic solution while passing a fluid of the electrolytic solution. Methods for making and using the filter are also provided.
    Type: Application
    Filed: June 27, 2012
    Publication date: October 25, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: JOHN M. COTTE, Christopher V. Jahnes, Hongbo Peng, Stephen M. Rossnagel
  • Patent number: 8257574
    Abstract: A plating method for pre-plating or plating a cylinder inner peripheral surface to be treated of a cylinder block by introducing treatment liquid to the cylinder inner peripheral surface by using a plating apparatus provided with a sealing jig having a sealing member and an electrode to which the seal jig is mounted includes the steps, which are performed successively: sealing the cylinder inner peripheral surface by bringing the sealing jig into contact with the cylinder inner peripheral surface; introducing the treatment liquid to the cylinder inner peripheral surface; and treating the cylinder inner peripheral surface by applying predetermined charge to the electrode of the plating apparatus and the cylinder block to thereby perform pre-plating or plating process in a state that a liquid to be treated fills a space including the cylinder inner peripheral surface. In the method, the treatment liquid introducing step is performed after confirmation of sealing by the sealing step.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: September 4, 2012
    Assignee: Suzuki Motor Corporation
    Inventors: Hitoshi Muramatsu, Seiya Kunioka, Nobuyuki Suzuki, Akira Ishibashi, Minoru Imai, Manabu Suzuki, Masahiro Ogawa
  • Publication number: 20120218728
    Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.
    Type: Application
    Filed: August 11, 2010
    Publication date: August 30, 2012
    Applicant: EPCOS AG
    Inventors: Sebastian Brunner, Gerhard Fuchs, Annette Fischer, Manfred Fischer, Christian Faistauer, Guenter Pudmich, Edmund Payr, Stefan Leopold Hatzl
  • Publication number: 20120207275
    Abstract: A method of manufacturing a structure includes a step of preparing a substrate including a silicon section, recessed sections and protruding sections formed by etching the silicon section, and a first insulating layer disposed on top portions of the protruding sections; a step of forming second insulating layers on sidewalls and bottom portions of the recessed sections; a step of forming seed layers containing metal above the bottom portions of the recessed sections; and a step of forming plating layers in such a manner that the recessed sections are filled with metal by electroplating. The second insulating layers contain an organopolysiloxane having at least one of a partial structure represented by the following formula (1) and a partial structure represented by the following formula (2): where R1, R2, and R3 represent alkyl groups identical to or different from each other.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 16, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takayuki Teshima, Yutaka Setomoto
  • Publication number: 20120203326
    Abstract: A method for manufacturing a medical product comprising a hollow body (2), wherein at least part of a wall of the hollow body (2) is coated at least on the inside with a layer comprising a polymer; at least the part of at least the inside of the wall of the medical product is brought into contact with a mixture (6) of the polymer and the polymer is deposited from the mixture (6) on at least the part of the inside of the wall. And a medical product comprising a hollow body (2) with a wall consisting of one or more structural elements (16), at least a section of the wall being coated with a layer (15) comprising native chitosan, wherein both on the inside and the outside of the hollow body (2) at least some of the one or more structural elements (16) of the wall of the hollow body (2) are at least partly coated with the native chitosan layer (15). And a method for electrodepositing a polymer on an electrode from an acidic mixture of the polymer, wherein the mixture (6) comprises a multibasic acid.
    Type: Application
    Filed: May 29, 2009
    Publication date: August 9, 2012
    Applicant: MEDOVENT GMBH
    Inventors: Rivelino Montenegro, Thomas Freier
  • Publication number: 20120145552
    Abstract: An electroplating method includes: preparing a substrate having via holes formed in a surface; immersing the substrate in a pretreatment solution to carry out pretreatment of the substrate; immersing the substrate in a plating solution without applying a voltage between the substrate and an anode, thereby replacing the pretreatment solution in the via holes with the plating solution; carrying out first-step electroplating of the substrate while controlling the voltage, applied between the substrate and the anode, to be equal to or higher than a voltage which is necessary for an electric current, appropriate to fill a plated metal into the via holes, to flow stably between the substrate and the anode; and carrying outsecond-step electroplating of the substrate while controlling the electric current, flowing between the substrate and the anode, at an electric current appropriate to fill the plated metal into the via holes.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 14, 2012
    Inventors: Mizuki NAGAI, Yusuke Tamari, Shingo Yasuda
  • Patent number: 8197659
    Abstract: A method for manufacturing a multilayer printed circuit board including providing a core substrate having a penetrating-hole, forming an electroless plated film on a surface of the substrate and an inner wall surface of the penetrating-hole, electrolytically plating the substrate while moving with respect to the surface of the substrate an insulating member in contact with the surface of the substrate such that an electrolytic plated film is formed on the electroless plated film, an opening space inside the penetrating-hole is filled with an electrolytic material, and a through-hole conductor structure is formed in the penetrating-hole, forming an etching resist having an opening pattern on the electrolytic plated film, and removing an exposed pattern of the electrolytic plated film exposed by the opening pattern and a pattern of the electroless plated film under the exposed pattern such that a conductor circuit is formed on the surface of the substrate.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: June 12, 2012
    Assignee: IBIDEN Co., Ltd.
    Inventors: Toru Nakai, Satoru Kawai, Hiroshi Niwa, Yoshiyuki Iwata
  • Publication number: 20120141667
    Abstract: Methods for forming barrier/seed layers for interconnect structures are provided herein. In some embodiments, a method of processing a substrate having an opening formed in a first surface of the substrate, the opening having a sidewall and a bottom surface, the method may include forming a layer comprising manganese (Mn) and at least one of ruthenium (Ru) or cobalt (Co) on the sidewall and the bottom surface of the opening, the layer having a first surface adjacent to the sidewall and bottom surface of the opening and a second surface opposite the first surface, wherein the second surface comprises predominantly at least one of ruthenium (Ru) or cobalt (Co) and wherein a predominant quantity of manganese (Mn) in the layer is not disposed proximate the second surface; and depositing a conductive material on the layer to fill the opening.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 7, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: HOON KIM, SANG HO YU, SESHADRI GANGULI
  • Patent number: 8157979
    Abstract: A method for making a film having an array of cobalt selenide nanowires including: providing an aluminum substrate; anodizing the aluminum substrate to form anodized aluminum including an aluminum oxide layer having a plurality of pores therein on a surface of the aluminum substrate; preparing an electrodeposition composition including a source of cobalt ions and a source of selenite ions; contacting the anodized aluminum with the electrodeposition composition; and applying AC current to the anodized aluminum for a sufficient duration to electrodeposit cobalt selenide into the pores to form a film having an array of oriented cobalt selenide nanowires. According to a different aspect, a film has an aluminum substrate; an oxide layer having a plurality of pores therein on a surface of the aluminum substrate; and an array of cobalt selenide nanowires disposed in the pores.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: April 17, 2012
    Assignee: Raytheon Canada Limited
    Inventor: Alexandre D. Lifchits
  • Publication number: 20120080318
    Abstract: A plurality of through holes in a workpiece are filled with a solid conductive material. The workpiece is immersed in an electroplating solution, with the through holes covered at one end by a portion of a conductive plating base. The electroplating solution is permitted to fill the through holes in the workpiece and contact the portion of the conductive plating base. A voltage applied to the conductive plating base enables an electroplating operation that deposits the solid conductive material on the portion of the conductive plating base to thereby fill the through holes with the solid conductive material.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 5, 2012
    Inventors: James R. Gillen, Adam Rowen, Christian Arrington
  • Publication number: 20120064201
    Abstract: A package for fruits and vegetables having galvanic functionality is formed by using two or more metals with different galvanic activity properties on the surface of a nonmetallic substrate. The metals may be deposited electrolytically, by vacuum, autocatalytically, or by other methods. The metals are selected to create a galvanic reaction after the package is filled with a low pH food product and its associated liquids, juices, brine, etc. The package may extend the shelf-life of the food product contained therein, for example, by making metal ions available to the food product.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 15, 2012
    Applicant: DEL MONTE CORPORATION
    Inventors: Karim Nafisi-Movaghar, Loren Druz
  • Publication number: 20120024711
    Abstract: A composition for filling submicrometer sized features having an aperture size of 30 nanometers or less comprising a source of copper ions, and at least one suppressing agent selected from compounds of formula (I) wherein the R1 radicals are each independently selected from a copolymer of ethylene oxide and at least one further C3 to C4 alkylene oxide, said copolymer being a random copolymer. the R2 radicals are each independently selected from R1 or alkyl. X and Y are spacer groups independently, and X for each repeating unit independently, selected from C1 to C6 alkylen and Z—(O—Z)m wherein the Z radicals are each independently selected from C2 to C6 alkylen, n is an integer equal to or greater than 0. m is an integer equal to or greater than 1.
    Type: Application
    Filed: March 25, 2010
    Publication date: February 2, 2012
    Applicant: BASF SE
    Inventors: Cornelia Roeger-Goepfert, Roman Benedikt Raether, Charlotte Emnet, Alexandra Haag, Dieter Mayer
  • Patent number: 8101050
    Abstract: A system electroplates the interior or exterior cylindrical surfaces of an elongated workpiece, such as a pipe or shaft. The workpiece is continuously electroplated with metallic solutions via a traveling anode that gradually plates along the axial length of the workpiece instead of plating the entire part or large portions of the part at one time.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: January 24, 2012
    Assignee: Vetco Gray Inc.
    Inventors: Fife B. Ellis, Charles E. Jennings
  • Publication number: 20120012465
    Abstract: Methods for forming barrier/seed layers for interconnect structures are provided herein. In some embodiments, a method of processing a substrate having an opening formed in a first surface of the substrate, the opening having a sidewall and a bottom surface, the method may include forming a layer comprising manganese (Mn) and at least one of ruthenium (Ru) or cobalt (Co) on the sidewall and bottom surface of the opening; and depositing a conductive material on the layer to fill the opening. In some embodiments, one of ruthenium (Ru) or cobalt (Co) is deposited on the sidewall and bottom surface of the opening. The materials may be deposited by chemical vapor deposition (CVD) or by physical vapor deposition (PVD).
    Type: Application
    Filed: June 23, 2011
    Publication date: January 19, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: HOON KIM, WEI TI LEE, SANG HO YU, SESHADRI GANGULI, HYOUNG-CHAN HA, SANG HYEOB LEE
  • Publication number: 20110311800
    Abstract: A microstructure enabling provision of an anisotropic conductive member capable of reducing wiring defects and a method of producing such microstructure. The microstructure includes through-holes formed in an insulating matrix and filled with a metal and an insulating substance. The through-holes have a density of 1×106 to 1×1010 holes/mm2, a mean opening diameter of 10 nm to 5000 nm, and a mean depth of 10 ?m to 1000 ?m. The sealing ratio of the through-holes as attained by the metal alone is 80% or more, and the sealing ratio of the through-holes as attained by the metal and the insulating substance is 99% or more. The insulating substance is at least one kind selected from the group consisting of aluminum hydroxide, silicon dioxide, metal alkoxide, lithium chloride, titanium oxide, magnesium oxide, tantalum oxide, niobium oxide, and zirconium oxide.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 22, 2011
    Applicant: FUJIFILM CORPORATION
    Inventors: Kosuke YAMASHITA, Yusuke HATANAKA
  • Publication number: 20110284381
    Abstract: Methods of preparing metal and metal alloys with partially microcrystalline anodic coatings are disclosed. Associated article therefrom are correspondingly disclosed. The partially microcrystalline anodic coatings exhibit steam, superheated steam, alkaline and acidic resistance. Partially microcrystalline anodic coating can be prepared by impregnation of micropores of a metal or metal substrate with metal precursor species, conversion of the metal precursor species into metal hydroxides, thermal treatment to dry out moisture and to promote phase transformation of the metal hydroxide product into metal oxides solids and bonding with metastable metal oxide substance in the pore structure of the metal or metal alloy substrate, and hydrothermal sealing to create sealed partially microcrystalline anodic coating.
    Type: Application
    Filed: May 19, 2010
    Publication date: November 24, 2011
    Applicant: DURALECTRA-CHN, LLC
    Inventors: Timothy P. Cabot, John J. Tetrault, Dong-Jin Sung
  • Publication number: 20110284386
    Abstract: A method for electrofilling large, high aspect ratio recessed features with copper without depositing substantial amounts of copper in the field region is provided. The method allows completely filling recessed features having aspect ratios of at least about 5:1 such as at least about 10:1, and widths of at least about 1 ?m in a substantially void-free manner without depositing more than 5% of copper in the field region (relative to the thickness deposited in the recessed feature). The method involves contacting the substrate having one or more large, high aspect ratio recessed features (such as a TSVs) with an electrolyte comprising copper ions and an organic dual state inhibitor (DSI) configured for inhibiting copper deposition in the field region, and electrodepositing copper under potential-controlled conditions, where the potential is controlled not exceed the critical potential of the DSI.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 24, 2011
    Inventors: Mark J. Willey, Steven T. Mayer
  • Patent number: 8062495
    Abstract: Durable seamless replication tools are disclosed for replication of seamless relief patterns in desired media, for example in optical recording or data storage media. Methods of making such durable replication tools are disclosed, including preparing a recording substrate on the inner surface of a support cylinder, recording and developing a relief pattern in the substrate, creating a durable negative relief replica of the pattern, extracting the resulting durable tool sleeve from a processing cell, and mounting the tool sleeve on a mounting fixture. Apparatus are disclosed for fabricating such seamless replication tools, including systems for recording a desired relief pattern on a photosensitive layer on an inner surface of a support cylinder. Also disclosed are electrode-position cells for forming a durable tool sleeve having a desired relief pattern. The replication tool relief features may have critical dimensions down to the micron and nanometer regime.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: November 22, 2011
    Assignee: Microcontinuum, Inc.
    Inventor: W. Dennis Slafer
  • Publication number: 20110240481
    Abstract: A method and system for coating the interior surfaces of microscale hole features fabricated into the substantially planar surface of a work piece. The method comprises providing a work piece with a barrier metal coating that is substantially continuous and uniform both along the planar surface of the work piece and the inner surfaces of the microscale hole features wherein said barrier metal coating is applied by a substantially surface reaction limited process. The workpiece is provided with a coating, on the planar surface of the work piece, of a thick metal layer anchored to the barrier metal coat and disposed to provide substantially uniform electrical conduction capability to the microscale features located throughout and across the workpiece. An electrical contact path is provided to the electrically conductive coating at the perimeter of the work piece.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Applicant: NEXX Systems, Inc.
    Inventors: Arthur Keigler, Johannes Chiu, Zhenqiu Liu, Daniel Goodman
  • Patent number: 8007650
    Abstract: Disclosed is a low-cost, high quality metal nanotube comprising Ni, Fe, Co or the like. A metal thin film having a thickness of 10 to 80 nm is formed as a cathode on one surface of a film having penetrated holes, and an electrolyte solution is filled between an anode and the cathode to which a voltage is applied. Metal ions in the electrolyte solution are electrochemically deposited on the walls of the penetrated holes, thereby forming metal nanotubes. A thermoplastic resin porous film such as a polycarbonate film, an alumina porous film or aluminum anodic oxide film may be used as the film, and the diameters of the penetrated holes are preferably 15 to 500 nm. The metal thin film can be formed by sputtering, and preferably comprises a platinum-palladium alloy. The electrochemical processing of nanostructured tailored materials is a unique technique.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: August 30, 2011
    Inventors: Yasuhiro Fukunaka, Yoko Konishi, Munekazu Motoyama, Ryuji Ishii
  • Publication number: 20110174629
    Abstract: The invention relates to a method for functionalising at least a portion of a wall of a pore of a carrier material, characterised in that it comprises: a) contacting the pore with a solution of electrically activated entities and positioning two electrodes in said solution in order to create inside the pore, and when an electric signal is applied between the two electrodes, a voltage drop capable of generating a localised deposit on said wall; and b) applying an electric signal between the two electrodes in order to activate the electrically activated entities and carry out said functionalisation function.
    Type: Application
    Filed: February 5, 2009
    Publication date: July 21, 2011
    Applicant: Comm. A L'Energie Atom. Et Aux Energies Alterna
    Inventors: Aurélie Bouchet, Emeline Descamps, Pascal Mailley, Thierry Livache, Vincent Haguet, Francois Chatelain
  • Publication number: 20110076390
    Abstract: Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents formation of undesirable micro-voids during Cu metal filling of high-aspect-ratio recessed features, such as trenches and vias, and enables formation of large Cu metal grains that include a continuous Cu metal layer plated onto the continuous Ru metal film. The large Cu grains lower the electrical resistivity of the Cu filled recessed features and increase the reliability of the integrated circuit.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicants: TOKYO ELECTRON LIMITED, NOVELLUS SYSTEMS, INC.
    Inventors: Frank M. Cerio, JR., Shigeru Mizuno, Jonathan Reid, Thomas Ponnuswamy
  • Patent number: 7883614
    Abstract: The method for manufacturing an electronic part includes a step of forming an opening hole onto an insulating member sandwiched between a conductor film and a lower conductor layer, from the conductor film, a step of making a surface of the lower conductor layer adhering the insulating member as bottom of the opening hole, and making a metal plating as a conductor portion grow in the opening hole from the lower conductor layer. In the method, after metal plating has reached the conductor film, the metal plating is grown on the conductor film and the conductor portion as electrode, to thereby form a thickness enough to form an upper conductive layer.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: February 8, 2011
    Assignee: TDK Corporation
    Inventors: Masashi Gotoh, Hajime Kuwajima, Hiroki Hara, Hiroshi Yamamoto
  • Patent number: 7867368
    Abstract: A plating apparatus has a tubular electrode (16) placed in a hollow section (12) of work (11). The tubular electrode (16) has a through-hole (16a) formed in the longitudinal direction. A circular tube-like gap (S1) in which a plating liquid (17) flows is formed between the tubular electrode placed in the hollow section and an inner peripheral wall (14) of the hollow section. The plating liquid flows spirally from the lower end of the gap to the upper end by action of a vortex producing flow path (29) communicating to the lower end of the gap. The plating liquid having reached the upper end circulates through the through-hole of the tubular electrode.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: January 11, 2011
    Assignee: Honda Motor Co., Ltd.
    Inventors: Yoshimitsu Ogawa, Hajime Miyasaka
  • Publication number: 20100310297
    Abstract: The present invention provides a device for packaging a composition for applying to keratinous materials, the device comprising a container defining an inside space containing the composition; a coating of a biocidal material covering at least part of the container and coming into contact with the composition contained in the inside space of the container; and a member that is movable within the container.
    Type: Application
    Filed: December 18, 2008
    Publication date: December 9, 2010
    Applicant: L'OREAL
    Inventor: Jean-Louis Gueret
  • Patent number: 7842170
    Abstract: This invention relates generally to a method and apparatus for electroplating selected portions of a high contact force, high elastic response range pin-receiving and cylindrical electrical contact having a pair of spaced apart cantilever beams which extend forwardly from a base to a pin-receiving end. In accordance with the invention at least one plating cell is provided including a cavity type of enclosure thereof in general matching the outer contour of the lower portion and pin receiving end of the contact whereas plating solution is ejected towards the pin receiving end including at least one conducting device for electric current is provided adjacent to the opposite region of the contact for engaging with thereof whereas electric current is being conducted.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: November 30, 2010
    Inventor: Volker von Detten