Ceramic Or Glass Substrate Patents (Class 205/162)
  • Publication number: 20090277797
    Abstract: A method and system for removing contaminants from a fluid are provided. The method can generally include providing microstructures in the fluid. At least some of the contaminants in the fluid are attracted to the microstructures and adhered to the microstructures. With the contaminants attached to the microstructures, the microstructures can be separated from the fluid so that the contaminants are thereby removed from the fluid.
    Type: Application
    Filed: May 12, 2008
    Publication date: November 12, 2009
    Applicant: Chevron U.S.A. Inc.
    Inventor: Randall Boyd Pruet
  • Publication number: 20090268372
    Abstract: When external electrodes of a multilayer ceramic capacitor are formed by performing direct plating on surfaces at which internal electrodes are exposed without forming paste electrode layers, bonding forces of plating layers are relatively weak, and in addition, when glass particles are included in the plating layers, blisters are often generated. To overcome these problems, a multilayer ceramic capacitor is formed by performing electrolytic plating using a plating bath including glass particles, electrolytic plating layers including glass particles dispersed therein are formed as the external electrodes.
    Type: Application
    Filed: January 21, 2009
    Publication date: October 29, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Makoto OGAWA, Akihiro MOTOKI, Ichiro NAKAMURA, Norihiro YOSHIKAWA, Toshiyuki IWANAGA, Kenichi KAWASAKI, Shunsuke TAKEUCHI
  • Publication number: 20090242414
    Abstract: The invention relates to a process for the electrochemical deposition of tantalum and/or copper on a substrate in an ionic liquid comprising at least one tetraalkylammonium, tetraalkylphosphonium, 1,1-dialkylpyrrolidinium, 1-hydroxyalkyl-1-alkylpyrrolidinium, 1-hydroxyalkyl-3-alkylimidazolium or 1,3-bis(hydroxyalkyl)imidazolium cation, where the alkyl groups or the alkylene chain of the hydroxyalkyl group may each, independently of one another, have 1 to 10 C atoms.
    Type: Application
    Filed: November 15, 2005
    Publication date: October 1, 2009
    Inventors: Urs Welz-Biermann, Frank Endres, El Abedin Zein
  • Patent number: 7560015
    Abstract: Apparatus and method for electrolytic coating of a mould, the internal surfaces of which demarcate a mould cavity, with a coating material for the purpose of achieving or re-achieving intended mould cavity dimensions. The mould, as the cathode, and an anode positioned in the mould cavity and an electrolyte containing the coating material are used. The electrolyte serving as the carrier of the coating material flows through the mould cavity in a controlled manner. During the electrolytic coating, only the internal surfaces of the mould cavity come into contact with the electrolyte and the external surfaces of the s mould therefore do not have to be covered. The mechanical properties can be kept largely uniform over the entire region. The coating can be achieved more rapidly than with the conventional processes.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: July 14, 2009
    Assignee: Concast AG
    Inventor: Adrian Stilli
  • Patent number: 7156973
    Abstract: This invention relates to increasing the electrocatalytic activity of conducting polymers so that the same may be useful for electro-oxidation of methanol which is important for fuel-cell technology. Conventional catalysts used for this process are based on Pt, Ru or Pd complexes which are incorporated in carbon/graphite based electrodes. However, these are not only expensive but difficult to fabricate in different shapes. Conducting polymer based electrodes have advantage of ease of fabrication but their activity has been found in the past to be not very high. The present invention provides a process for preparation of conducting polymer based electrodes which have very high catalytic activity (8 to 10 times higher) for electro-oxidation of methanol.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: January 2, 2007
    Assignee: Council of Scientific and Industrial Research
    Inventors: Subramaniam Radhakrishnan, Arindam Adhikari
  • Patent number: 7128820
    Abstract: A composition and process for electroplating a conductive metal layer onto the surface of a non-conductive material is disclosed. The composition and process utilizes an obvious dispersion traditional carbon black particles and highly conductive carbon black particles. The mixture of carbon blacks provides optimum dispersion and electroplating properties.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: October 31, 2006
    Inventor: Hyunjung Lee
  • Patent number: 7082655
    Abstract: A transducer having a ceramic element in which the ceramic is elevated above a polymer and a method of manufacturing the transducer. The transducer comprises a piezo-composite element comprising a ceramic element embedded in epoxy. In an array, the ceramic elements may be in the form of posts. The plurality of ceramic elements is slightly elevated above the polymer and in staggered arrangement with the polymer. The element is manufactured by first grinding the face of the composite and removing damaged ceramic by acid etching the ceramic. The epoxy is removed by plasma etching so that the ceramic is above the epoxy. The composite is sputter plated so that a maximum temperature that could damage the plating is not exceeded. The ceramic is then poled so that a maximum temperature that could damage the plating is not exceeded. Contacts are then attached to the plating adjacent the ceramic.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: August 1, 2006
    Assignee: GE Inspection Technologies, LP
    Inventors: Kelley E. Yetter, Leslie B. Nye
  • Patent number: 7025867
    Abstract: The invention relates to a method for the direct electrolytic metallization of electrically non-conducting substrate surfaces comprising bringing the substrate surfaces into contact with a water-soluble polymer; treating the substrate surfaces with a permanganate solution; treating the substrate surfaces with an acidic aqueous solution or an acidic microemulsion of aqueous base containing at least one thiophene compound and at least one alkane sulfonic acid selected from the group comprising methane sulfonic acid, ethane sulfonic acid and ethane disulfonic acid; electrolytically metallizing the substrate surfaces.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: April 11, 2006
    Assignee: Atotech Deutschland GmbH
    Inventors: Regina Czeczka, Lutz Stamp
  • Patent number: 7005054
    Abstract: A method to make probes of a probe card includes providing a blocking plate on an electroplating tank. The blocking plate has a plurality of openings according to the layout of contact pads on a probe head. There are bumps on the contact pads of the probe head. Continuous electroplating process can be executed after bumps (contact pads) contact electroplating solution in the electroplating tank through the openings of the blocking plate. By continuously moving the probe head according to the desired shape of probes, probes were formed by electroplating. These probes can be made into different shapes with good uniformity in elasticity and heights to increase the quality of electrical contact during wafer probing. Moreover, the process lead time and fabrication cost are saved.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: February 28, 2006
    Assignees: Chipmos Technologies (Bermuda) Ltd., Chipmos Technologies Inc.
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee
  • Patent number: 7005192
    Abstract: A ceramic electronic component having a ceramic member into which no plating intrudes, and a method of producing the ceramic electronic component by which the ceramic electronic component can be easily produced are provided. The ceramic electronic component contains a ceramic member, and terminal electrodes formed on both of end-faces of the ceramic member. Each terminal electrode comprises an external electrode, and a plating coat formed thereon. To produce the ceramic electronic component, the ceramic member having the external electrodes are dipped into a water-repelling agent, dried, and plated. The water-repelling agent contains a functional group which is readily adsorbed to the external electrodes and a hydrophobic functional group.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: February 28, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukio Sanada, Yoshinori Saito
  • Patent number: 6972081
    Abstract: A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating copper. The vertical spiral inductor is formed and defined by next depositing a pattern of top metal (e.g. copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core is made from a permeable or non-permeable material.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: December 6, 2005
    Assignee: Xerox Corporation
    Inventor: Kaiser H. Wong
  • Patent number: 6787047
    Abstract: A method for manufacturing a sensor, the sensor including a three-dimensional interdigital electrode arrangement positioned on a substrate, comprising applying a temperature sensing resistor onto the substrate by sputtering a first adhesion layer and a first metallic layer onto the substrate, applying a first resist layer to the first metallic layer, applying and structuring a first resist material on the first metallic layer, and after structuring, etching the first metallic layer in resist free areas; and applying a three-dimensional interdigital electrode arrangement onto the substrate by sputtering a second adhesion layer and a second metallic layer onto the substrate, applying and structuring a second resist material only to second metal layer, after the structuring, etching the second metallic layer in resist free areas to form valleys, and after etching the second metallic layer, applying an electroplating layer.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: September 7, 2004
    Assignee: Robert Bosch GmbH
    Inventors: Dietmar Hahn, Gottfried Flik, Alexandra Jauernig
  • Patent number: 6764586
    Abstract: Provided is a process for metallizing an insulating substrate by depositing a uniform thin film of a metal on the insulating substrate. The process comprises placing the insulating substrate in an electrochemical cell which contains as the electrolyte a solution of a salt of the metal in a solvent, and which comprises an anode of the metal and a cathode in direct contact with the insulating substrate. A conducting film, which will constitute the cathode, is initially applied to one end of the substrate. The substrate is placed in the electrochemical cell in such a way that the surface to be metallized is vertical and the cathode is located in the upper part. A current is imposed on the electrochemical cell with an intensity such that it creates a current density of between 1 and 50 mA/cm2 in the horizontal section of the electrochemical cell level with the growth front of the film which is deposited.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: July 20, 2004
    Assignee: Centre National de la Recherche Scientifique
    Inventor: Vincent Fleury
  • Publication number: 20040118692
    Abstract: An improved copper ECD process. After the copper seed layer (116) is formed, a first portion of copper film (118) is plated onto the surface of the seed layer (116). The surface of the first portion of the copper film (118) is then rinsed to equalize the organic adsorption on all sites to prevent preferential copper growth in dense areas. After rinsing, the remaining copper of the copper film (118) is electrochemically deposited.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Inventors: Linlin Chen, Jiong-Ping Lu, Changfeng Xia
  • Publication number: 20040026254
    Abstract: Method for selectively metallizing dielectric materials, the method includes: adhesively covering dielectric materials with an activating layer comprising a conductive material, which layer is subsequently structured by way of laser ablation; and using a subsequent laser treatment to structure the activating layer in such a way that discrete conductive structures are formed, which are subsequently metallized.
    Type: Application
    Filed: August 4, 2003
    Publication date: February 12, 2004
    Inventors: Jurgen Hupe, Walter Kronenberg, Jorg Kickelhain, Dieter J. Meier
  • Patent number: 6656339
    Abstract: Methods of forming a nano-supported catalyst on a substrate and at least one carbon nanotube on the substrate are comprised of configuring a substrate with an electrode (102), immersing the substrate with the electrode into a solvent containing a first metal salt and a second metal salt (104) and applying a bias voltage to the electrode such that a nano-supported catalyst is at least partly formed with the first metal salt and the second metal salt on the substrate at the electrode (106). In addition, the method of forming at least one carbon nanotube is comprised of conducting a chemical reaction process such as catalytic decomposition, pyrolysis, chemical vapor deposition, or hot filament chemical vapor deposition o grow at least one nanotube on the surface of the nano-supported catalyst (108).
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: December 2, 2003
    Assignee: Motorola, Inc.
    Inventors: Albert A. Talin, Bernard F. Coll, Kenneth A. Dean, Matthew Stainer
  • Publication number: 20030155249
    Abstract: A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.
    Type: Application
    Filed: November 22, 2002
    Publication date: August 21, 2003
    Applicant: Semitool, Inc.
    Inventors: Linlin Chen, Thomas Taylor
  • Publication number: 20030155248
    Abstract: An inexpensive process for depositing an electrically conductive material on selected surfaces of a dielectric substrate may be advantageously employed in the manufacture of printed wiring boards having high quality, high density, fine-line circuitry, thereby allowing miniaturization of electronic components and/or increased interconnect capacity. The process may also be used for providing conductive pathways between opposite sides of a dielectric substrate and in decorative metallization applications.
    Type: Application
    Filed: February 21, 2002
    Publication date: August 21, 2003
    Inventors: David A. Dalman, Petar R. Dvornic
  • Patent number: 6546751
    Abstract: A method of providing a decorative metal pattern on an electrically non-conductive substrate, such as a glass or plastic substrate, which includes applying a mixture of heat fusible material, such as glass or plastic, with a metal having a particle size less than about 500 mesh constituting at least 50% of the mixture, to the substrate in the desired pattern, heating the so-applied mixture until the heat fusible material fuses and bonds to the substrate, cleaning the substrate with the pattern thereon, and a electroplating the pattern with the desired finish metal. In one method in which the mixture includes glass, a negative resist is adhesively secured to the substrate and the mixture is applied. The resist disintegrates upon heating. In another method, used when the substrate is plastic, a mixture of plastic and metal in past form is applied to the substrate by silk screening or pad printing to form the pattern.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: April 15, 2003
    Inventor: Peter Jaeger
  • Patent number: 6426290
    Abstract: A method of electroplating both sides of a dual-sided circuit board substrate having electrically connected, multi-trace circuit patterns formed on both sides of the substrate, without requiring formation and at least partial removal of electrically conductive tie bars, comprises steps of covering and electrically contacting a first one of the circuit patterns with a first layer of electrically conductive material, applying an electrical potential to the first layer of electrically conductive material to effect electroplating on the second one of the circuit patterns, removing the first layer of electrically conductive material, covering and electrically contacting the second one of the circuit patterns with a second layer of electrically conductive material, applying an electrical potential to the second layer of electrically conductive material to effect electroplating on the first one of the circuit patterns, and removing the second layer of electrically conductive material.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: July 30, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Valerie Vivares, Robert Newman, Edwin R. Fontecha
  • Patent number: 6379524
    Abstract: A process for manufacturing a composite membrane for separation of hydrogen gas using palladium, which employs the step of electroplating under vacuum an alloy of a palladium compound and a transition metal.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: April 30, 2002
    Assignee: Korea Research Institute of Chemical Technology
    Inventors: Kew Ho Lee, Seung Eun Nam, Sang Hak Lee
  • Patent number: 6378338
    Abstract: Magnetic disk substrates are produced by subjecting glass substrates to at least steps of degreasing, etching, sensitization with tin chloride, activation and sensitivity-enhancing treatment in that order, then plating the pretreated substrates with a nickel/phosphorus film, and thereafter polishing the plated substrates. In the process, the substrates being processed are washed with hot pure water at a temperature of not lower than 50° C. for a period of from 20 to 90 seconds, after the sensitization step but before the activation step, and heated at a temperature of not lower than 70° C. for a period of from 5 to 100 minutes, after the sensitization step but before the nickel/phosphorus-plating step.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: April 30, 2002
    Assignee: Showa Denko K.K.
    Inventors: Kurata Awaya, Kazuyoshi Nishizawa, Kiyoshi Tada
  • Patent number: 6350365
    Abstract: A method of producing a multilayer circuit board comprising a core substrate and a plurality of layers of wiring lines on both sides of the core substrate with an insulation layer being interposed therebetween; the layers of wiring lines on both sides being interconnected by conducting members provided on the inside walls of through holes going through the core substrate, and the interposed insulation layer. The method further comprising, wiring lines with an upper layer of wiring lines wherein the conducting member on the inside wall of the through hole and the via are formed in separate steps. The method can provide a multilayer circuit board which can advantageously be used to mount a chip or device thereon having an increased number of electrodes or terminals.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: February 26, 2002
    Assignee: Shinko Electric Industries Co., LTD
    Inventors: Toshinori Koyama, Noritaka Katagiri
  • Publication number: 20010052467
    Abstract: The present invention relates to a method and apparatus of fabricating electromagnetic coil vanes. The method involves photolithographically exposing high resolution, dense wire patterns in a flash coat of copper, on both sides of a ceramic vane substrate. The substrate can be pre-drilled with a through hole to connect the two copper coil patterns. Additional copper is then deposited on both high resolution patterns and in the through hole by plating until the desired thickness is obtained. A firing operation is then performed that eutectically bonds the copper to the ceramic.
    Type: Application
    Filed: December 23, 1999
    Publication date: December 20, 2001
    Inventor: DAVID J. PINCKNEY
  • Publication number: 20010050100
    Abstract: A Cu plated ceramic substrate is used in a semiconductor. On a ceramic substrate layer, a thin-film Cr layer is put, and a thin-firm Au layer is put on the Cr layer. The Au layer is plated with Cu. By providing the Au and Cr layers between the ceramic plate and Cu layer, adhesibility is increased. A Pertier element which includes the Cu plated ceramic layer is employed in a semiconductor to absorb and generate heat efficiently.
    Type: Application
    Filed: April 11, 2001
    Publication date: December 13, 2001
    Inventors: Iwao Numakura, Noriaki Tsukada
  • Patent number: 6235182
    Abstract: A solution for the pretreatment of electrically non-conductive surfaces and a method for coating surfaces with solid matter particles, for example carbon black, graphite, silicon dioxide, aluminum oxides, transition metal chalcogenides and titanium dioxide. Furthermore, the invention relates to a production method for the solution also. The solution contains a solvent, polyelectrolytic compound as a coagulation trigger, and a charged surfactant which has opposite polarity relative to the polyelectrolytic compound. After pretreatment of surfaces with the solution, the surfaces are then brought into contact with a dispersion containing the solid matter particles.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: May 22, 2001
    Assignee: Atotech Deutschland GmbH
    Inventors: Marjan Bele, Jürgen Otto Besenhard, Stane Pejovnik, Heinrich Meyer
  • Patent number: 6228243
    Abstract: A new method to synthesize crystalline films, superlattices and multilayered devices based on metallic or semiconductor compounds or alloys in electrolyte media on non-crystalline substrates. An automated sequence of flow, equilibration and underpotential electrodeposition from a single electrolyte comprising the film constituents leads to the synthesis of stoichiometric, epitaxial layers. The invention process is based on a new concept of electrochemical molecular layer epitaxy; it provides a relatively simple, fast and inexpensive method to fabricate a wide range of high quality technological materials, ranging from large-area single phase films to multiple quantum-well structures.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: May 8, 2001
    Inventor: Shalini Menezes
  • Patent number: 6224735
    Abstract: A transparent support having formed thereon a transparent conductive film and an organic or inorganic semiconductor thin film that generates an electromotive force by irradiation of light formed on the transparent conductive film, and an aqueous electrolytic solution containing a solvent, a coloring material and a polymer electrodeposition material, whose solubility in the solvent changes depending on the change of pH are prepared; the substrate and a counter electrode connected to the substrate are arranged in such a manner that an surface of the substrate, on which the semiconductor thin film is formed, and the counter electrode are immersed in the aqueous electrolytic solution; the transparent support is selectively irradiated with light; an electrodeposition film having the coloring material and the polymer electrodeposition material is deposited on a part of the support, on which an electromotive force is generated; and the deposited electrodeposition film is brought into contact with an aqueous liquid h
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: May 1, 2001
    Assignee: Fuji Xerox Co. Ltd.
    Inventors: Eiichi Akutsu, Shigemi Ohtsu, Lyong sun Pu
  • Patent number: 6171468
    Abstract: A method of applying a conductive carbon coating to a non-conductive surface, conductive carbon compositions for that purpose, and a printed wiring board having through holes or other nonconductive surfaces treated with such carbon compositions are disclosed. A liquid dispersion of electrically conductive carbon (for example, graphite) having a mean particle size no greater than about 50 microns is coated on the non-conductive surface to form an electrically conductive carbon coating. The conductive carbon coating is then fixed on the (formerly) nonconductive surface. Fixing may be accomplished in a variety of different ways. For example, the fixing step can be carried out by applying a fixing liquid to the carbon-coated surface. One example of a suitable fixing liquid is a dilute aqueous acid. Fixing may also be carried out by removing the excess carbon dispersion with an air knife or other source of compressed air.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: January 9, 2001
    Assignee: Electrochemicals Inc.
    Inventors: Charles Edwin Thorn, Frank Polakovic, Charles A. Mosolf
  • Patent number: 6110347
    Abstract: A method for forming an indium oxide film on an electrically conductive substrate by immersing the substrate and a counter electrode in an aqueous solution containing at least nitrate and indium ions and flowing an electric current between the substrate and the couter electrode, thereby causing indium oxide film formation on the substrate, is provided. A substrate for a semiconductor element and a photovoltaic element produced using the film forming method are also provided. An aqueous solution for the formation of an indium oxide film by an electroless deposition process, containing at least nitrate and indium ions and tartrate, is also disclosed. A film-forming method for the formation of an indium oxide film on a substrate by an electroless deposition process, using the aqueous solution, and a substrate for a semiconductor element and a photovoltaic element produced using the film-forming method are further provided.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: August 29, 2000
    Assignee: Canon Kabushiki Kashia
    Inventors: Kozo Arao, Katsumi Nakagawa, Yukiko Iwasaki
  • Patent number: 6017628
    Abstract: An article (130) comprising a non-conductive substrate (136), preferably of an environmentally degradeable character, having a thickness of an oxidizable metal coating (138) thereon, and optionally an oxidation enhancingly effective amount of a salt (140), e.g., from about 0.005 to about 25% by weight of salt, based on the weight of oxidizable metal, present on the oxidizable metal coating. Also disclosed is a related method of forming such article, comprising chemical vapor depositing the oxidizable metal coating on the substrate. When utilized in a form comprising fine-diameter substrate elements such as filaments, the resulting product may be usefully employed as an "evanescent" chaff. In the presence of atmospheric moisture, such evanescent chaff undergoes oxidization of the oxidizable metal coating so that the conductivity and radar absorbance/reflectance characteristics of the chaff transiently decays.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: January 25, 2000
    Assignee: Alliant Defense Electronics Systems, Inc.
    Inventors: Ward C Stevens, Edward A. Sturm
  • Patent number: 5948232
    Abstract: The present invention provides electronically conducting polymer films formed from formulations of pyrrole and an electron acceptor. The formulations may include photoinitiators, flexibilizers, solvents and the like. These formulations can be used to manufacture multichip modules on typical multichip module substrates, such as alumina, fiberglass epoxy, silicon and polyimide. The formulations and methods of the invention enable the formation of passive electronic circuit elements such as resistors, capacitors and inductors in multichip modules or printed wiring boards.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: September 7, 1999
    Assignee: Lynntech, Inc.
    Inventors: Oliver J. Murphy, G. Duncan Hitchens, Dalibor Hodko, Eric T. Clarke, David L. Miller, Donald L. Parker
  • Patent number: 5938912
    Abstract: A method of providing a decorative metal pattern on an electrically non-conductive substrate, such as a glass or plastic substrate, which includes applying a mixture of a heat fusible material, such as glass or plastic, with a metal having a particle size less than about 500 mesh constituting at least 50% of the mixture, to the substrate in the desired pattern, heating the so-applied mixture until the heat fusible material fuses and bonds to the substrate, cleaning the substrate with the pattern thereon, and electroplating the pattern with the desired finish metal. In one method in which the mixture includes glass, a negative resist is adhesively secured to the substrate and the mixture is applied. The resist disintegrates upon heating. In another method, used when the substrate is plastic, a mixture of plastic and metal in paste form is applied to the substrate by silk screening or pad printing to form the pattern.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: August 17, 1999
    Inventor: Peter C. Jaeger
  • Patent number: 5895562
    Abstract: Gas shielding is employed to prevent metal plating on contacts during electroplating to reduce particulate contamination and increase thickness uniformity. In another embodiment, gas shielding is employed to prevent deposition on the backside and edges of a semiconductor wafer during plating.
    Type: Grant
    Filed: August 3, 1998
    Date of Patent: April 20, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Valery Dubin
  • Patent number: 5855755
    Abstract: The present invention provides electronically conducting polymer films formed from photosensitive formulations of pyrrole and an electron acceptor that have been selectively exposed to UV light, laser light, or electron beams. The formulations may include photoinitiators, flexibilizers, solvents and the like. These formulations can be used to manufacture multichip modules on typical multichip module substrates, such as alumina, fiberglass epoxy, silicon and polyimide. The formulations and methods of the invention enable the formation of passive electronic circuit elements such as resistors, capacitors and inductors in multichip modules or printed wiring boards.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: January 5, 1999
    Assignee: Lynntech, Inc.
    Inventors: Oliver J. Murphy, G. Duncan Hitchens, Dalibor Hodko, Eric T. Clarke, David L. Miller, Donald L. Parker
  • Patent number: 5820742
    Abstract: An electrodeposition coating method characterized in that in electrodeposition coating of a water soluble composition of a polyimide precursor which is prepared by using 1,2,3,4-butanetetracarboxylic acid or its imide-forming derivative and a diamine and has a percentage of residual acid value of 30 to 3%, there is added previously a water soluble solvent selected from the group consisting of an alcoholic solvent, N-methyl-2-pyrrolidone, dimethylformamide and dimethylacetamide to the above-mentioned composition, and an electrodeposition coating agent used therefor. There can be provided the electrodeposition coating method practicable for the use of a water soluble polyimide composition which is capable of forming a uniform baked coating film having a continuous surface and being excellent in adhesivity to substrate and in toughness.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: October 13, 1998
    Assignee: Daikin Industries, Ltd.
    Inventors: Shin-i-ti Oda, Toshihide Okamoto, Hiroshi Yokota, Kenjiro Hayashi, Kazufumi Hamabuchi, Toshio Mizuno
  • Patent number: 5788830
    Abstract: A process for electroplating a surface comprising copper and an insulating material, comprising: applying specific carbon particles or a palladium compound to this surface, microetching the copper to remove the specific carbon particles or the palladium compound, and providing electroplating. The process is characterized by using an aqueous solution comprising 5 to 60 wt % of sulfuric acid, 3 to 35 wt % of hydrogen peroxide, 0.01 to 10 wt % of a phosphonic group-containing amine or a salt thereof, and, optionally, 0.1 to 10 wt % of an amine other than the phosphonic group-containing amine, as a microetching agent. This process can ensure highly reliable electroplating to inner walls of printing wiring board through-holes.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: August 4, 1998
    Assignee: MEC Co., Ltd.
    Inventors: Yoshihiro Sakamoto, Toshio Tanimura, Minoru Outani
  • Patent number: 5725807
    Abstract: A method of applying a conductive carbon coating to a non-conductive layer, conductive carbon compositions, and a printed wiring board having through holes or other surfaces treated with such carbon compositions are disclosed. A board or other substrate including at least first and second electrically conductive metal layers separated by a non-conductive layer is provided. The board has a recess extending through at least one of the metal layers into the non-conductive layer. The recess has a non-conductive surface which is desired to be made electrically conductive. The carbon in the dispersion has a mean particle size no greater than about 50 microns. The method is carried out by applying the carbon dispersion to a non-conductive surface of the recess to form a substantially continuous, electrically conductive carbon coating. Optionally, the coating is then fixed, leaving the carbon deposit as a substantially continuous, electrically conductive layer. Chemical and physical fixing steps are disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 10, 1998
    Assignee: Electrochemicals Inc.
    Inventors: Charles Edwin Thorn, Frank Polakovic, Charles A. Mosolf
  • Patent number: 5690805
    Abstract: A method of applying a conductive carbon coating to a non-conductive layer, conductive carbon compositions, and a printed wiring board having through holes or other surfaces treated with such carbon compositions are disclosed. A board or other substrate including at least first and second electrically conductive metal layers separated by a non-conductive layer is provided. The board has a recess extending through at least one of the metal layers into the non-conductive layer. The recess has a non-conductive surface which is desired to be made electrically conductive. The carbon in the dispersion has a mean particle size no greater than about 50 microns. The method is carried out by applying the carbon dispersion to a non-conductive surface of the recess to form a substantially continuous, electrically conductive carbon coating. Optionally, the coating is then fixed, leaving the carbon deposit as a substantially continuous, electrically conductive layer. Chemical and physical fixing steps are disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 25, 1997
    Assignee: Electrochemicals Inc.
    Inventors: Charles Edwin Thorn, Frank Polakovic, Charles A. Mosolf
  • Patent number: 5685968
    Abstract: In a ceramic substrate with a thin-film capacitor, having a ceramic substrate a lower electrode layer formed on the ceramic substrate, a dielectric layer formed on the lower electrode layer and made of an oxide of a material constituting the lower electrode layer, and an upper electrode layer formed on the dielectric layer, a plating layer is provided between the ceramic base and the lower electrode layer to serve as a basis for the lower electrode layer.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: November 11, 1997
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Toshitaka Hayakawa, Shinobu Yoshida, Toshikatsu Takada
  • Patent number: 5674369
    Abstract: A color filter having an improved uniformity of color layer thickness is industrially advantageously, manufactured by an electrodeposition method using as a counter electrode a wire netting-form electrode.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: October 7, 1997
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Tsutomu Watanabe, Toshiaki Ota, Tsuyoshi Nakano
  • Patent number: 5674373
    Abstract: A method comprising the steps of (a) preparing a divided copper oxide dispersion (4) including a solvent and a selected binder, (b) applying said dispersion to a non-conductive substrate (1) to form a film (5), (c) forming a Cu film (9) with a suitable reagent, and (d) electrolytically depositing at least one metal film (11) on said film (9).
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: October 7, 1997
    Assignee: Trefimetaux
    Inventors: Marcel Negrerie, Guy de Hollain, Van Huu N'Guyen, Serge Insenga
  • Patent number: 5667662
    Abstract: A process for electroplating a nonconducting substrate comprising formation of a film of a conductive polymer on the surface of a nonconducting substrate and electrolytic deposition of metal thereover. The conductive film is formed by deposition of the conductive polymer onto said surface from an aqueous suspension of said polymer containing a polymeric stabilizer having repeating alkylene oxide groups and a hydrophilic--lipophilic balance of at least 10.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: September 16, 1997
    Assignee: Shipley Company, L.L.C.
    Inventors: Wade Sonnenberg, Patrick J. Houle, Thong B. Luong, James G. Shelnut, Gordon Fisher
  • Patent number: 5653834
    Abstract: Electrical feedthroughs in printed circuit board support substrates for use in making double sided ceramic multilayer printed circuit boards are made by insulating the feedthrough openings with a first layer of nickel oxide and one or more layers of glass, and then filling the remainder of the feedthroughs with a conductive metal via fill ink. After firing, the resultant structure provides insulated electrical feedthroughs through the support substrate.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: August 5, 1997
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Thomas Peter Azzaro, Barry Jay Thaler, Edward James Conlon, Ananda Hosakere Kumar
  • Patent number: 5616230
    Abstract: A process for plating an electrically nonconductive substrate by the following sequence of steps:(1) a step of treating an electrically nonconductive substrate with a solution containing a silane coupling agent;(2) a step of treating the electrically nonconductive substrate from said step (1) with a solution containing an anionic surfactant;(3) a step of the electrically nonconductive substrate from said step (2) with a solution containing a palladium compound and at least one nitrogen-containing sulfur compound selected from among thiourea and its derivatives;(4) a step of treating the electrically nonconductive substrate from said step (3) with a reducing solution containing at least one member selected from among sodium borohydride, sodium hypophosphite, hydrazine, dimethylaminoborane, hydroxylamine and glyoxylic acid; and(5) a step of forming an electroplating layer on the electrically nonconductive substrate from said step (4).
    Type: Grant
    Filed: January 20, 1995
    Date of Patent: April 1, 1997
    Assignee: Okuno Chemical Industries Co., Ltd.
    Inventors: Kuniaki Otsuka, Kazue Yamamoto, Satoshi Konishi, Shigeru Yamato
  • Patent number: 5607569
    Abstract: A method of fabricating a ceramic package body for holding semiconductor devices which include external terminals arranged on an outer surface of the ceramic package body, a first conductive pattern having first conductors connected respectively to the external terminals, and a second conductive pattern having second conductors not connected to any said external terminal.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 4, 1997
    Assignee: Kabushiki Kaisha Sumitomo Kinzoku Ceramics
    Inventors: Sumio Nakano, Kazumi Hirashita, Reiko Sumida
  • Patent number: 5597471
    Abstract: A process for metallizing non-conductive surfaces, by treating the non-conductive surface with a solution containing at least one suspended or solute oxidation agent, contacting the treated non-conductive surface with an acidic solution containing at least one water soluble polymer selected from the group consisting of homopolymers and copolymers, and at least one aromatic compound which chemically polymerizes the water-soluble polymer and the aromatic compound to form a conductive polymer, and electroplating the conductive polymer. Each water-soluble polymer contains uncharged structural elements or is cationic polyelectrolyte. Additionally, each water soluble polymer is capable of protonizing/deprotonizing reactions, formation of hydrogen bridge compounds and van der Waals interactions.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: January 28, 1997
    Assignee: Atotech Deutschland GmbH
    Inventors: Andrea Ragge, Heinrich Meyer, Gonzalo Urrutia Desmaison
  • Patent number: 5575898
    Abstract: Process for through-hole plating of printed circuit boards and multilayers by applying a conductive layer of a polythiophene onto the walls of the through-holes and electrodeposition of copper onto the walls of the through-holes, characterized in that a microemulsion of a monomeric thiophene of the formula (I) is used to form the conductive polythiophene layer, ##STR1## in which X denotes oxygen or a single bond,R.sub.1 and R.sub.2 mutually independently denote hydrogen or a C.sub.1 -C.sub.4 alkyl group or together form an optionally substituted C.sub.1 -C.sub.4 alkylene residue or a 1,2-cyclohexylene residue,and in that the conductive layer of polythiophene is produced on the walls of the through-holes by subsequent or simultaneous treatment with acid and, finally, a metal is electro-deposited on this conductive base.
    Type: Grant
    Filed: September 20, 1995
    Date of Patent: November 19, 1996
    Assignee: Bayer AG
    Inventors: Gerhard-Dieter Wolf, Friedrich Jonas, Reinhard Schomacker
  • Patent number: 5549808
    Abstract: The present invention relates generally to a new structure and method for capped copper electrical interconnects. More particularly, the invention encompasses a novel structure in which one or more of the copper electrical interconnects within a semiconductor substrate are capped to obtain a robust electrical interconnect structure. A method for obtaining such capped copper electrical interconnect structure is also disclosed. These capped interconnects can be a single layer or multi-layer structures. Similarly, the interconnect structure that is being capped can itself be composed of single or multi-layered material.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: August 27, 1996
    Assignee: International Business Machines Corporation
    Inventors: Mukta S. Farooq, Suryanarayana Kaja, Eric D. Perfecto, George E. White
  • Patent number: 5547558
    Abstract: The invention relates to a process for directly electroplating a conductive metal to the inner walls of through-holes in printed-wiring boards. The process comprises steps of providing an aqueous dispersion containing graphite particles with an average particle diameter of 2 .mu.m or less or carbon black particles with an average particle diameter of 1 .mu.m or less; applying this aqueous dispersion to a surface of a nonconductive surface substrate; dipping the nonconductive surface in a strong acidic aqueous solution with pH 3 or lower to form a layer of said particles; and electroplating using the particle layer as a conductive layer.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: August 20, 1996
    Assignee: MEC Co., Ltd.
    Inventors: Yoshihiro Sakamoto, Toshio Tanimura