Abstract: A novel reticulated array comprises islands of ceramic (e.g. BST 20) which are fabricated from novel materials using unique methods of patterning. Trenches (22) are formed in the ceramic substrate from the front side and filled with a filler material (e.g. parylene 24). An elevation layer (e.g. polyimide 26) is deposited above the filler material, and a front side optical coating (e.g. transparent metal layer 34, transparent organic layer 36 and conductive metallic layer 38 ) is elevated above the substrate between the ceramic islands. The elevation layer provides added protection to the optical coating during filler material removal. The substrate is thinned from the back side down through a portion of the trench filler material. Novel fabrication methods also provide for the convenient electrical and mechanical bonding of each of the massive number of ceramic islands to a signal processor substrate (e.g. Si 62) containing a massive array of sensing circuits.

Abstract: A method for manufacturing a curved surface multi-layer wiring board having the through-holes and high accurate inner patters with a high reliability. A curved surface multi-layer wiring board is manufactured by processes for forming the inner pattern on the copper clad substrates, and for perforating the holes to the substrates and prepregs, and for laying-up these substrates and prepregs, then for pressing these substrates and prepregs in the formation mould. Then the outer pattern are formed by the laser exposure process after the through holes are connected between the layers. A method is also provided for repeating the laying-up processes in order to obtain a curved surface multi-layer wiring board of which is a three dimensional curved surface.

Abstract: The present invention provides a method of ablative photodecomposition and forming metal pattern which attains high resolution, is convenient, and employs non-halogenated solvents. The present invention is directed to a process for forming a metal pattern, preferably circuitization on an organic substrate, preferably on a circuit board or component thereof, which comprises coating the substrate with an ablatively-removable coating comprising a polymer resin preferably an acrylate polymer resin and preferably an ultraviolet absorber. A pattern is formed in the polymer coating corresponding to the desired metal pattern by irradiating at least a portion of the polymer coating with a sufficient amount of ultraviolet radiation to thereby ablatively remove the irradiated portion of the polymer coating. Next the patterned substrate is coated with a conductive metal paste to define the metal pattern, and the conductive metal paste is cured.

Abstract: An area array interconnect device (such as of the TAB type) has a plurality of input/output (I/O) leads for connection to an electronic device such as an IC. The interconnect device also has arrays of lead lines in areas remote from the I/O leads, e.g., central or internal areas, which are connected by vias to ground and/or power pads on corresponding areas of the electronic device.

Abstract: A method for manufacturing a curved surface multi-layer wiring board having highly accurate inner patterns with high reliability. A curved surface multi-layer wiring board is manufactured by providing and pressing a prepreg to form a curved surface, and by plating a copper film on the curved surface. Outer patterns are formed on the copper film. The outer patterns may be formed by a laser exposure process after through-holes are connected between the layers. A method is also provided for repeating the process to obtain a curved surface multi-layer wiring board which has a three dimensional curved surface.

Abstract: The present invention provides a copper-clad laminate characterized in that an electrolytic copper foil on the glossy surface side of which a copper electrodeposit is formed, is bonded at its glossy surface side to one side or each of both sides of a substrate, which has a fine-pitch wiring (circuit) pattern and exhibits a high etching factor. The present invention further provides a copper-clad laminate which can be suitably employed in the production of such a printed wiring board.

Abstract: The invention concerns a method of forming various kinds of SOI structures and semiconductor memory devices using the forming technique. It is useful, for example, in SRAM or EEPROM devices. In EEPROM, it relates, in particular, to a method of manufacturing a non-volatile memory device in which a control gate electrode layer is laminated by way of an insulator film on a floating gate electrode layer. It includes a method of manufacturing a structure via the steps of forming an etching stopping layer on the surface of a silicon substrate, forming an epitaxially grown silicon layer on said etching stopping layer, bonding said silicon substrate formed with said silicon layer with another substrate as the insulator substrate, grinding said silicon substrate from the rear face and etching it until said etching stopping layer is exposed and removing said etching stopper layer, with or without polishing the other surface of said silicon substrate.

Abstract: In a metal-clad laminate the requirements concerning the mechanical strength are functionally separated from the circuit connection requirement, so as to be able to bring the circuit connection, particularly for signals, "closer" to the electrotechnical characteristics of the chips. For this purpose and without taking account of the mechanical strength of the substrate, the layout miniaturization is optimized. In place of a circuit board (MCM), a laminate which can be built up to a circuit board is produced. The inventive laminate comprises an extremely thin foil with a plurality of extremely small holes simultaneously etched in an etching process. The hole diameter can be reduced by almost an order of magnitude (up to 20 .mu.m), which permits a sub-100 .mu.m technology. Such a laminate is not used as a mechanical support and is only provided for signal guidance. The effect of the miniaturization can be seen in the diameter for the plated-through holes.

Abstract: A method of making circuit boards is disclosed that is suitable for use in a high-volume automated processing plant. The method can be used to produce either single-sided or double-sided circuit boards with access windows allowing electrical access and connection between traces from both sides. In the process, access holes are punched in a coverfilm. A copper sheet having a tin plating on one side is laminated to the coverfilm, with the tin side facing the coverfilm. A pattern representing a circuit is screened on the resulting laminate with a UV-curable resist, developed in a UV dryer, and then the unprotected copper is etched away. The remaining tin is then removed with solder stripping agent, and the resulting circuit is protected with a coverfilm. The process can be applied to large rolls of materials in an automated process, with large numbers of circuits applied to the laminated board. The circuits can then be punched out of the web with a hydraulic press in large numbers.

Abstract: A pyroelectric infrared detector includes a substrate having a recess. A pyroelectric portion substantially aligns with the recess. A resin film is located between the substrate and the pyroelectric portion. The recess faces the resin film. First and second electrodes are connected to first and second surfaces of the pyroelectric portion respectively. The pyroelectric portion may include a pyroelectric film of Pb.sub.x La.sub.y Ti.sub.z Zr.sub.w O.sub.3 where atomic fractions "w", "x", "y", and "z" satisfy one of following conditions a), b), and c):a) 0.7.ltoreq.x.ltoreq.1, x+y=1, 0.925.ltoreq.z.ltoreq.1, w=0b) x=1, y=0, 0.45.ltoreq.z<1, z+w=1c) 0.75.ltoreq.x<1, x+y=1, 0.5.ltoreq.z<1, z+w=1.