Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
  • Publication number: 20020125207
    Abstract: A plasma processing method for etching a sample includes generating a plasma in a treatment chamber having a stage on which the sample is placed, wherein the plasma is generated by use of electromagnetic waves, applying an rf bias to the stage with a frequency which enables reduction of ions having an intermediate energy, and on-off modulating the rf bias so that reaction products are deposited on the sample during the off period of the rf bias.
    Type: Application
    Filed: May 1, 2002
    Publication date: September 12, 2002
    Inventors: Tetsuo Ono, Tatsumi Mizutani, Ryouji Hamasaki, Tokuo Kure, Takafumi Tokunaga, Masayuki Kojima
  • Publication number: 20020125208
    Abstract: A micro-electro-mechanical structure including a semiconductor layer mounted to an annular support structure via an isolation layer wherein the semiconductor layer is micromachined to form a suspended body having a plurality of suspension projections extending from the body to the rim and groups of integral projections extending toward but spaced from the rim between said suspension projections. Each projection in said groups has a base attached to the body and a tip proximate the rim. The structure includes a plurality of inward projections extending from and supported on the rim and toward the body. Each such projection has a base attached to the rim and a tip proximate the body; wherein the grouped projections and the inward projections are arranged in an interdigitated fashion to define a plurality of proximate projection pairs independent of the suspension elements such that a primary capacitive gap is defined between the projections of each projection pair.
    Type: Application
    Filed: May 9, 2002
    Publication date: September 12, 2002
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: John Carl Christenson, Steven Edward Staller, John Emmett Freeman, Troy Allan Chase, Robert Lawrence Healton, David Boyd Rich
  • Patent number: 6447688
    Abstract: Disclosed is a novel method for fabricating a stencil mask comprising the formation of an absorber pattern, including an alignment key or target, on the topside of an SOI wafer having a transparent buried insulating layer. The formation of the absorber pattern is followed by the formation of an alignment window from the backside of the SOI wafer using the insulating layer as a lens. The alignment window allows the alignment between the absorber pattern and the frame pattern to be verified, using light passing through the window lens and illuminating the alignment key, before initiating the frame etch, thereby improving the quality and/or throughput of the stencil mask manufacturing process.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: September 10, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Cheol Kyun Kim
  • Publication number: 20020117467
    Abstract: To provide a ring crystalline body, which is a ring crystalline body with a small diameter and formed with a thin line and capable of providing electric conduction along the ring, and to provide a production method of the ring crystalline body. A droplet is stuck to a surface of a substrate and then the droplet is evaporated to a discontinuous underlayer ring having an ultrafine three-dimensional structure on the substrate surface. After that, when a transition metal dichalcogenide, a transition metal trichalcogenide, or a low-dimensional conductor as raw material gas is evaporated, a ring crystalline body comprising the raw material is grown along the underlayer ring.
    Type: Application
    Filed: August 24, 2001
    Publication date: August 29, 2002
    Inventors: Satoshi Tanda, Kazuaki Sajiki, Taku Tsuneta, Yoshitoshi Okajima, Kazuhiko Yamaya
  • Publication number: 20020119176
    Abstract: An implantable biocompatible microchip drug delivery substrate is coated with a thin film of ultra-nanocrystalline diamond; assuring that the device is biocompatible and impermeably sealed, to prevent the substrate from being dissolved by the living tissue and to protect the drugs from premature release or undesired reaction with the body fluids. The coating is selectively patterned by doping to create electrically conductive areas that can be used as an electrically activated release mechanism for drug delivery. The conformal ultra-nanocrystalline diamond coating uniformly covers the device, providing relief from sharp edges and producing a strong, uniformly thick impermeable coating around sharp edges and on high aspect-ratio parts. The ultra-nanocrystalline diamond coating provides a conformal coating on the biocompatible device, which is of approximately uniform thickness around sharp corners and on high aspect-ratio parts.
    Type: Application
    Filed: October 26, 2001
    Publication date: August 29, 2002
    Inventors: Robert J. Greenberg, Brian V. Mech
  • Publication number: 20020119079
    Abstract: Chemical microreators for chemical systhesis and their methods of manufacture are known, but have disadvantages such as extremely high manufacturing costs or poor flexibility for adaptation to various cases of application. These disadvantages are avoided by means of the microreators and manufacturing methods according to the invention. The microreators are characterized in that the reactors contain fluid ducts in at least one plane as well as feed and return lines for fluids, wherein the fluid ducts are defined by side walls of metal opposing each other and further side walls of metal or plastic extending between said side walls, and in which the planes are connected together and/or with a closure segment closing open fluid ducts by means of appropriate solder or adhesive layers. The manufacturing method is characterized by process sequences in which the individual reactor planes produced by means of electrolytic methods, are connected together by soldering or gluing.
    Type: Application
    Filed: April 22, 2002
    Publication date: August 29, 2002
    Inventors: Norbert Breuer, Heinrich Meyer
  • Patent number: 6440766
    Abstract: A method of fabricating MicroElectroMechanical systems. The method includes: providing a substrate in which electrical interconnections and a sacrificial layer have been formed, forming a release mask including germanium, etching exposed sacrificial material, and removing the release mask. The performance of MicroElectroMechanical devices is improved by 1) integrating electronics on the same substrate as the mechanical elements, 2) increasing the proximity of electronics and mechanical elements, 3) increasing the undercut of a release etch to reduce or eliminate etch holes or to allow circuit elements to be undercut, 4) increasing the yield and reliability of the MEMS release processes. In addition to released mechanical structures, the invention also provides a means for forming circuits such as a bandgap reference as a released MEMS element.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: August 27, 2002
    Assignee: Analog Devices IMI, Inc.
    Inventor: William A. Clark
  • Publication number: 20020113034
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: August 22, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Publication number: 20020113035
    Abstract: A photosensitive material film is formed by applying, on an etch target film deposited on a semiconductor substrate, a photosensitive material containing a hardly alkaline-soluble base polymer including a polymer in which a principal chain has cycloolefin and a saturated or non-saturated polycyclic alkyl group is bonded to the principal chain, and an acid generator including an onium salt compound. The photosensitive material film is irradiated with ArF excimer laser through a photomask so as to form a hole-patterned photosensitive material film. A hole pattern is formed in said etch target film by subjecting the etch target film to plasma etching using plasma at a plasma density of 1×1010/cm3 or more with the hole-patterned photosensitive material film used as an etching mask.
    Type: Application
    Filed: December 11, 2001
    Publication date: August 22, 2002
    Inventors: Koji Shimomura, Akiko Katsuyama
  • Patent number: 6436613
    Abstract: A hybrid optoelectronic device and method of producing the hybrid device in which the hybrid device includes a substrate with an input region configured to accept input light, a sol-gel glass multimode interference region coupled to and contiguous with the input region and configured to accept and replicate the input light as multiple self-images, and a sol-gel glass output region contiguous with the multimode region and configured to accept and to output the multiple self-images. Alternatively, the hybrid optoelectronic device includes a substrate with a photoelectronic device, a surface resonator including a light-emitting part of the photelectronic device and configured to resonate light from the photoelectronic device to produce a laser light, and a grating outcoupler contiguous with the surface resonator and configured to diffract the laser light outward from the grating outcoupler and to electrically vary an index of refraction of the outcoupler and change a direction of the diffracted laser light.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: August 20, 2002
    Assignee: The Arizona Board of Regents
    Inventors: Mahmoud Fallahi, Amir Fardad
  • Publication number: 20020108926
    Abstract: The present invention is related to a method for producing micromachined devices for use in Microelectromechanical Systems (MEMS), comprising the steps of providing a crystalline wafer, and processing from said wafer at least one micromachined device comprising at least one elongated opening and/or cavity, having a longitudinal axis, so that said longitudinal axis is at an angle to a direction which lies along the intersection of the front plane of the wafer and a cleavage plane, said cleavage plane being defined as a plane along which cleavage of the wafer is most likely to occur.
    Type: Application
    Filed: October 9, 2001
    Publication date: August 15, 2002
    Inventors: Ann Witvrouw, Atze de Vries, Piet De Moor, Luc Haspeslagh, Brigitte Parmentier, Agnes Verbist, Constantine Anagnostopoulos
  • Publication number: 20020109114
    Abstract: Valve structures formed in elastomer material are electrostatically actuated by applying voltage to a flexible, electrically conductive wire pattern. An actuation force generated between the patterned wire structure and an electrode result in closure of a flow channel formed in elastomer material underlying the wire. In one embodiment of a valve structure in accordance with the present invention, the wire structure is patterned by lithography and etching of a copper/polyimide laminate, with an underlying gold plate positioned on the opposite side of the flow channel serving as an electrode. In an alternative embodiment, a first wire structure is patterned by physically cutting out a first pattern of strips from an Aluminum/Mylar laminate sheet. A second patterned wire structure serving as the electrode is formed by the same method, and positioned on the opposite side of a control channel.
    Type: Application
    Filed: October 23, 2001
    Publication date: August 15, 2002
    Applicant: California Institute of Technology
    Inventors: B. Scott Driggs, Markus M. Enzelberger, Stephen R. Quake
  • Patent number: 6432720
    Abstract: An analytical or preparatory system comprised as a base unit, an adapter, and a substrate. The adapter is attached to an attachment region on the base unit, and containing flow biasing connectors for delivering energy to selected regions of the substrate. The substrate is attached to an attachment region on the adapter. The adapter permits the base unit to be interfaced with a wide variety of different substrates to perform chemical and biological analytical analyses and preparatory procedures.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: August 13, 2002
    Assignee: Caliper Technologies Corp.
    Inventor: Calvin Y. H. Chow
  • Patent number: 6432695
    Abstract: The invention describes a thermal cycler which permits simultaneous treatment of multiple individual samples in independent thermal protocols, so as to implement large numbers of DNA experiments simultaneously in a short time. The chamber is thermally isolated from its surroundings, heat flow in and out of the unit being limited to one or two specific heat transfer areas. All heating elements are located within these transfer areas and at least one temperature sensor per heating element is positioned close by. Fluid bearing channels that facilitate sending fluid into, and removing fluid from, the chamber are provided. The chambers may be manufactured as integrated arrays to form units in which each cycler chamber has independent temperature and fluid flow control. Two embodiments of the invention are described together with a process for manufacturing them.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: August 13, 2002
    Assignee: Institute of Microelectronics
    Inventors: Quanbo Zou, Uppili Sridhar, Yu Chen, Tit Meng Lim, Emmanuel Selvanayagam Zachariah, Tie Yan
  • Publication number: 20020104825
    Abstract: To remove nanotopography (unevenness of wavelength: 0.2 mm through 20 mm, wave height: 1 through several hundreds nm) which has already been produced on a surface of a semiconductor wafer which has been regarded as impossible to remove conventionally, a half value width of an etching profile of activated species gas is set to fall in a range equal to or smaller than a wavelength a of nanotopography and equal to or larger than a half thereof. Based on previously measured data of nanotopography, moving speed and locus of injected activated species gas along a surface of a semiconductor wafer are calculated and controlled.
    Type: Application
    Filed: February 5, 2002
    Publication date: August 8, 2002
    Inventors: Michihiko Yanagisawa, Tadayoshi Okuya
  • Patent number: 6428713
    Abstract: A micro-electro-mechanical structure including a semiconductor layer mounted to an annular support structure via an isolation layer wherein the semiconductor layer is micromachined to form a suspended body having a plurality of suspension projections extending from the body to the rim and groups of integral projections extending toward but spaced from the rim between said suspension projections. Each projection in said groups has a base attached to the body and a tip proximate the rim. The structure includes a plurality of inward projections extending from and supported on the rim and toward the body. Each such projection has a base attached to the rim and a tip proximate the body; wherein the grouped projections and the inward projections are arranged in an interdigitated fashion to define a plurality of proximate projection pairs independent of the suspension elements such that a primary capacitive gap is defined between the projections of each projection pair.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: August 6, 2002
    Assignee: Delphi Technologies, Inc.
    Inventors: John Carl Christenson, Steven Edward Staller, John Emmett Freeman, Troy Allan Chase, Robert Lawrence Healton, David Boyd Rich
  • Publication number: 20020101486
    Abstract: A continuous ink jet print head is formed using a combination of traditional CMOS technology to form the various controlling electrical circuits on a silicon substrate having insulating layer(s) which provide electrical connections and a MEMS technology for forming nozzle openings. A blocking structure is formed in the insulating layer(s) between a first ink channel formed in the silicon substrate and a second ink channel formed in the insulating layer(s). The blocking structure causes ink to flow around the blocking structure and thereby develop lateral flow components to the liquid entering the second channel so that, for droplets selected for printing, as the stream of droplets emanates from the bore of the nozzle, there is provided a reduced amount of heat needed for operating a heating element adjacent each nozzle opening.
    Type: Application
    Filed: December 19, 2001
    Publication date: August 1, 2002
    Inventors: Constantine N. Anagnostopoulos, John A. Lebens, Christopher N. Delametter
  • Patent number: 6426296
    Abstract: A method and apparatus for processing a wafer comprising a material selected from an electrical semiconducting material and an electrical insulating material. The wafer has opposed generally planar front and rear sides and a peripheral edge, wherein said wafer is pressed against a pad in the presence of a slurry to reduce its thickness. The thickness of the wafer is controlled by first forming a recess such as a dimple on the rear side of the wafer. A first electrical conducting strip extends from a first electrical connection means to the base surface of the recess to the second electrical connector. The first electrical conducting strip overlies the base surface of the recess. There is also a second electrical conductor with an electrical potential source between the first electrical connector and the second electrical connector to form.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: July 30, 2002
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Robert S. Okojie
  • Publication number: 20020096018
    Abstract: A surface-micromachined rotatable member formed on a substrate and a method for manufacturing thereof are disclosed. The surface-micromachined rotatable member, which can be a gear or a rotary stage, has a central hub, and an annulus connected to the central hub by an overarching bridge. The hub includes a stationary axle support attached to the substrate and surrounding an axle. The axle is retained within the axle support with an air-gap spacing therebetween of generally 0.3 &mgr;m or less. The rotatable member can be formed by alternately depositing and patterning layers of a semiconductor (e.g. polysilicon or a silicon-germanium alloy) and a sacrificial material and then removing the sacrificial material, at least in part. The present invention has applications for forming micromechanical or microelectromechanical devices requiring lower actuation forces, and providing improved reliability.
    Type: Application
    Filed: March 18, 2002
    Publication date: July 25, 2002
    Inventors: M. Steven Rodgers, Jeffry J. Sniegowski, Thomas W. Krygowski
  • Publication number: 20020092822
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: July 18, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Patent number: 6420206
    Abstract: A process for singulating MOEMS optical devices from a precursor structure, in which the precursor structure comprises device material, having movable optical structures, and handle material, through which optical ports are formed to provide for optical access to the movable optical structures. The process comprises coating a frontside and a backside of the precursor structure with protection material. The precursor structure is then attached to a substrate such as dicing tape and the precursor structure separated into individual optical devices by a process, including die sawing. Thereafter, the optical devices are removed from the tape and the protection material removed from the optical devices.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: July 16, 2002
    Assignee: Axsun Technologies, Inc.
    Inventors: Minh Van Le, Jo-Ey Wong
  • Patent number: 6419844
    Abstract: A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: July 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Andrew J. Krivy, Warren M. Farnworth, David R. Hembree, Salman Akram, James M. Wark, John O. Jacobson
  • Patent number: 6415975
    Abstract: The quality of bonding between a conductive ball and a conductive pad of a lead frame strip of an IC package are determined by etching the conductive ball from the conductive pad, and analyzing the bottom view of the conductive ball. The conductive ball is comprised of a first conductive material and a conductive pad is comprised of a second conductive material. The conductive ball is bonded to the conductive pad by formation of an intermediary material formed from the first conductive material of the conductive ball and the second conductive material of the conductive pad. The lead frame strip is immersed within an etching solution such that the intermediary material is etched between the conductive ball and the conductive pad until the conductive ball may be decoupled from the conductive pad.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: July 9, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Prakorn Vijchulata, Watana Sabyeying
  • Patent number: 6417939
    Abstract: This invention relates to a transmission-polarizing filter comprising a substrate (1) and a partially metallized grating (2) carried by this substrate (1). The grating is a holographic grating, having a profile (3) with facets (4, 5) with, alternately, positive slopes (4) and negative slopes (5), whereas one of both sets of these facets with positive or negative slopes is partially metallized. The filter is manufactured by making a holographic grating on a substrate, by metallizing the said substrate and by machining the said substrate partially according to an ionic process.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: July 9, 2002
    Assignee: Highwave Optical Technologies
    Inventor: Jean-Pierre Laude
  • Patent number: 6415653
    Abstract: A cantilever for use in a scanning probe microscope includes a lever portion having a probe portion made from a semiconductor substrate. The length and thickness directions of the lever portion are parallel to a top surface of the semiconductor substrate, and a width direction of the lever portion corresponds to a thickness direction of the semiconductor substrate. The probe portion is triangular or substantially triangular pyramid shaped having three faces, two of which are made of crystal and a remaining one of which is formed by an artificial process.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: July 9, 2002
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Katsuhiro Matsuyama
  • Publication number: 20020084242
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: July 4, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Publication number: 20020079287
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: June 27, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Publication number: 20020081866
    Abstract: The present invention relates to a micro electro mechanical system (MEMS); and, more particularly, to a micro pump used in micro fluid transportation and control and a method for fabricating the same. The micro pump according to the present invention comprises: trenches formed in a silicon substrate in order to form a pumping region including a main pumping region and an auxiliary pumping region; channels formed on both sides of the pumping region; a flow prevention region having backward-flow preventing layers to resist a fluid flow; inlet/outlet regions formed at each of the channels which are disposed on both ends of the pumping region; an outer layer covering the trenches of the silicon substrate and opening portions of the inlet/outlet regions; and a thermal conducting layer formed on the outer layer and over the main pumping region so that a pressure of the fluid in the main pumping region is increased by the thermal conducting layer.
    Type: Application
    Filed: April 12, 2001
    Publication date: June 27, 2002
    Inventors: Chang-Auck Choi, Won-Ick Jang, Chi-Hoon Jun, Yun-Tae Kim
  • Publication number: 20020074307
    Abstract: In order to manufacture an integrated optical circuit, a first mask is formed on a first region of a substrate and defines the shape of at least one optical device (such as a waveguide). A second mask is formed on a second region of the substrate and corresponds to an optical structure (such as a periodic array structure or photonic crystal) to be formed in a second region of the substrate distinct from the first region. The first mask and the second mask are each made of a material which substantially resists a predetermined etching gas. The second mask may formed, patterned, and etched without adversely affecting the characteristics of the first mask.
    Type: Application
    Filed: December 5, 2000
    Publication date: June 20, 2002
    Inventors: Jean-Charles J.C. Cotteverte, Fernando Dias-Costa, Christophe F.P. Renvaze, Dusan Nedeljkovic
  • Publication number: 20020074308
    Abstract: A method of manufacturing a planar or integrated optical circuit in which a core layer (20) is formed on a substrate (10) and patterned to define optical features (such as waveguides) using a mask having a first portion (30) defining the desired core patterns (20a) and a second portion (35) corresponding to one or more alignment marks (20b). After etching the core layer, only the first portion (30) of the mask is removed, the second portion (35) of the mask being left to provide alignment marks (20b) which are highly visible through the subsequently-deposited overclad layer (40). The alignment marks (20b) are very accurately positioned with respect to the core patterns (20a), thus enabling further optical devices to be overlaid on the existing structure with accurate alignment to the underlying core patterns. The mask material (35) left on the alignment marks (20b) may be partially oxidized before the overclad is deposited.
    Type: Application
    Filed: December 13, 2000
    Publication date: June 20, 2002
    Inventor: Alain M.J. Beguin
  • Patent number: 6406637
    Abstract: A thin film made of an amorphous material having a supercooled liquid phase region is formed on a substrate. Then, the thin film is processed by wet-etching, etc. to form a thin film-processed body having, for example, a one side-fixed beam like shape. Subsequently, the thin film-processed body is heated to a temperature within the supercooled liquid phase region and held at the temperature for 0.5-5 minutes. Thereafter, the thin film-processed body is cooled down to room temperature. Then, at least a part of the substrate is removed by wet-etching, etc. to form a thin film-planar structure composed of the thin film-processed body having the one side-fixed beam like shape.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: June 18, 2002
    Assignee: Tokyo Institute of Technology
    Inventors: Akira Shimokohbe, Seiichi Hata
  • Patent number: 6406638
    Abstract: A method of forming a needle includes the step of anisotropically etching a channel into the back side of a semiconductor substrate. The front side of the semiconductor substrate is then isotropically etched to form a vertical axial surface surrounding the channel. The resultant needle has an elongated body formed of a semiconductor material. The elongated body includes an axial surface positioned between a first end and a second end. The axial surface defines a channel between the first end and the second end. In one embodiment, the first end has a sloping tip with a single circumferential termination point.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: June 18, 2002
    Assignee: The Regents of the University of California
    Inventors: Boris Stoeber, Dorian Liepmann
  • Patent number: 6406636
    Abstract: Wafer-to-wafer bonding using, e.g., solder metal bonding, glass bonding or polymer (adhesive) bonding is improved by profiling one or both of the wafer surfaces being bonded to define microstructures therein. Profiling means providing other than the conventional planar bonding surface to define cavities therein. The bonding material fills the cavities in the microstructures. For instance, a system of ridges and trenches (e.g. in cross-section vertical, slanted, key-holed shaped, or diamond-shaped) are microstructures that increase the surface area of the wafers to which the bonding material can adhere. Use of the key-hole shaped or diamond-shaped profile having a negative slope at the trench interior substantially increases the bonding force.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: June 18, 2002
    Assignee: MegaSense, Inc.
    Inventor: Vladimir I. Vaganov
  • Publication number: 20020070195
    Abstract: A sensor for measuring a physical amount such as an amount of air includes a membrane structure composed of metal stripes sandwiched between first and second insulating layers. A metal layer made of platinum or the like is formed on the first insulating layer and then heat-treated to improve its properties. Then, the metal layer is etched into a form of the metal stripes. The second insulating layer made of a material such as silicon dioxide is formed on the etched metal stripes. Since the metal layer is heat-treated before it is etched into the form of metal stripes, the metal stripes are not deformed by the heat-treatment. The second insulating layer can be formed on the metal stripes without generating cracks in the second insulating layer.
    Type: Application
    Filed: November 26, 2001
    Publication date: June 13, 2002
    Inventors: Hiroyuki Wado, Makiko Sugiura, Toshimasa Yamamoto, Yukihiro Takeuchi, Yasushi Kohno
  • Publication number: 20020070194
    Abstract: Ruthenium, osmium and their oxides can be etched simply and rapidly by supplying an atomic oxygen-donating gas, typically ozone, to the aforementioned metals and their oxides through catalysis between the metals and their reactors and application of the catalysis not only to the etching but also to chamber cleaning ensures stable operation of reactors and production of high quality devices.
    Type: Application
    Filed: October 23, 2001
    Publication date: June 13, 2002
    Inventors: Miwako Nakahara, Toshiyuki Arai, Shigeru Ohno, Takashi Yunogami, Sukeyoshi Tsunekawa, Kazuto Watanabe
  • Patent number: 6402969
    Abstract: A surface-micromachined rotatable member formed on a substrate and a method for manufacturing thereof are disclosed. The surface-micromachined rotatable member, which can be a gear or a rotary stage, has a central hub, and an annulus connected to the central hub by an overarching bridge. The hub includes a stationary axle support attached to the substrate and surrounding an axle. The axle is retained within the axle support with an air-gap spacing therebetween of generally 0.3 &mgr;m or less. The rotatable member can be formed by alternately depositing and patterning layers of a semiconductor (e.g. polysilicon or a silicon-germanium alloy) and a sacrificial material and then removing the sacrificial material, at least in part. The present invention has applications for forming micromechanical or microelectromechanical devices requiring lower actuation forces, and providing improved reliability.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: June 11, 2002
    Assignee: Sandia Corporation
    Inventors: M. Steven Rodgers, Jeffry J. Sniegowski
  • Patent number: 6402968
    Abstract: A high sensitivity, Z-axis capacitive microaccelerometer having stiff sense/feedback electrodes and a method of its manufacture are provided. The microaccelerometer is manufactured out of a single silicon wafer and has a silicon-wafer-thick proofmass, small and controllable damping, large capacitance variation and can be operated in a force-rebalanced control loop. The multiple stiffened electrodes have embedded therein damping holes to facilitate both force-rebalanced operation of the device and controlling of the damping factor. Using the whole silicon wafer to form the thick large proofmass and using the thin sacrificial layer to form a narrow uniform capacitor air gap over a large area provide large capacitance sensitivity. The structure of the microaccelerometer is symmetric and thus results in low cross-axis sensitivity. In one embodiment, because of its all-silicon structure, the accelerometer exhibits very low temperature sensitivity and good long term stability.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: June 11, 2002
    Inventors: Navid Yazdi, Khalil Najafi
  • Publication number: 20020068021
    Abstract: In the case of a method for producing a fluid device with a fluid structure having an active height, a basic wafer is provided, which comprises a supporting substrate, an insulating layer on the supporting substrate and a patterned layer on the supporting substrate, the thickness of the patterned layer determining the active height of the fluid structure. Following this, the fluid structure is produced in the patterned layer of the basic wafer, said fluid structure extending through the semiconductor layer. A transparent wafer is then applied so that the fluid structure is covered. Subsequently, the supporting substrate and the insulating layer are removed from the back so that the fluid structure is exposed at a second surface of the patterned layer. Finally, a second transparent wafer is attached to the exposed second surface of the semiconductor layer so that the fluid structure is covered. The essential parameter of the fluid device, viz.
    Type: Application
    Filed: June 4, 2001
    Publication date: June 6, 2002
    Inventors: Cord F. Staehler, Tilo Strobelt, Johannes Frech, Peter Nommensen, Martin Mueller
  • Patent number: 6399410
    Abstract: A method for anodizing silicon substrate includes forming an n-type silicon embedded layer (21) made of n-type silicon on a predetermined area of a first surface of the p-type single crystal silicon substrate (2). N-type silicon layers (4, 6) are formed on the upper surface of the p-type single crystal silicon substrate (2) and on the n-type silicon embedded layer (21). Silicon diffusion layers (5, 7) containing high-concentration p-type impurities are formed on predetermined areas of the n-type silicon layers (4, 6) to contact the n-type silicon embedded layer (21). An electrode layer (13) is formed on the lower surface of the p-type silicon substrate (2). The anode of a DC power source (15) is connected to the electrode layer (13), and the cathode is connected to a counter electrode (23), which is opposed to the p-type silicon substrate (2).
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: June 4, 2002
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Hitoshi Iwata, Makoto Murate
  • Patent number: 6399406
    Abstract: Communication signal mixing and filtering systems and methods utilizing an encapsulated micro electro-mechanical system (MEMS) device. Furthermore, disclosed is a method of fabricating a simple, unitarily constructed micro electromechanical system (MEMS) device which combines the steps of signal mixing and filtering, and which is smaller, less expensive and more reliable in construction and operation than existing devices currently employed in the technology.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Christopher Jhanes, Leathen Shi, James L. Speidell, James F. Ziegler
  • Patent number: 6399405
    Abstract: A process for constructing a monolithic spectrophotometer from a monolithic substrate, which includes the steps of etching a grating for dispersing input optical waves in the monolithic substrate, etching a suspended bridge positioned over an undercut cavity in the monolithic substrate, forming photodiode array on the suspended bridge to receive dispersed optical waves from the grating, orienting the suspended bridge to receive dispersed optical waves from the grating, locking the suspended bridge in a oriented position with an anchor, and photolithographically defining signal processing circuitry on the monolithic substrate.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: June 4, 2002
    Assignee: Xerox Corporation
    Inventors: Jingkuang Chen, Joel A. Kubby
  • Patent number: 6399025
    Abstract: An analytical or preparatory system comprised as a base unit, an adapter, and a substrate. The adapter is attached to an attachment region on the base unit, and the substrate is attached to an attachment region on the adapter. The adapter permits the base unit to be interfaced with a wide variety of different substrates to perform chemical and biological analytical analyses and preparatory procedures. An interface array is disposed upon the adapter. The interface array contains electrical pins, electrical contacts or electrical contact pads that directly engage fluid containing reservoirs disposed on a microfluidic device and which are coupled to a power supply.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: June 4, 2002
    Assignee: Caliper Technologies Corp.
    Inventor: Calvin Y. H. Chow
  • Publication number: 20020063106
    Abstract: Methods for etching or removing oxide scale from a substrate by applying a composition containing a polymer and an effective amount of hydrofluoric acid and maintaining the composition on the substrate until the substrate is etched or the oxide scale is removed.
    Type: Application
    Filed: December 30, 1998
    Publication date: May 30, 2002
    Inventors: MATTHEW H. LULY, RAJIV R. SINGH, CHARLES L. REDMON, JEFFREY W. MCKOWN, ROBERT PRATT
  • Publication number: 20020063107
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: May 30, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Patent number: 6393685
    Abstract: A wafer level interconnecting mechanism for assembling and packaging multiple MEMS devices (modules), using microfabricated, interlocking, mechanical joints to interconnect different modules and to create miniature devices. Various devices can be fabricated using these joints, including fiber-optic switches, xyz translational stages, push-n-lock locking mechanisms, slide-n-lock locking mechanisms, t-locking joints, fluidic interconnects, on/off valves, optical fiber couplers with xy adjustments, specimen holders, and membrane stops.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: May 28, 2002
    Assignee: The Regents of the University of California
    Inventor: Scott D. Collins
  • Patent number: 6395347
    Abstract: A method for preparing a sample for observation, by the steps of: contacting a first predetermined area of the sample surface with an organic compound vapor while irradiating the first predetermined area with an ion beam to decompose the organic compound into a layer having a mask function, the layer covering the first predetermined area; and contacting a second predetermined area of the sample surface with an etching gas while irradiating the second predetermined area with an ion beam in order to remove material from the sample surface at the second predetermined area, wherein the second predetermined area includes at least part of the first predetermined area and the layer covering the first predetermined area prevents removal of material from the sample surface in the first predetermined area.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: May 28, 2002
    Assignee: Seiko Instruments Inc.
    Inventors: Tatsuya Adachi, Takashi Kaito, Yoshihiro Koyama, Kouji Iwasaki
  • Patent number: 6392792
    Abstract: Techniques for fabricating a well-controlled, quantized-level, engineered surface that serves as substrates for EUV reflection multilayer overcomes problems associated with the fabrication of reflective EUV diffraction elements. The technique when employed to fabricate an EUV diffraction element that includes the steps of: (a) forming an etch stack comprising alternating layers of first and second materials on a substrate surface where the two material can provide relative etch selectivity; (b) creating a relief profile in the etch stack wherein the relief profile has a defined contour; and (c) depositing a multilayer reflection film over the relief profile wherein the film has an outer contour that substantially matches that of the relief profile. For a typical EUV multilayer, if the features on the substrate are larger than 50 nm, the multilayer will be conformal to the substrate. Thus, the phase imparted to the reflected wavefront will closely match that geometrically set by the surface height profile.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: May 21, 2002
    Assignee: The Regents of the University of California
    Inventor: Patrick P. Naulleau
  • Patent number: 6387778
    Abstract: Utilizing reactive ion etching (RIE) lag, tethers are fabricated that reliably hold devices in place during processing and storage, yet are easily broken to remove the parts from the wafer as desired, without requiring excessive force that could damage the devices. The tethers are fabricated by slightly narrowing the periphery etch feature at several places. By adjusting the ratio of the main periphery width to the necked width at the tethers, the final thickness of the tether can be controlled to a small fraction of the wafer thickness, so that tethers defined by readily achievable feature sizes will reliably hold the parts in place until removal is desired. Since the tethers are now only a fraction of the wafer thickness, they will reliably break to release the part at a force level that will not damage the part.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: May 14, 2002
    Assignee: Seagate Technology LLC
    Inventors: Wayne A. Bonin, Zine-Eddine Boutaghou, Roger L. Hipwell, Jr., Barry D. Wissman, Lee Walter, Barbara J. Ihlow-Mahrer
  • Patent number: 6387290
    Abstract: A microfilter utilizing the principles of tangential flow to prevent clogging, and sloped channel sides to overcome surface tension effects is provided which has feed inlet and exit connected by a feed flow channel; a barrier channel parallel to the feed flow channel, and a filtrate collection channel parallel to the barrier channel so that liquid can flow from the feed flow channel through the barrier channel which is too small to accommodate the particles, into the filtrate collection channel, and from then through a filtrate flow channel to a filtrate exit. Several picoliters of cell-free plasma are recovered from one drop of blood for analysis.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: May 14, 2002
    Assignee: University of Washington
    Inventors: James P. Brody, Thor D. Osborn
  • Publication number: 20020046985
    Abstract: A microelectromechanical (MEMS) apparatus has a base and a flap with a portion coupled to the base may be fabricated by an inventive process. The process generally involves etching one or more trenches in a backside of a base, e.g., by anisotropic etch. The trench may be etched such that an orientation of a sidewall is defined by a crystal orientation of the base material. A layer of insulating material is formed on one or more sidewalls of one or more of the trenches. A conductive layer is formed on the layer of insulating material on one or more sidewalls of one or more of the trenches. The conductive layer may completely fill up the trench between the insulating materials on the sidewalls to provide the isolated electrode. Base material is removed from a portion of the base bordered by the one or more trenches to form a cavity in the base. The trench etch may stop on an etch-stop layer so that the cavity does not form all the way through the base.
    Type: Application
    Filed: April 13, 2001
    Publication date: April 25, 2002
    Inventors: Michael J. Daneman, Chuang-Chia Lin, Boris Kobrin