Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
  • Patent number: 6555480
    Abstract: A method of manufacturing a fluidic channel through a substrate includes etching an exposed section on a first surface of the substrate, and coating the etched section of the substrate. The etching and the coating are alternatingly repeated until the fluidic channel is formed.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: April 29, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Donald J Milligan, Tim R Koch, Martha A Truninger, Diane W Lai, Timothy R Emery, J. Daniel Smith
  • Publication number: 20030075522
    Abstract: The present invention concerns a procedure for the production of a plasma that is at least co-produced in the vacuum chamber (1a) of a vacuum recipient (1) of a device suitable for plasma processing with at least one induction coil (2) carrying an alternating current, where the gas used to produce the plasma is fed into the vacuum chamber (1a) through at least one inlet (3) and the vacuum chamber (1a) is subject to the pumping action of at least one pump arrangement (4), and where a possibly pulsed direct current is also applied to the induction coil (2) in order to influence the plasma density.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 24, 2003
    Applicant: Unaxis Balzers Aktiengesellschaft
    Inventors: Jurgen Weichart, Dominik Wimo Amman, Siegfried Krassnitzer
  • Patent number: 6551944
    Abstract: A process including the steps of: carrying out a directional etching in a semiconductor material body to form trenches having a first width; carrying out an isotropic etching of the semiconductor material body under the trenches to form cavities having a width larger than the trenches; covering the walls of the cavities with dielectric material; depositing non-conducting material different from thermal oxide to fill the cavities at least partially, so as to form a single-crystal island separated from the rest of the semiconductor material body. The isotropic etching permits the formation of at least two adjacent cavities separated by a support region of semiconductor material, which is oxidized together with the walls of the cavities to provide a support to the island prior to filling with non-conducting material.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: April 22, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Piero Giorgio Fallica, Davide Giuseppe Patti, Cirino Rapisarda
  • Publication number: 20030073247
    Abstract: A method for monitoring dynamic particle pollution in an etching chamber is provided. The method is described as follows. A bare wafer is positioned in an etching machine. Subsequently the bare wafer is transferred to a main etching chamber. Then, the plasma power source is turned on to perform an etching process on the photoresist. After that, the number of particles fallen on the bare wafer is counted to determine the polluted situation for the etching machine.
    Type: Application
    Filed: October 30, 2001
    Publication date: April 17, 2003
    Inventors: Ming-Yu Lin, Wei Ming Chen, Yen-Chih Huang, Shih-Feng Lin
  • Publication number: 20030071009
    Abstract: Apparatuses (10, 100), and methods of using same, for the simultaneous thinning of the backside surfaces of a plurality of semiconductor wafers (W) using a non-crystallographic and uniform etching process, are described. The apparatuses (10, 100) include a fixture (12, 102) having a plurality of horizontal receptacles (14, 16, 18, 20, 104, 106, 108, 110) for receiving the semiconductor wafers (W). The loaded fixtures (12, 102) are then immersed into an etchant solution (36, 146) that is capable of isotropically removing a layer of semiconductor material from the backside surface of the semiconductor wafers (W). The etchant solution (36, 146) is preferably heated to about 40° C.-50° C. and constantly stirred with a magnetic stirring bar (48, 158). Once a sufficient period of time has elapsed, the thinned semiconductor wafers (W) are removed from the etchant solution (36, 146).
    Type: Application
    Filed: October 11, 2001
    Publication date: April 17, 2003
    Inventors: Richard Lai, Harvey N. Rogers, Yaochung Chen, Michael E. Barsky
  • Publication number: 20030071010
    Abstract: A method and composition for removing sodium-containing materials such as photoresist from microcircuit substrate material utilizes 1,2-Diaminocyclohexanetetracarboxylic Acid in an organic solvent.
    Type: Application
    Filed: September 4, 2002
    Publication date: April 17, 2003
    Inventor: George Schwartzkopf
  • Publication number: 20030071012
    Abstract: A method of manufacturing a micro-electromechanical fluid ejecting device includes the step of forming a plurality of nozzle chambers on a wafer substrate. Sacrificial layers are deposited on the wafer substrate. A plurality of fluid ejecting mechanisms is formed on the sacrificial layers to be operatively positioned with respect to the nozzle chambers. The sacrificial layers are etched to free the fluid ejecting mechanisms. The fluid ejecting mechanisms are formed so that they are capable of ejecting fluid through both of a pair of fluid ejection ports defined in a roof of each nozzle chamber on one cycle of operation of the fluid ejecting mechanism.
    Type: Application
    Filed: November 23, 2002
    Publication date: April 17, 2003
    Inventor: Kia Silverbrook
  • Publication number: 20030071011
    Abstract: The method and apparatus manufacture a liquid drop ejecting head. The method and apparatus blast particles on a substrate having on an upper layer a patterned mask layer made of an organic material and on a lower layer a driver circuit for ejecting a liquid drop to thereby perform an etching process on parts of the substrate exposed from the mask layer. The etching process is performed in an ionic atmosphere ionized with a polarity opposite to a charged polarity generated in the substrate when the substrate is subjected to etching.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 17, 2003
    Inventor: Ryoichi Yamamoto
  • Patent number: 6548263
    Abstract: The present invention describes novel methods for making a substrate for selective cell patterning, and the substrates themselves, wherein the method comprises contacting reactive hydroxyl groups on the surface of a substrate with a hydroxyl-reactive bifunctional molecule to form a monolayer, and using stencils to deposit cell repulsive or cell adhesive moieties in controlled locations on the cell culture substrate. Methods comprising selective differentiation of stem cells to create tissue specific and organ-specific cell substrates, as well as the cell substrates themselves are also provided.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: April 15, 2003
    Assignee: Cellomics, Inc.
    Inventors: Ravi Kapur, Terri Adams
  • Patent number: 6547973
    Abstract: A method for fabricating a suspended structure including a layer of membrane material over a substrate. The suspended structure overlies a cavity in the substrate. The method starts by generating a sacrificial layer comprising a first material that can withstand temperatures typically encountered in subsequent conventional semiconductor processing steps. In the preferred embodiment of the present invention, the bond between sacrificial layer and the underlying substrate must be capable of withstanding temperatures greater than the Si—Al eutectic point. A layer of membrane material is then deposited over the sacrificial layer. The membrane material comprises a second material different from the first material. An opening is introduced in the layer of membrane material thereby exposing the sacrificial layer. A first etchant is applied to the sacrificial layer through the opening until the sacrificial layer is removed leaving a portion of the cavity.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: April 15, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Leslie A. Field
  • Patent number: 6544898
    Abstract: A microelectromechanical (MEMS) device and a method of fabricating a MEMS device are provided. The method of fabricating the MEMS device includes the steps of: etching a die release trench in a primary handle layer of a wafer having the handle layer, an etch-stop layer disposed on the primary handle layer, and a device layer disposed on the etch-stop layer; patterning a release trench in the device layer that is aligned with the release trench in the primary handle layer; temporarily attaching an additional handle layer to the primary handle layer; etching the device layer to define a structure in the device layer; removing the etch-stop layer; and removing the additional handle layer to release the die.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: April 8, 2003
    Assignee: ADC Telecommunications, Inc.
    Inventors: Bruce Polson, Nan Zhang, Howard P. Wilson
  • Patent number: 6544863
    Abstract: A method for fabricating semiconductor wafers as multiple-depth structure (i.e., having portions of varying height). The method includes patterning a first substrate and bonding a second substrate to the first. This process creates a subsurface patterned layer. Portions of the second substrate may then be etched, exposing the subsurface patterned layer for selective processing. For example, the layered structure may then be repeatedly etched to produce a multiple depth structure. Or, for example, exposed portions of the first substrate may have material added to them to create multiple-depth structures. This method of fabrication provides substantial advantages over previous methods.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: April 8, 2003
    Assignee: Calient Networks, Inc.
    Inventors: John M. Chong, Paul Waldrop, Tim Davis, Scott Adams
  • Publication number: 20030062333
    Abstract: Generally, a method for pre-cleaning native oxides and other contaminants from apertures on a substrate is provided. In one embodiment, a method for pre-cleaning apertures on a substrate includes disposing the substrate on a support member in a process chamber, cooling the substrate at least to a temperature of 100 degrees Celsius, and exposing the substrate to a pre-clean process. In another embodiment, a method for pre-cleaning apertures on a substrate includes cooling the substrate at least to a temperature of 100 degrees Celsius in a first chamber, transferring the substrate to a second chamber and pre-cleaning the substrate in the second chamber while maintaining a substrate temperature of 100 degrees Celsius.
    Type: Application
    Filed: December 12, 2001
    Publication date: April 3, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Martin Kranz, Srinivas Guggilla, Suraj Rengarajan, Mei Chang, Gongda Yao, Nitin Khurana, Gilbert Hausmann
  • Publication number: 20030062332
    Abstract: A method for fabricating MEMS structures includes etching a recess in either an upper surface of a substrate that is bonded to a wafer that ultimately forms the MEMS structure, or to the lower surface of the wafer that is bonded to the substrate. Accordingly, once the etching processes of the wafer are completed, the recess facilitates the release of an internal movable structure within the fabricated MEMS structure without the use of a separate sacrificial material. Furthermore, a bridge, which is preferably insulating, is pre-etched before the wafer is attached to the substrate.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Richard D. Harris, Robert J. Kretschmann
  • Patent number: 6539798
    Abstract: An acceleration threshold sensor includes a supporting device, a seismic mass, and a connecting device with the aid of which the seismic mass is attached to the supporting device. The connecting device is provided with a predetermined breaking point interrupting the connection between the seismic mass and the supporting device when said seismic mass is subjected to an acceleration exceeding a predetermined acceleration. This sensor has a simple structural design, can be produced at a reasonable price and is always ready to carry out a measurement. Additionally, this sensor is able to store, without any auxiliary power, that it has been subjected to an acceleration exceeding a predetermined acceleration.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: April 1, 2003
    Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung e.V.
    Inventors: Wolfram Geiger, Heinz Kück, Axel Erlebach, Wolf-Joachim Fischer
  • Publication number: 20030057178
    Abstract: A method for making a substrate for a mirror used in photolithography is described. That method comprises forming a crystalline layer on a first layer, which has a low coefficient of thermal expansion. Part of the crystalline layer is then removed to form on the first layer a second layer that has a high quality surface finish.
    Type: Application
    Filed: September 26, 2001
    Publication date: March 27, 2003
    Inventor: Michael Goldstein
  • Publication number: 20030057177
    Abstract: A method of forming three-dimensional structures on a substrate by a single reactive ion each run whereby a mask is formed on said substrate before a series of iterations are carried out, each iteration including a mask etch and a substrate etch, so that successive iterations give life to reduction in the mask area and exposure of further areas of substrate.
    Type: Application
    Filed: July 7, 1998
    Publication date: March 27, 2003
    Inventors: DAVID T DUTTON, ANTHONY B DEAN
  • Publication number: 20030057179
    Abstract: An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a stop layer and a feature in the substrate to be contacted into the first etching chamber to etch the dielectric layer. The substrate is then transferred from the first etching chamber to the second etching chamber under vacuum conditions and, in the second etching chamber, is exposed to an oxygen plasma or similar environment to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the stop layer is etched through to the feature to be contacted in either the second or a third etching chamber of said multichamber substrate processing system. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps.
    Type: Application
    Filed: October 24, 2002
    Publication date: March 27, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Lee Luo, Claes H. Bjorkman, Brian Sy Yuan Shieh, Gerald Zheyao Yin
  • Publication number: 20030059984
    Abstract: A method for forming on a substrate an electronic device including an electrically conductive or semiconductive material in a plurality or regions, the operation of the device utilising current flow from a first region to a second region, the method comprising: forming a mixture by mixing the material with a liquid; forming on the substrate a confinement structure including a first zone in a first area of the substrate and a second zone in a second area of the substrate, the first zone having a greater repellence for the mixture than the second zone, and a third zone in a third area of the substrate spaced from the second area by the first area, the first zone having a greater repellence for the mixture than the third zone, and depositing the material on the substrate by applying the mixture over the substrate whereby the deposited material may be confined by the relative repellence of the first zone to spaced apart regions defining the said first and second regions of the device and being electrically separa
    Type: Application
    Filed: June 21, 2002
    Publication date: March 27, 2003
    Applicant: PLASTIC LOGIC LIMITED
    Inventors: Henning Sirringhaus, Takeo Kawase, Richard Henry Friend
  • Patent number: 6537256
    Abstract: Apparatus and methods are provided for the delivery of molecules to a site via a carrier fluid. The apparatus include microchip devices which have reservoirs containing the molecules for release. The apparatus and methods provide for active or passive controlled release of the molecules. Embodiments include systems for release of fragrance molecules and beverage additives.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: March 25, 2003
    Assignee: MicroCHIPS, Inc.
    Inventors: John T. Santini, Jr., Charles E. Hutchinson, Scott A. Uhland, Michael J. Cima, Robert S. Langer, Dennis Ausiello
  • Patent number: 6537839
    Abstract: A nitride semiconductor light emitting device having preferable light emitting characteristics even if dense threading dislocations extend through single crystal layers. The nitride semiconductor light emitting device includes an active layer obtained by depositing group-3 nitride semiconductors, and a barrier layer disposed adjacent to the active layer and having a greater bandgap than that of the active layer, the active layer having barrier portions which surround the threading dislocations and are defined by interfaces enclosing the threading dislocation and which are made of the same material as that of the barrier layer.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: March 25, 2003
    Assignee: Pioneer Corporation
    Inventors: Hiroyuki Ota, Mitsuru Nishitsuka, Hirokazu Takahashi
  • Publication number: 20030052077
    Abstract: The invention relates to a method for forming a product sensor, and a product sensor. The product sensor is formed on a substrate and provided with at least one electric circuit comprising at least one capacitor and at least one coil. At least part of the electric circuit is formed by evaporating a first metallization layer at least at the electric circuit in the product sensor.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 20, 2003
    Applicant: Rafsec Oy
    Inventor: Marko Hanhikorpi
  • Patent number: 6533951
    Abstract: A method of manufacturing a pump [10] for pumping various primary fluids. A body is formed from silicon dies [102,104]. A primary fluid channel [110] is formed in the body and a primary fluid supply [122] is coupled to the primary fluid channel [110] to supply a primary fluid to the primary fluid channel [110]. A mechanism for introducing a secondary fluid to an interface region of the primary fluid channel [110] is formed in the body. An energy delivery device is formed in the body to deliver energy to an interface between region between the primary fluid and the secondary fluid to create a thermal gradient along the fluid interface. The thermal gradient results in a surface tension gradient along the interface. The primary fluid will move to compensate for the surface tension gradient. Various semiconductor fabrication processes can be used to form the elements on the body.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: March 18, 2003
    Assignee: Eastman Kodak Company
    Inventors: Michael Debar, Constantine N. Anagnostopoulos, Gilbert A. Hawkins, Ravi Sharma
  • Patent number: 6533947
    Abstract: Method for manufacturing microelectromechanical mirror and mirror array. Control electrodes and addressing circuitry are etched from a metallic layer deposited onto a reference layer substrate. Standoff-posts are etched from a subsequently deposited polyimide layer. A freely movable plate flexibly suspended from a plurality of electrostatic actuators that are flexibly suspended from a support frame is etched from an actuation layer substrate using a high aspect ratio etch. A mirror support post and surface are etched from a mirror substrate using a high aspect ratio etch. The mirror and actuation layer substrates are fusion bonded together. The reference and actuation layer substrates are bonded together and held apart by the standoff posts. A reflective metallic layer is deposited onto the mirror surface and polished. The mirror is etched from the mirror surface to free the microelectromechanical mirror. Mirror arrays are made by performing the aforementioned steps using standard IC processing techniques.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: March 18, 2003
    Assignee: Transparent Optical, Inc.
    Inventors: Steven Nasiri, James H. Smith, David Lambe Marx, Mitchell Joseph Novack
  • Patent number: 6533949
    Abstract: A method for processing a wafer to form a plurality of hollow microneedles projecting from a substrate includes forming, by use of a dry etching process, a number of groups of recessed features, each including at least one slot deployed to form an open shape having an included area and at least one hole located within the included area. The internal surfaces of the holes and the slots are then coated with a protective layer. An anisotropic wet etching process is then performed in such a manner as to remove material from outside the included areas while leaving a projecting feature within each of the included areas. The protective layer is then removed to reveal the microneedles.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: March 18, 2003
    Assignee: Nanopass Ltd.
    Inventors: Yehoshua Yeshurun, Meir Hefetz, Meint de Boer, J. W. Berenschot, J. G. E. Gardeniers
  • Patent number: 6534247
    Abstract: An inkjet print cartridge comprising a printhead that is formed using a sequence of etch process steps is described. The first etch of the two etch step process is comprised of a wet chemical etch. A dry etch process follows. Both etch steps are consecutively initiated from the back of the wafer. The fabrication process described offers several advantages including precise dimensional control of the ink feed channel, greater packing density of ink ejectors disposed in the printhead and greater printing speed. Additionally, the time required to manufacture the printhead, in contrast to a conventional printhead, is reduced.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: March 18, 2003
    Assignee: Hewlett-Packard Company
    Inventors: Donald J. Milligan, Chien-Hua Chen
  • Publication number: 20030049569
    Abstract: Aperture members are provided wherein there is thin 1-10 micrometer thick crystaline membrane that is surrounded by a frame of a bulk type crystalline material. The aperture being an opening through the membrane in a typical shape useful for device fabrication, such as a circle or pattern. The aperture member of the invention can be fabricated out of a typical silicon crystalline wafer in a process where doping in a region serves as an etch stop.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 13, 2003
    Inventors: Steven Alan Cordes, Michael James Cordes, James Louis Speidell, Scott Mansfield
  • Publication number: 20030049879
    Abstract: A microelectromechanical systems (MEMS) element, MEMS optical switch and MEMS fabrication method are described. The MEMS element comprises a crystalline and moveable element is moveably attached to the substrate. The moveable element includes a perpendicular portion oriented substantially perpendicular to a plane of the substrate. The crystal structure of the perpendicular portion and substrate are substantially similar. The moveable element moveable is moveably attached to the substrate for motion substantially constrained to a plane oriented substantially perpendicular to a plane of the substrate. In at least one position, a part of a perpendicular portion of the moveable element projects beyond a surface of the substrate. The moveable element may be retained in place by a latch. The perpendicular portion may be formed substantially perpendicular portion to the substrate. An array of such structures can be implemented to work as an optical switch.
    Type: Application
    Filed: July 25, 2001
    Publication date: March 13, 2003
    Inventor: Chuang-Chia Lin
  • Publication number: 20030047532
    Abstract: A method of etching a ferroelectric layer comprises etching a ferroelectric layer using boron trichloride gas and at least one auxiliary gas selected from the group consisting of a carbon-containing gas and a nitrogen-containing gas. The carbon-containing gas may include CHF3 or C2H4. The nitrogen-containing gas may include N2 or NF3. The method reduces side etching of ferroelectric layers, and in particular, PZT-based ferroelectric layers and thereby improves electrical performance and reliability of devices made therefrom.
    Type: Application
    Filed: July 31, 2002
    Publication date: March 13, 2003
    Applicant: Applied Materials, Inc.
    Inventor: Hideyuki Yamauchi
  • Publication number: 20030047533
    Abstract: A method comprises depositing an organic material on a substrate; depositing additional material different from the organic material after depositing the organic material; and removing the organic material with a compressed fluid. Also disclosed is a method comprising: providing an organic layer on a substrate; after providing the organic layer, providing one or more layers of a material different than the organic material of the organic layer; removing the organic layer with a compressed fluid; and providing an anti-stiction agent with a compressed fluid to material remaining after removal of the organic layer.
    Type: Application
    Filed: June 10, 2002
    Publication date: March 13, 2003
    Applicant: REFLECTIVITY, INC., a California corporation
    Inventors: Jason S. Reid, Nungavaram S. Viswanathan
  • Patent number: 6531417
    Abstract: The present invention relates to a micro electro mechanical system (MEMS); and, more particularly, to a micro pump used in micro fluid transportation and control and a method for fabricating the same. The micro pump according to the present invention comprises: trenches formed in a silicon substrate in order to form a pumping region including a main pumping region and an auxiliary pumping region; channels formed on both sides of the pumping region; a flow prevention region having backward-flow preventing layers to resist a fluid flow; inlet/outlet regions formed at each of the channels which are disposed on both ends of the pumping region; an outer layer covering the trenches of the silicon substrate and opening portions of the inlet/outlet regions; and a thermal conducting layer formed on the outer layer and over the main pumping region so that a pressure of the fluid in the main pumping region is increased by the thermal conducting layer.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: March 11, 2003
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chang-Auck Choi, Won-Ick Jang, Chi-Hoon Jun, Yun-Tae Kim
  • Publication number: 20030042227
    Abstract: A scavenger assembly for use with a plasma etching chamber having an electrode. The scavenger assembly including an adjustable scavenger plug adapted to extend from the electrode into the plasma etching chamber. The adjustable scavenger plug provides a structure for spatially tailoring an etch profile in the plasma etch chamber. Additionally, a method is provided for etching a substrate in a plasma etching chamber. The method includes the steps of providing the substrate on a chuck assembly within the plasma etching chamber, providing an electrode within the plasma etching chamber opposite the chuck assembly, and providing an adjustable scavenger plug extending from the electrode into the plasma etching chamber. The method further includes the step of performing an etching operation on the substrate by spatially tailoring an etch profile in the plasma etch chamber using the adjustable scavenger plug.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 6, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Steven T. Fink
  • Publication number: 20030042223
    Abstract: Provided is a etch mask that prevents the separation of the etch mask which occurs in the vicinity of an end portion of a material to be etched during etching step. The etch mask is one formed on a surface of a material to be etched and comprising collected linear masks. A portion of a linear mask positioned in the vicinity of an end portion of the material to be etched becomes a wider portion as compared with the remaining portion or a zigzag portion. As required, the middle portion of the linear mask also becomes a wider portion or a zigzag portion.
    Type: Application
    Filed: January 30, 2002
    Publication date: March 6, 2003
    Inventors: Koichi Toyosaki, Nobuhiko Kurahashi, Satoshi Irino, Naoki Tsukiji
  • Patent number: 6528339
    Abstract: A method of imparting birefringence in a III-V compound semiconductor for sustaining the non linear optical process of second harmonic generation, a birefringent III-V compound semiconductor, and a product of the process are described.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: March 4, 2003
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Jonathan T. Goldstein
  • Patent number: 6527961
    Abstract: A method for the formation of a region of silicon dioxide on a substrate of monocrystalline silicon. The epitaxial growth of a silicon layer, the opening of holes in the silicon layer above the silicon dioxide region, and the removal of the silicon dioxide which constitutes the region by means of chemical attack through the holes until a silicon diaphragm, attached to the substrate along the edges and separated therefrom by a space, is produced. In order to form an absolute pressure microsensor, the space has to be sealed. To do this, the method provides for the holes to have diameters smaller than the thickness of the diaphragm and to be closed by the formation of a silicon dioxide layer by vapor-phase deposition at atmospheric pressure.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: March 4, 2003
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Benedetto Vigna, Paolo Ferrari, Pietro Montanini, Marco Ferrera
  • Patent number: 6527762
    Abstract: Microchip delivery devices are provided that control both the rate and time of release of molecules, wherein the device includes a substrate, at least one reservoir in the substrate containing the molecules, and a reservoir cap positioned on the reservoir over the molecules, wherein the molecules are released from the reservoir upon heating or cooling the device or a portion thereof sufficient to rupture the reservoir cap. In a preferred embodiment, the device includes a resistor integrated into the reservoir or mounted near the reservoir, which upon application of an electric current through the resistor, causes at least one of the contents of the reservoir to thermally expand, vaporize, phase change, or undergo a thermally driven reaction, such that the reservoir cap ruptures due to mechanical stress.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: March 4, 2003
    Assignee: MicroCHIPS, Inc.
    Inventors: John T. Santini, Jr., Michael J. Cima, Scott Albert Uhland
  • Publication number: 20030038033
    Abstract: A process for embossing high aspect ratio microstructures is provided, wherein the microstructures provide decreased surface reflection and increased transmission through an optical component. The process comprises etching columnar pits in a silicon substrate using inductively coupled plasma, followed by reactive ion etching of the columnar pits to create relatively pointed obelisks. The silicon substrate is then preferably rinsed prior to vapor depositing a conductive layer thereon. Further, a metal is electroformed over the conductive layer to form an embossing tool. The embossing tool is then used to form microstructures, for example in a polymer sheet, having aspect ratios greater than 5 to 1.
    Type: Application
    Filed: August 27, 2001
    Publication date: February 27, 2003
    Inventors: Alan B. Harker, Jeffrey F. DeNatale, Dennis Strauss
  • Publication number: 20030038107
    Abstract: An apparatus and associated method for removing deposits from a substrate. In one aspect, a system is provided which supplies etchant to an edge bead removal chamber. The apparatus includes an etchant delivery system, an etchant tank, a sensor, and a mixing tank.
    Type: Application
    Filed: October 11, 2002
    Publication date: February 27, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Radha Nayak, Yezdi Dordi, Joseph Stevens, Peter Hey
  • Publication number: 20030038105
    Abstract: A tool for embossing high aspect ratio microstructures is provided, wherein the microstructures provide decreased surface reflection and increased transmission through an optical component. The tool is fabricated by a process that comprises etching columnar pits in a silicon substrate using inductively coupled plasma, followed by reactive ion etching of the columnar pits to create relatively pointed obelisks. The silicon substrate is then preferably rinsed prior to vapor depositing a conductive layer thereon. Finally, a metal is electroformed over the conductive layer to form the embossing tool. The embossing tool is then pressed against an optical coating, for example a polymer sheet, to create microstructures having aspect ratios greater than 5 to 1.
    Type: Application
    Filed: August 27, 2001
    Publication date: February 27, 2003
    Inventors: Alan B. Harker, Jeffrey F. DeNatale, Dennis Strauss
  • Publication number: 20030038106
    Abstract: A method of etching a structure including a magnetic material, the method includes providing a structure including a magnetic material, applying a mask material to at least a portion of the structure, and reactive ion beam etching the magnetic material using an etch process including a carbon based compound, wherein the mask material forms a material which etches slower than the magnetic material. The etch process can further include argon ions. The carbon based compound can be a compound selected from the group of C2H2, CHF3, and CO2. The etch process can alternatively include argon ions, oxygen and either C2H2 or CHF3. The magnetic material can comprise a compound including a material selected from the group of Fe, Ni, and Co. The mask material can comprise a layer of Ta, W, Mo, Si, Ti or a photoresist. Magnetic heads made using the process, and disc drives including such magnetic heads are also included.
    Type: Application
    Filed: August 12, 2002
    Publication date: February 27, 2003
    Applicant: Seagate Technology LLC
    Inventors: Mark William Covington, Michael Allen Seigler, Eric Walter Singleton, Michael Kevin Minor
  • Publication number: 20030039586
    Abstract: A gas sensor includes a semiconductor substrate and a sensing membrane. The sensing membrane is located at the bottom of a recess, which is formed by etching the substrate, and includes a heater, heater extension electrodes, a gas sensitive film, and gas-sensitive-film extension electrodes. A first end of each heater extension electrode is in contact with the heater, and a second end of each heater extension electrode extends outward from the sensing membrane. A first end of each gas-sensitive-film extension electrode is in contact with the gas sensitive film, and a second end of each gas-sensitive-film extension electrode extends outward from the sensing membrane. All of the heater, the heater extension electrodes, and the gas-sensitive-film extension electrodes are made of polycrystalline silicon.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 27, 2003
    Inventors: Inao Toyoda, Yasutoshi Suzuki
  • Patent number: 6524650
    Abstract: Substrate processing apparatus and method, by which an outside air and a gas-phase backward flow are restrained from entering the inside of a reaction chamber during the inside of a reaction chamber is opened to the outside through a substrate carrying-in/carrying-out opening. This substrate processing apparatus, for example, a vertical CVD apparatus (200) has a gas supply system (240) and a bypass line (264). The gas supply system (240) supplies an inert gas to a space (3a) between an outer tube (1A) and an inner tube (2A) of a reaction furnace (211) in a boat loading term and a boat unloading term. The bypass line (264) exhausts an atmosphere from a reaction chamber (1a) by performing a slow exhaust operation in the boat loading term and the boat unloading term.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: February 25, 2003
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Takashi Shimahara, Naoto Nakamura, Ichiro Sakamoto, Kiyohiko Maeda
  • Publication number: 20030036215
    Abstract: Micromechanical devices are provided that are capable of movement due to a flexible portion. The micromechanical device can have a flexible portion formed of an oxide of preferably an element from groups 3A to 6A of the periodic table (preferably from the first two rows of these groups) and a late transition metal (preferably from groups 8B or 1B of the periodic table). The micromechanical devices can be any device, particularly MEMS sensors or actuators preferably having a flexible portion such as an accelerometer, DC relay or RF switch, optical cross connect or optical switch, or a micromirror part of an array for direct view and projection displays. The flexible portion is preferably formed by sputtering a target having a group 8B or 1B element and a selected group 3A to 6A element, namely B, Al, In, Si, Ge, Sn, or Pb. The target can have other major constituents or impurities (e.g. additional group 3A to 6A element(s)).
    Type: Application
    Filed: July 17, 2002
    Publication date: February 20, 2003
    Applicant: REFLECTIVITY, INC., a Delaware Corporation
    Inventor: Jason S. Reid
  • Patent number: 6519822
    Abstract: A method for producing an electronic component includes placing an enclosed frame on a baseplate. A chip is provided to be fitted within the frame, forming a first given space between the chip and the baseplate and forming a second given space between the chip and the frame. The first given space is enclosed in a hermetically sealed manner by pressing a film onto the chip, except on a surface of the chip facing the baseplate, such that the film surrounds the chip and at least reaches the surface of the baseplate. The second given space is filled with a casting compound. The film is then removed at surface regions of the film being free of the casting compound. Finally, a cover composed of an electrically conductive material is applied on the chip, the casting compound and the frame.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: February 18, 2003
    Assignee: EPCOS AG
    Inventors: Alois Stelzl, Hans Krüger
  • Patent number: 6521313
    Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: February 18, 2003
    Assignee: Robert Bosch GmbH
    Inventors: Hans Artmann, Thorsten Pannek
  • Patent number: 6520477
    Abstract: This invention is directed to a microelectromechanical valve having two or more diaphragms containing non-aligned holes to control the flow of fluids. Fluid flows through the holes in the first diaphragm and then must flow between the first and second diaphragm to reach the holes in the second diaphragm, whereupon the fluid is free to flow past the second diaphragm.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: February 18, 2003
    Inventor: William Trimmer
  • Publication number: 20030030023
    Abstract: Micro-valves that include a diaphragm capable of being positioned on a valve seat or removed from the valve seat. The micro-valves also include supports and a cover that restrict the motion of the diaphragm, thereby reducing the possibility of cracking. Micro-valves made by anodically bonding the diaphragm to a seat substrate and anodically bonding the cover to the diaphragm. Micro-injectors that include micro-valves. Also, methods of making the micro-valves and micro-injectors.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 13, 2003
    Inventors: Tak Kui Wang, Peisheng Sheng, Richard P. White
  • Publication number: 20030029723
    Abstract: Method and system of forming microfluidic capillaries in a variety of substrate materials. A first layer of a material such as silicon dioxide is applied to a channel etched in substrate. A second, sacrificial layer of a material such as a polymer is deposited on the first layer. A third layer which may be of the same material as the first layer is placed on the second layer. The sacrificial layer is removed to form a smooth walled capillary in the substrate.
    Type: Application
    Filed: December 6, 2000
    Publication date: February 13, 2003
    Applicant: The Regents of the University of California
    Inventor: Conrad M. Yu
  • Patent number: 6518192
    Abstract: A two-step etch method for etching a masked layer or layers that include fast and slow etching regions is described. Fast and slow etching regions may arise in a variety of devices, such as microelectrical mechanical system (“MEMS”) applications and mixed signal (i.e. analog and digital) integrated circuits, as well as other integrated circuits and devices. In one embodiment, a first etchant is used to etch through the layer in the fastest etching region, and then a second etchant is used to complete etching through the layer in the slowest etching region.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: February 11, 2003
    Assignee: Applied Materials Inc.
    Inventors: Anisul Khan, Ajay Kumar, Jeffrey D. Chinn, Dragan Podlesnik
  • Patent number: 6517735
    Abstract: A monolithic inkjet printhead formed using integrated circuit techniques is described. A silicon substrate has formed on its top surface a thin polysilicon layer in the area in which a trench is to be later formed in the substrate. The edges of the polysilicon layer align with the intended placement of ink feed holes leading into ink ejection chambers. Thin film layers, including a resistive layer, are formed on the top surface of the silicon substrate and over the polysilicon layer. An orifice layer is formed on the top surface of the thin film layers to define the nozzles and ink ejection chambers. A trench mask is formed on the bottom surface of the substrate. A trench is etched (using, for example, TMAH) through the exposed bottom surface of the substrate and to the polysilicon layer. The etching of the polysilicon layer exposes fast etch planes of the silicon. The TMAH then rapidly etches the silicon substrate along the etch planes, thus aligning the edges of the trench with the polysilicon.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: February 11, 2003
    Assignee: Hewlett-Packard Company
    Inventors: Kenneth E. Trueba, Charles C. Haluzak, David R. Thomas, Colby Van Vooren