Abstract: The invention encompasses a method of enhancing selectivity of etching silicon dioxide relative to one or more organic substances. A material comprising one or more elements selected from Group VIII of the periodic table is provided within a reaction chamber; and a substrate is provided within the reaction chamber. The substrate has both a silicon-oxide-containing composition and at least one organic substance thereover. The silicon-oxide-containing composition is plasma etched within the reaction chamber. The plasma etching of the silicon-oxide-containing composition has increased selectivity for the silicon oxide of the composition relative to the at least one organic substance than would plasma etching conducted without the material in the chamber. The invention also encompasses a plasma reaction chamber assembly. The assembly comprises at least one interior wall, and at least one liner along the at least one interior wall. The liner comprises one or more of Ru, Fe, Co, Ni, Rh, Pd, Os, W, Ir, Pt and Ti.

Abstract: A method for etching a polysilicon layer comprises the steps of providing a semiconductor wafer substrate assembly having at least first and second features therein in spaced relation to each other which define an opening therebetween. A blanket polysilicon is formed over the wafer assembly and within the opening. A patterned photoresist layer is formed over the polysilicon layer, then the polysilicon layer within the opening is etched with a first etch. Subsequent to said first etch, the polysilicon with the opening is etched with a second etch comprising a halogen-containing gas flow rate of from about 35 sccm to about 65 sccm and an oxygen-containing gas (for example HeO2) flow rate of from about 12 sccm to about 15.6 sccm.

Abstract: A method of fabricating an elastomeric structure, comprising: forming a first elastomeric layer on top of a first micromachined mold, the first micromachined mold having a first raised protrusion which forms a first recess extending along a bottom surface of the first elastomeric layer; forming a second elastomeric layer on top of a second micromachined mold, the second micromachined mold having a second raised protrusion which forms a second recess extending along a bottom surface of the second elastomeric layer; bonding the bottom surface of the second elastomeric layer onto a top surface of the first elastomeric layer such that a control channel forms in the second recess between the first and second elastomeric layers; and positioning the first elastomeric layer on top of a planar substrate such that a flow channel forms in the first recess between the first elastomeric layer and the planar substrate.

Abstract: In the method of fabricating an inductor, at least first and second conductive segments are formed in a semiconductor layer spaced apart in a first direction. A first dielectric layer is formed over a portion of the semiconductor layer along the first direction such that the first dielectric layer crosses the first and second conductive segments. A conductive core is formed on the first dielectric layer, and a second dielectric layer is formed over the semiconductor layer. First and second contact holes are formed in the second dielectric layer such that the first contact hole exposes a portion of the first conductive segment on a first side of the first dielectric layer and the second contact hole exposes a portion of the second conductive segment on a second side of the first dielectric layer.

Abstract: A staggered torsional electrostatic combdrive includes a stationary combteeth assembly and a moving combteeth assembly with a mirror and a torsional hinge. The moving combteeth assembly is positioned entirely above the stationary combteeth assembly by a predetermined vertical displacement during a combdrive resting state. A method of fabricating the staggered torsional electrostatic combdrive includes the step of deep trench etching a stationary combteeth assembly in a first wafer. A second wafer is bonded to the first wafer to form a sandwich including the first wafer, an oxide layer, and the second wafer. A moving combteeth assembly is formed in the second wafer. The moving combteeth assembly includes a mirror and a torsional hinge. The moving combteeth assembly is separated from the first wafer by the oxide layer. The oxide layer is subsequently removed to release the staggered torsional electrostatic combdrive.

Abstract: The invention encompasses a method of enhancing selectivity of etching silicon dioxide relative to one or more organic substances. A material comprising one or more elements selected from Group VIII of the periodic table is provided within a reaction chamber; and a substrate is provided within the reaction chamber. The substrate has both a silicon-oxide-containing composition and at least one organic substance thereover. The silicon-oxide-containing composition is plasma etched within the reaction chamber. The plasma etching of the silicon-oxide-containing composition has increased selectivity for the silicon oxide of the composition relative to the at least one organic substance than would plasma etching conducted without the material in the chamber. The invention also encompasses a plasma reaction chamber assembly. The assembly comprises at least one interior wall, and at least one liner along the at least one interior wall. The liner comprises one or more of Ru, Fe, Co, Ni, Rh, Pd, Os, W, Ir, Pt and Ti.

Abstract: The present invention relates to a method for manufacturing an ink jet recording head using wet etching, the method providing a high production efficiency, an ink jet recording head manufactured by this method, and an ink jet recording apparatus using this recording head. A silicon substrate, constituting a recording head, has functional elements formed thereon and including heat-generating resister elements and a drive circuit therefor, a protective layer is formed on the silicon substrate for protecting the functional elements from an etchant that is in contact with a substrate surface via an adhesive layer, and an ink supply port is formed by means of wet etching. The adhesive layer allows the protective layer to adhere well to the substrate to appropriately prevent the functional elements from being damaged by the etchant.

Abstract: A method for fabricating a membrane having a corrugated, multi-layer structure, comprising the steps of: providing a substrate having an insulator layer on the top surface of the substrate, a conductive layer on the insulator layer, a sacrificial layer on said conductive layer, and a second conductive layer; patterning a series of holes the second conductive layer to allow release etchant to have access to a second sacrificial layer; depositing the second sacrificial layer onto said second conductive layer so that the series of holes are filled with the second sacrificial layer; patterning the second sacrificial layer with a radial and/or concentric grid pattern so that a third conductive layer when deposited will form the support structure and top portion of the corrugated structure; depositing the third conductive layer so that the grid pattern is filled in and is in contact with the second conductive layer; removing the first and second sacrificial layer by immersing the device in a release etchant.

Abstract: A method for using an organic dielectric as a sacrificial layer for forming suspended or otherwise spaced structures. The use of an organic dielectric has a number of advantages, including allowing use of an organic solvent or etch to remove the sacrificial layer. Organic solvents only remove organic materials, and thus do not affect or otherwise damage non-organic layers such as metal layers. This may reduce or eliminate the need for the rinsing and drying steps often associated with the use of acidic etchants such as Hydrofluoric Acid.

Abstract: The invention relates to a method and a device for reducing the thickness of substrates (3), especially wafers, by ion etching. The method provides that the plasma is produced through an arc in the presence of an etching gas. Said arc can be produced with either an alternating voltage or a direct voltage between two electrodes (4, 5). The substrate (3) to be treated is at a negatively pulsed direct voltage potential. The inventive method is characterised by a high ionization rate and consequently, by short etching times. Another application for the inventive method for plasma-treating the surface of substrates (3) by ion bombardment provides that the surface of these substrates (3) is plasma-activated.

Abstract: A method for fabricating a suspended structure including a layer of membrane material over a substrate. The suspended structure overlies a cavity in the substrate. The method starts by generating a sacrificial layer comprising a first material that can withstand temperatures typically encountered in subsequent conventional semiconductor processing steps. In the preferred embodiment of the present invention, the bond between sacrificial layer and the underlying substrate must be capable of withstanding temperatures greater than the Si-Al eutectic point. A layer of membrane material is then deposited over the sacrificial layer. The membrane material comprises a second material different from the first material. An opening is introduced in the layer of membrane material thereby exposing the sacrificial layer. A first etchant is applied to the sacrificial layer through the opening until the sacrificial layer is removed leaving a portion of the cavity.

Abstract: The present invention relates to a process for treating a metal substrate to improve adhesion of polymeric materials thereto, comprising the steps of intergranular etching a surface of the metal substrate; and applying an immersion plated metal to the intergranular etched surface by immersing the surface in an immersion plating composition comprising one or more plating metals selected from tin, silver, bismuth, copper, nickel, lead, zinc, indium, palladium, platinum, gold, cadmium, ruthenium, cobalt, gallium and germanium. In one embodiment, the immersion plated metal is tin. In one embodiment, the process further comprises a step of adhering the immersion metal plated surface to a surface of a polymeric non-conductive material. In another embodiment, the polymeric nonconductive material is one or more of PTFE, an epoxy resin, a polyimide, a polycyanate ester, a butadiene terephthalate resin, or mixtures thereof.

Abstract: In a process for producing a substrate for use in a semiconductor element: a porous anodic alumina film having a great number of minute pores is formed on a surface of a base substrate; the surface of the base substrate is etched by using the porous anodic alumina film as a mask so as to form a great number of pits on the surface of the base substrate; the porous anodic alumina film is removed; and a GaN layer is formed on the surface of the base substrate by crystal growth.

Abstract: A new class of silicon-based lithographically defined nanoapertures and processes for their fabrication using conventional silicon microprocessing technology have been invented. The new ability to create and control such structures should significantly extend our ability to design and implement chemically selective devices and processes.

Abstract: A method of forming a pattern in a layer of material on a substrate, comprising providing a plurality of spheres, covering the layer on the substrate with the plurality of spheres to form a mask, reducing the diameter of at least one sphere of the plurality of spheres, etching the layer on the substrate using at least one sphere having a reduced diameter as a mask, and etching the substrate.

Abstract: An oxide etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. The invention uses a heavy perfluorocarbon, for example, hexafluorobutadiene (C4F6) or hexafluorobenzene (C6F6). The fluorocarbon together with a substantial amount of a noble gas such as argon is excited into a high-density plasma in a reactor which inductively couples plasma source power into the chamber and RF biases the pedestal electrode supporting the wafer. A more strongly polymerizing fluorocarbon such as difluoromethane (CH2F2) is added in the over etch to protect the nitride corner. Oxygen or nitrogen may be added to counteract the polymerization. The same chemistry can be used in a magnetically enhanced reactive ion etcher (MERIE) or with a remote plasma source.

Abstract: In a semiconductor device having a front surface where circuits are formed and a back surface, a hemispherical solid immersion lens is formed at the back surface of the semiconductor device in a body with the semiconductor device.

Abstract: A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. In order to eliminate or at least reduce heat and/or charge accumulation that accelerates the DRIE etch rate of certain suspended structures, means are provided to electrically and/or thermally tie the suspended structures to each other and/or the surrounding bulk substrate. As a result, the process window is increased to allow slower-etching structures to be etched to completion without overetching the more rapidly-etched structures.

Abstract: A method and apparatus are described for reducing stiction in a MEMS device having a movable element and a substrate. The method generally comprises providing the substrate with an anti-stiction member and interposing the anti-stiction member between the moveable element and the substrate. The apparatus generally comprises an anti-stiction member that is interposable between the moveable element and the substrate. Another embodiment of the invention of the invention is directed to a MEMS device, comprising: a substrate, a moveable element moveably coupled to the substrate, and an anti-stiction member that is interposable between the moveable element and the substrate. A further embodiment of the invention is directed to an optical switch having one or more moveable elements moveably coupled to a substrate, and an anti-stiction member that is interposable between at least one of the moveable elements and the substrate.

Abstract: A method of producing smooth sidewalls on a micromachined device is described. A portion of the wafer is dry etched, forming a dry etched sidewall. The sidewall is covered with a mask. An area adjacent to the dry etched area is wet etched, forming a wet etched sidewall. The mask may optionally be removed after wet etching. The wafer substrate has a <110> orientation, which allows the wet etched area to have nearly vertical wet etched sidewalls.

Abstract: A method of plasma etching a patterned tantalum nitride layer, which provides an advantageous etch rate and good profile control. The method employs a plasma source gas comprising a primary etchant to provide a reasonable tantalum etch rate, and a secondary etchant/profile-control additive to improve the etched feature profile. The primary etchant is either a fluorine-comprising or an inorganic chlorine-comprising gas. Where a fluorine-comprising gas is the primary etchant, the profile-control additive is a chlorine-comprising gas. Where the chlorine-comprising gas is the primary etchant, the profile-control additive is an inorganic bromine-comprising gas. By changing the ratio of the primary etchant to the profile-control additive, the etch rate and etch profile of the tantalum nitride can be controlled.

Abstract: A method of manufacturing a thin-film magnetic head, includes a first step of forming a second magnetic pole layer (an upper magnetic pole layer) on a magnetic gap layer formed on a first magnetic pole layer (a lower magnetic pole layer) so that the second magnetic pole layer opposes to the first magnetic pole layer via the magnetic gap layer, and a second step of dry etching a part of an upper surface of the first magnetic pole layer surrounding the second magnetic pole layer used as an etching mask to make a width of the dry-etched part of the first magnetic pole layer equal to a width of the second magnetic pole layer. The first step includes shaping at least part of the second magnetic pole layer so that the width of the second magnetic pole layer increases as a throat height becomes large.

Abstract: A system to fabricate precise, high aspect ratio polymeric molds by photolithograpic process is described. The molds for producing micro-scale parts from engineering materials by the LIGA process. The invention is a developer system for developing a PMMA photoresist having exposed patterns comprising features having both very small sizes, and very high aspect ratios between part minimum feature size and part overall dimension. The developer system of the present invention comprises a developer tank, an intermediate rinse tank and a final rinse tank, each tank having a source of high frequency sonic agitation, temperature control, and continuous filtration.

Abstract: A method for making an emitter for a display device, an emitter array produced by such method, an etch mask used during such method, and a method for making such an etch mask. The method for making the emitter comprising providing a substrate, forming a conducting layer on the substrate, forming an emitting layer on the conducting layer, forming an etch mask having a controlled distribution of a plurality of mask sizes over the emitting layer, and forming at least one emitter by removing portions of the emitting layer using the etch mask. The method for making the etch mask comprising forming an etch mask layer over an emitting layer, forming a patterning layer having a controlled distribution of mask sizes over the etch mask layer, and forming the etch mask by removing portions of the etch mask layer using the controlled distribution of mask sizes in the patterning layer.

Abstract: Apparati and methods are provided for the delivery of molecules to a site via a carrier fluid. The apparati include microchip devices which have reservoirs containing the molecules for release. The apparati and methods provide for active or passive controlled release of the molecules. Preferred embodiments include systems for intravenous administration of drugs, wherein drug molecules are released from the microchip devices into a carrier fluid ex vivo, such as a saline solution, forming a drug/saline solution mixture which is then delivered to a patient intravenously.

Abstract: A valve which has a structure with at least one opening and a member which has a fixed static charge and also has a first position exposing the opening and a second position sealing the opening. A method for making the valve includes providing a structure with at least one opening and providing a member having a fixed static charge where the member has a first position exposing the opening and a second position sealing the opening. An agitator includes a base with at least one trench, a structure with at least one opening, and a membrane with a fixed static charge. The structure is connected to the base over the trench with the opening in the structure extending through to the trench in the base. The membrane is connected to the base across at least a portion of the trench. A pump includes a base with at least one trench, a structure with at least two openings, a membrane with a fixed static charge, a first cantilever arm having a fixed static charge, and a second cantilever arm having a fixed static charge.

Abstract: A method of making a silicon micromechanical structure, from a lightly doped silicon substrate having less than <5×1019 cm−3 boron therein. A p+ layer having a boron content of greater than 7×1019 cm−3 and a germanium content of about 1×1021 cm−3 is placed on the substrate. A mask is formed on the second side, followed by etching to the p+ layer. An insulator is put on the p+ layer and an electronic component is fabricated thereon. Preferred micromechanical structures are pressure sensors, cantilevered accelerometers, and dual web biplane accelerometers. Preferred electronic components are dielectrically isolated piezoresistors and resonant microbeams. The method may include the step of forming a lightly doped layer on the p+ layer to form a buried p+ layer prior to etching.

Abstract: The disclosure pertains to a method for forming a metal layer of a semiconductor device including the steps of: removing a residual native oxide from a contact hole forming a metal junction layer on this contact hole to improve the junction with an inter-layer insulating film, forming a first metal layer in the contact hole to a predetermined thickness under a low pressure to improve step coverage, and forming a second metal layer to a predetermined thickness, thereby planarizing the metal layer. As a result, the step coverage of the bottom surface and side walls of the contact hole is improved, thus preventing defects caused by the disconnection of metal wire of a semiconductor device and improving the economy of the process.

Abstract: A method for forming an electrical insulating layer on bit lines of the flash memory is disclosed. A conductive layer, a mask layer and a cap layer are sequentially formed on a semiconductor substrate and then are etched to form a plurality of spacing. Afterwards, a dielectric layer is formed on the semiconductor substrate and a planarized layer is then formed on the dielectric layer. The planarized layer and the dielectric layer are etched sequentially wherein the etching rate of the planarized layer is less than that of the dielectric layer. Next, the dielectric layer is etched to remove a portion of the dielectric layer wherein the etching rate of the dielectric layer is higher than that of the cap layer, and thus a spacing dielectric layer is formed on the spacing. Thereafter, the cap layer is stripped wherein the etching rate of the dielectric layer is less than that of the mask layer so that the spacing dielectric layer has a round top and slant sides.

Abstract: A process for micromachining capillaries was having circular cross-sections in glass substrates. Microchannels are isotropically etched into a flat glass substrate, resulting in a semi-circular half-channel (or a rectangle with rounded corners). A second flat glass substrate is then fusion bonded to the first substrate, producing sealed microchannels with rounded bottom corners and a flat top surface having sharp corners. The process is completed by annealing at a sufficiently high temperature (approximately 750 C.) to allow surface tension forces and diffusional effects to lower the over-all energy of the microchannels by transforming the cross-section to a circular shape. The process can be used to form microchannels with circular cross-sections by etching channels into a glass substrate, then anodically bonding to a silicon wafer and annealing. The process will work with other materials such as polymers.

Abstract: A method of use for a reusable monitor wafer, having multiple crystal original pits (COP) on its surface, used for monitoring and measuring particle amounts in a chemical vapor deposition (CVD) process. First, a silicon oxide layer is formed on the surface of a monitor wafer. A first cleaning process and a thin film deposition process, forming a thin film layer on a surface of the silicon oxide layer, are then performed, respectively. Thereafter, a particle measurement process is performed to measure particle amounts on the surface of the thin film layer. After removing the thin film layer and the silicon oxide layer on the monitor wafer, respectively, a second cleaning process is performed.

Abstract: A method is described for producing a semiconductor component (100; . . . ; 2200) particularly a multilayer semiconductor element, preferably a micromechanical component, particularly a pressure sensor, having a semiconductor substrate (101), particularly made of silicon, and a semiconductor component produced according to the method.

Abstract: Method and apparatus for etching a tapered trench in a layer of material with a highly controllable wall profile. The layer of material has a mask adjacent a surface thereof having an opening which defines a location on the layer of material at which the trench is to be formed. Vertical etch process steps and opening enlarging process steps are then performed in an alternating manner until the trench has been etched to a desired depth. The method permits very deep tapered trenches of up to 80-100 um or more to be formed in a silicon substrate or other layer of material in a highly controllable manner. The method can be incorporated into processes for manufacturing numerous devices including MEMS devices and high power RF devices such as LDMOS and VDMOS devices.

Abstract: A method of fabricating a microfabricated filter. The method includes forming a frame structure and forming a plurality of openings through the frame structure. A permeable polysilicon membrane is formed over the plurality of openings through the frame structure. At least part of the sacrificial structure is etched with an etchant wherein the etchant passes through the permeable polysilicon membrane. The permeable polycrystal silicon membrane may have a thickness of between about 0.05 micrometers and about 0.30 micrometers.

Abstract: The present invention provides a micromechanical or microoptomechanical structure. The structure is produced by a process comprising defining a structure on a single crystal silicon layer separated by an insulator layer from a substrate layer; depositing and etching a polysilicon layer on the single crystal silicon layer, with remaining polysilicon forming mechanical or optical elements of the structure; exposing a selected area of the single crystal silicon layer; and releasing the formed structure.

Abstract: A slider includes an air bearing surface (ABS) including a plurality of separate coplanar pads, a cavity recessed to a certain depth beneath the level of the ABS, and a plurality of steps in which each step is disposed at a level between that of the ABS and that of the cavity. The plurality of steps include a trailing edge step and a leading edge step, and in some embodiments a first side step and a second side step. The leading edge step is provided at a level between that of the trailing edge step. The first side step and the second side step may be provided at the same or different levels to tailor the flight characteristics of the slider. A process is also disclosed for the fabrication of a slider of the present invention. The process includes at least three cycles of masking, etching, and stripping in order to form at least three successively deeper levels, the deepest level being the cavity.

Abstract: Disclosed are systems and methods involved in extreme high throughput screening of compounds which have an affinity for a biological target. The system is based on a capillary bundle with two distinguishable ends wherein capillaries on one end are connected to compounds stored in discrete reservoirs and capillaries on the other end are bound and processed to form a two dimensional microarray. A capillary bundle having reaction wells for hybridization and compound reaction in one end of the capillaries is disclosed. The capillaries may be light-conducting. Also disclosed are various methods of identifying a target compound in a liquid using this capillary bundle as well as methods of fabricating the bundle.

Abstract: In a semiconductor device having a front surface where circuits are formed and a back surface, a hemishperical solid immersion lens is formed at the back surface of the semiconductor device in a body with the semiconductor device.

Abstract: A cylindrical, electrical insulating region is formed in a circuit substrate made of a semiconductor substrate to continuously extend from the upper surface to the lower surface of the semiconductor substrate and be closed in a plane parallel to the surface of the semiconductor substrate. The electrical insulating region is formed by an insulating region made of a heat-resistant insulating material. The insulating region is formed by forming a through hole or trench in the circuit substrate and forming an oxide film or nitride film on the wall surface of the hole or trench or filling it with an insulating material. When the trench is formed, the substrate is thinned by polishing or the like until the trench appears on the upper and lower surfaces of the substrate after the insulating region is formed. The region surrounded by the insulating region functions as an electrode when the conductivity of the region is increased by diffusing an impurity in it.

Abstract: A method for forming many microlenses comparatively easily and effectively is provided. On one end of an optical substrate is formed a plurality of lens planes at regular intervals. Lens areas containing the lens planes are partially covered by an etching mask and etching processing is performed on areas being exposed outside the etching mask to remove the areas to a specified depth. While the lens planes formed on one surface of the optical substrate are being held by a support substrate, polishing processing is performed on another end face of the optical substrate and each microlens formed in the lens areas is separated from the support substrate.

Abstract: A method for fabricating an electrically isolated MEMS device having an outer stationary MEMS element and an inner movable MEMS element is provided that does not use a sacrificial layer. Rather, a pair of spacers are defined on the outer portions of the upper surface of a conductive wafer, and an insulating material is deposited thereon. The spacers are attached to a substrate to define an internal void therein. The wafer is then patterned to form the outer MEMS element as well as a conductive member for the inner MEMS element, separated from the outer MEMS element by a gap. A portion of the insulating layer that is disposed in the gap is then removed, thereby releasing the inner MEMS element from the stationary MEMS element.

Abstract: A structure and method for creating a contact between a conductive layer and a pad for dissipating electrostatic charges comprising the steps of, forming a pad and a composite insulating layer between and over conductive plates on a substrate, wherein the insulating layer isolates and protects the conductive plates and pad from damage, the insulating layer comprising a dielectric region underlying a conductive layer. A passivation layer is formed over at least a portion of the conductive layer and a photoresist is patterned over at least a portion of the passivation. An opening is etched through the passivation and the insulating layers, wherein the photoresist and the conductive layer serve as masks. Finally, a conductive material is deposited in the opening to form an electrical contact between the pad and the conductive layer.

Abstract: A method for fabricating MEMS structure includes etching a recess in an upper surface of a substrate that is bonded to a wafer that ultimately forms the MEMS structure. Accordingly, once the etching processes of the wafer are completed, the recess facilitates the release of an internal movable structure within the fabricated MEMS structure without the use of a separate sacrificial material.

Abstract: In a method of fabricating a microstructure for microfluidics applications, a first layer of etchable material is formed on a suitable substrate. A mechanically stable support layer is formed over the etchable material. A mask is applied over the support to expose at least one opening in the mask. An anistropic etch is then performed through the opening to create a bore extending through the support layer to said layer of etchable material. After performing an isotropic etch through the bore to form a microchannel in the etchable material extending under the support layer, a further layer is deposited over the support layer until overhanging portions meet and thereby close the microchannel formed under the opening.

Abstract: The invention is for a process for manufacturing a liquid crystal display element for use in a color display using resist materials. The process comprises forming a transparent conductive film on one side of a transparent substrate; patterning the transparent conductive film by coating with a colored positive resist followed by exposure and development, coating a black-colored negative resist onto the transparent film; forming black stripes by subjecting the negative resist to exposure from the back side of the transparent substrate and development of the negative resist.

Abstract: A system for optionally depositing or etching a layer of a wafer includes mask plate opposed to the wafer with the mask plate having a plurality of openings that transport a solution to the wafer. An electrode assembly has a first electrode member and a second electrode member having channels that operatively interface a peripheral and center part of the wafer. The channels transport the solution to the mask.

Abstract: Pillars are formed in a fully integrated thermal inkjet printhead to prevent particles from entering into a nozzle chamber along an ink refill channel. The pillars are formed after a step of applying a thin film structure to a substrate. At one step, pits are etched through the thin film structure. At another step, material for an orifice layer is deposited into the pits. At another step, a firing chamber is etched into the orifice layer. At another step, a trench is etched into the backside of the wafer in the vicinity of the filled pits. The material filling each pit is not removed and remains in place to define the respective pillars. Two or more pillars are formed within the trench for each inkjet nozzle chamber. Alternatively pillars are formed by depositing material into the underside trench and performing photoimaging processes.

Abstract: A method of etching a trench in a substrate using a dry plasma etch technique that allows precise control of lateral undercut. The method includes optionally forming at least one on-chip device or micro-machined structure in a surface of a silicon substrate, and covering the surface with a masking layer. A trench pattern is then imaged in or transferred to the masking layer for subsequent etching of the substrate. Upper portions of the trench are anisotropically etched in the substrate. The trench is then semi-anisotropically etched and isotropically etched in the substrate. By modifying isotropic etching time, a controlled lateral undercut can be achieved as the trench is etched vertically in the substrate.

Abstract: An optical system for injecting laser radiation emitted from a semiconductor laser into an optical conductor, in which a convergent lens is configured between the semiconductor laser and the optical conductor. A diaphragm for masking out a portion of the laser radiation emitted from the semiconductor laser is applied to the convergent lens.

Abstract: Provided are an etching method which uses an additive gas stably suppliable also in future, is reduced in the problem of particle contamination, is free from the problem of removability of side-wall protection film and has high shape controlling capacity, and a manufacturing method a highly-reliable semiconductor device by using this etching method. This etching method comprises depositing metal film including an aluminum over a semiconductor device and etching the metal film with a plasma of a mixture gas containing a Cl2 gas, a BCl3 gas and a CH2Cl2 gas.