Forming Pattern Using Lift Off Technique Patents (Class 216/40)
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Patent number: 7041228Abstract: A substrate comprising at least a first and a second coating layer on one surface of the substrate is for nanoimprint lithography, the first coating layer has a positive resist and the second coating layer has a negative resist. A process in connection with nanoimprint lithography on the substrate impresses a pattern of nanometer size in a first stage into the second coating layer by a template, following which the first coating layer, in a second stage, is exposed to a chiefly isotropic developing method on surfaces thereof that have been exposed in connection with the first stage, a method for developing and material for the first and second coating layers being selected so that the first coating layer is developed more quickly than the second coating layer, so that an undercut profile is obtained in the coating layers.Type: GrantFiled: April 10, 2001Date of Patent: May 9, 2006Assignee: Obducat AktiebolagInventor: Babak Heidari
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Patent number: 6996894Abstract: Methods of making a read head with improved contiguous junctions are described. After sensor layer materials are deposited over a substrate, a lift-off mask is formed over the sensor layer materials in a central region which is surrounded by end regions. Ion milling is performed with use of the lift-off mask such that the sensor layer materials in the end regions are removed and those in the central region remain to form a read sensor. A high-angle ion mill (e.g. between 45–80 degrees) is then performed to remove redeposited material from side walls of the lift-off mask. Next, a reactive ion etch (RIE) is used to reduce the thickness and the width of the lift-off mask and to remove capping layer materials from the top edges of the read sensor. With the reduced-size lift-off mask in place, hard bias and lead layers are deposited adjacent the read sensor as well as over the mask.Type: GrantFiled: March 28, 2002Date of Patent: February 14, 2006Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Richard Hsiao, Wipul Pemsiri Jayasekara, Mustafa Pinarbasi, Patrick Rush Webb
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Patent number: 6994884Abstract: A method of fabricating a support electrode for a solid oxide fuel cell includes (a) providing a solid support electrode having an upper surface, the solid electrode comprising an electronically non-conductive material and an electronically conductive material; (b) applying a mask over the upper surface to create a desired unmasked pattern on the top surface; (c) removing the desired amount of material(s) from the unmasked pattern to a predetermined depth of the support electrode; and (d) removing the mask.Type: GrantFiled: December 16, 2004Date of Patent: February 7, 2006Assignee: General Electric CompanyInventors: Jie Guan, Dacong Weng, Vishal Agarwal, Xiwang Qi
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Patent number: 6968613Abstract: A fabrication method of a circuit board is proposed, wherein a core layer is formed with a plurality of conductive traces, and photo resist is respectively applied on terminals of the conductive traces. Then, a non-solderable material is applied over the core layer as to cover the conductive traces except for the insulating material, and the non-solderable material is adapted to be surface-flush with the insulating material, allowing the insulating material to be exposed from the non-solderable material. Finally, the insulating material is removed from the core layer to expose the terminals of the conductive traces, wherein the exposed terminals are used as bond pads or bond fingers where solder balls, solder bumps or bonding wires can be bonded. This circuit board is cost-effectively fabricated by simplified processes, and beneficial in precisely exposing bond pads or bond fingers, thereby significantly improving yield of fabricated circuit boards.Type: GrantFiled: June 20, 2002Date of Patent: November 29, 2005Assignee: UltraTera CorporationInventors: Chung-Che Tsai, Jin-Chuan Bai
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Patent number: 6962630Abstract: A lift-off procedure is provided which enables prevention of damage to a wiring pattern caused by contact of a metal being peeled off from a wafer with a wiring pattern at a time of lift-off procedure. A wafer having a surface on which a pattern is formed which contains a pattern portion to be removed is soaked into a chemical liquid at an angle at which the surface faces downward.Type: GrantFiled: October 3, 2002Date of Patent: November 8, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Masaru Suzuki, Yoshiki Nitta, Kazuhiko Ohmuro
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Patent number: 6958123Abstract: A method comprises depositing an organic material on a substrate; depositing additional material different from the organic material after depositing the organic material; and removing the organic material with a compressed fluid. Also disclosed is a method comprising: providing an organic layer on a substrate; after providing the organic layer, providing one or more layers of a material different than the organic material of the organic layer; removing the organic layer with a compressed fluid; and providing an anti-stiction agent with a compressed fluid to material remaining after removal of the organic layer.Type: GrantFiled: June 10, 2002Date of Patent: October 25, 2005Assignee: Reflectivity, INCInventors: Jason S. Reid, Nungavaram S. Viswanathan
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Patent number: 6955767Abstract: The lithographic process described herein involves aligning a patterned mold with respect to an alignment mark that is disposed on a substrate based upon interaction of a scanning probe with the alignment mark. By this method, the patterned mold may be aligned to an atomic accuracy (e.g., on the order of 10 nm or less), enabling nanometer-scale devices to be fabricated. A device formed by this lithographic method and a system for implementing this lithographic method with alignment also are described.Type: GrantFiled: March 22, 2001Date of Patent: October 18, 2005Assignee: Hewlett-Packard Development Company, LP.Inventor: Yong Chen
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Patent number: 6926840Abstract: A method of mounting a deposition mask onto a flexible frame for use in vacuum deposition of material through a pealable deposition mask in forming an OLED, including the steps of providing a plate with the pealable deposition mask formed thereon; providing the flexible frame having border portions, such border portions defining a frame opening which corresponds to border portions on the pealable deposition mask; aligning and then securing the border portions of the flexible frame to the border portions of the pealable deposition mask and removing the flexible frame and secured pealable deposition mask from the plate; and mounting the flexible frame with the pealable deposition mask in a carrier which maintains planarity of the pealable deposition mask during subsequent vacuum deposition of material.Type: GrantFiled: December 31, 2002Date of Patent: August 9, 2005Assignee: Eastman Kodak CompanyInventor: Thomas K. Clark
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Patent number: 6872321Abstract: A method of forming a photo-resist image on a substrate, such as a conductive film. The method provides that a photo-resist image is printed directly onto the conductive film, such as by using an ink jet printer. Specifically, a CAD image may be sent from a computer to the ink jet printer, and the ink jet printer may use the CAD image to print the photo-resist image. The method may provide that a copper film is applied to a dielectric substrate, and then the photo-resist image is printed directly onto the copper film. Then, at least a portion of the copper film is removed, such as by etching, and at least a portion of the photo-resist image which has been printed on the copper film is removed, such as by etching. By printing the photo-resist image directly onto the copper film, it is not necessary to perform steps such as: applying a mask, exposing to UV light, and developing.Type: GrantFiled: September 25, 2002Date of Patent: March 29, 2005Assignee: LSI Logic CorporationInventors: Manickam Thavarajah, Aritharan Thurairajaratnam, Alejandro Lacap
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Patent number: 6872319Abstract: A MEMS fabrication process eliminates through-wafer etching, minimizes the thickness of silicon device layers and the required etch times, provides exceptionally precise layer to layer alignment, does not require a wet etch to release the moveable device structure, employs a supporting substrate having no device features on one side, and utilizes low-temperature metal-metal bonding which is relatively insensitive to environmental particulates. This process provided almost 100% yield of scanning micromirror devices exhibiting scanning over a 12° optical range and a mechanical angle of ±3° at a high resonant frequency of 2.5 kHz with an operating voltage of only 20 VDC.Type: GrantFiled: September 30, 2002Date of Patent: March 29, 2005Assignee: Rockwell Scientific Licensing, LLCInventor: Chialun Tsai
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Patent number: 6852550Abstract: This invention relates to MRAM technology and new MRAM memory element designs. Specifically, this invention relates to the use of ferromagnetic layers of different sizes in an MRAM element. This reduces magnetic coupling between a pinned layer and a sense layer and provides a more effective memory element.Type: GrantFiled: July 14, 2003Date of Patent: February 8, 2005Assignee: Micron Technology, Inc.Inventors: Mark E. Tuttle, Joel A. Drewes
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Patent number: 6808641Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.Type: GrantFiled: January 17, 2001Date of Patent: October 26, 2004Assignee: Murata Manufacturing Co., LtdInventors: Yoshiyuki Tonami, Yoshihiro Koshido
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Publication number: 20040188381Abstract: The present invention provides a method to pattern a substrate which features creating a multi-layered structure by forming, on the substrate, a patterned layer having protrusions and recessions. Formed upon the patterned layer is a conformal layer, with the multi-layered structure having a crown surface facing away from the substrate. Portions of the multi-layered structure are removed to expose regions of the substrate in superimposition with the protrusions, while forming a hard mask in areas of the crown surface in superimposition with the recessions.Type: ApplicationFiled: March 25, 2003Publication date: September 30, 2004Applicant: Molecular Imprints, Inc.Inventor: Sidlgata V. Sreenivasan
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Publication number: 20040149687Abstract: Processes and associated devices for high precision positioning of a template an substrate during imprint lithography includes a calibration system with a course calibration stage and a fine orientation stage capable of maintaining a uniform gap between the template and substrate. The fine orientation stage includes a pair of flexure members having flexure joints for motion about a pivot point intersected by first and second orientation axes. Actuators lengthen or shorten to expand or contract the flexure members. Separation of the template is achieved using a peel-and-pull method that avoids destruction of imprinted features from the substrate.Type: ApplicationFiled: July 10, 2003Publication date: August 5, 2004Applicant: University of Texas System, Board of Regents, UT SystemInventors: Byung Jin Choi, Sidlgata V. Sreenivasan, Stephen C. Johnson
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Publication number: 20040134882Abstract: An improved UV-curable polymerizable mixture comprises a compensation agent, a photoinitiator, and optionally, a cross-linker. Upon curing, the polymerizable mixture becomes a polymer that is more readily removable (e.g., by solvent or ion etching) than conventional UV-cured polymers. The improved polymerizable mixtures may be used in soft lithography applications, for example, as a mask used to protect a portion of an underlying layer during an etching process. The polymerizable mixture may also be used in other applications including, without limitation, during micromachining, in MEMS, as an optical cladding, as a coating, as an adhesive, as a sealant, as a potting medium, as an encapsulant, or for waterproofing.Type: ApplicationFiled: January 15, 2003Publication date: July 15, 2004Inventor: Ping Mei
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Publication number: 20040134883Abstract: In patterning method with micro-contact printing comprising the steps of: applying resin on a master having projected patterns, hardening the resin and thereafter removing the hardened resin from the master to make a stamp of the resin; applying molecular ink including hydrophobic molecules dispersed in solvent on the stamp and forming micro-contact printed patterns of hydrophobic molecular layer on a substrate by means of the stamp on which the molecular ink is applied and; dipping the substrate with micro-contact printed patterns in hydrophilic molecule solution dispersed in solvent to give chemical modification to the areas of the surface of substrate around the micro-contact printed patterns, solution including hydrophilic molecules having chain length shorter than the chain length of hydrophobic molecules included in the molecular ink is used as the hydrophilic molecule solution.Type: ApplicationFiled: December 12, 2003Publication date: July 15, 2004Applicant: DAINIPPON PRINTING CO., LTD.Inventors: Masamichi Fujihira, Uichi Akiba, Hiroki Okui, Shintaro Fujii, Masaaki Kurihara
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Publication number: 20040118809Abstract: The present invention is directed to a lithographic method and apparatus for creating micrometer sub-micrometer patterns in a thin film coated on a substrate. The invention utilizes the self-formation of periodic, supramolecular pillar arrays (49) in a melt to form the patterns. The self-formation is induced by placing a plate or mask (35) a distance above the polymer films (33). The pillars bridge the plate and the mask, having a height equal to the plate-mask separation and preferably 2-7 times that of the film's initial thickness. If the surface of the mask has a protruding pattern, the pillar array is formed with the edge of the pillar array aligned to the boundary of the mask pattern.Type: ApplicationFiled: December 9, 2003Publication date: June 24, 2004Inventors: Stephen Y. Chou, Lei Zhuang
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Publication number: 20040093705Abstract: In a surface acoustic wave device using a Shear Horizontal type surface acoustic wave, at least one interdigital transducer (IDT) is made of a material having a larger mass-load effect than that of aluminum. The metallization ratio of the IDT and the normalization film thickness h/&lgr; of the IDT are controlled such that ripple caused by a transversal mode wave is about 0.5 dB or less, where “h” indicates the film thickness of the electrodes and “&lgr;” indicates the wavelength of a surface acoustic wave.Type: ApplicationFiled: July 7, 2003Publication date: May 20, 2004Applicant: Murata Manufacturing Co.Inventors: Takeshi Nakao, Koji Fujimoto, Michio Kadota, Toshimaro Yoneda
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Patent number: 6719918Abstract: A method of reducing notching during reactive ion etching (RIE) is provided. The method is useful when RIE is performed to pass through a silicon layer on a multi-layered structure on which the silicon layer, an insulating layer and a silicon substrate are sequentially deposited. The method includes the steps of: forming an insulating layer on a silicon substrate; forming trenches on the insulating layer to expose the silicon substrate; forming a silicon layer on the insulating layer to fill the trenches; and patterning the silicon layer to form first etch regions, which pass through the silicon layer, to include the trenches. According to the method, it is possible to remarkably reduce notching without depositing a metal layer, when a multi-layered structure including a silicon layer which is etched to be passed through during RIE is fabricated.Type: GrantFiled: December 26, 2001Date of Patent: April 13, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Byeung-leul Lee, Taek-ryong Chung, Joon-hyock Choi, Won-youl Choi, Kyu-dong Jung, Sang-woo Lee
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Patent number: 6706202Abstract: A method is disclosed for making shaped optical moems components with stressed thin films. In particular, stressed thin films are used to make mirror structures.Type: GrantFiled: September 28, 2000Date of Patent: March 16, 2004Assignee: Xerox CorporationInventors: Decai Sun, Michel A. Rosa, Eric Peeters, Francesco Lemmi, Patrick Y. Maeda, Christopher L. Chua
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Patent number: 6699396Abstract: A method for forming conductive features in dielectric materials is disclosed which includes providing a dielectric layer and forming a release layer over the dielectric layer. Then a feature is defined into the each of the release layer and the dielectric layer and a conductive material is filled over the release layer and into the feature. The release layer is then removed where the removing serves to remove the conductive material from over the dielectric layer previously covered by the release layer.Type: GrantFiled: June 29, 2001Date of Patent: March 2, 2004Assignee: Novellus Systems, Inc.Inventor: John Stephen Drewery
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Patent number: 6689283Abstract: A dry etching is performed using a mask made of a titanium nitride under a reaction gas of a carbon monoxide with an additive of a nitrogen containing compound gas.Type: GrantFiled: March 26, 2001Date of Patent: February 10, 2004Assignee: TDK CorporationInventors: Kazuhiro Hattori, Kenji Uchiyama
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Patent number: 6686128Abstract: A method for fabricating patterned layers of a desired material in a desired, design pattern upon a substrate, which method may be used in circumstances where the removal of photo-resist material may not be used to lift-off undesired portions of the material from the substrate. The method uses copper or some other conducting material instead of the photo-resist material, Which copper or other conducting material may be removed by chemical processes to lift-off the undesired portions of material deposited upon the conducting material and substrate. The copper or other conducting material is fabricated upon the substrate so as to have a lip that overhangs and shadows the boundary of photo-resist material previously fabricated upon the substrate in the desired pattern.Type: GrantFiled: August 17, 2001Date of Patent: February 3, 2004Assignee: TFR Technologies, Inc.Inventors: Kenneth Meade Lakin, Ralph Edward Rose
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Patent number: 6680214Abstract: A method is disclosed for the induction of a suitable band gap and electron emissive properties into a substance, in which the substrate is provided with a surface structure corresponding to the interference of electron waves. Lithographic or similar techniques are used, either directly onto a metal mounted on the substrate, or onto a mold which then is used to impress the metal. In a preferred embodiment, a trench or series of nano-sized trenches are formed in the metal.Type: GrantFiled: August 5, 2000Date of Patent: January 20, 2004Assignee: Borealis Technical LimitedInventors: Avto Tavkhelidze, Jonathan Sidney Edelson, Isaiah Watas Cox, Stuart Harbron
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Patent number: 6679996Abstract: In a pattern forming method for selectively forming an oxide layer on a substrate surface, the substrate surface is selectively coated with a coating layer. On the coating layer and an exposed part of the substrate surface, an oxide layer is formed by the use of a predetermined solution. Subsequently, the oxide layer on the coating layer is removed together with the coating layer to selectively leave the oxide layer on the substrate surface. Thus, a pattern is formed. The coating layer is removed in a liquid phase or optically together with the oxide layer on the coating layer. The oxide layer is formed by the use of, as the predetermined solution, an aqueous solution or a hydrofluoric acid solution of a fluoro metal complex compound and/or metal fluoride of at least one element selected from the group consisting of alkaline earth metal, transition metal, gallium, indium, silicon, tin, lead, antimony, and bismuth in the presence of an fluoride ion capturing agent.Type: GrantFiled: October 5, 2000Date of Patent: January 20, 2004Assignees: Hoya Corporation, Takeshi YaoInventor: Takeshi Yao
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Patent number: 6624080Abstract: There is provided a metal etching mask fabrication method. Chrome is first sputtered on a silica layer and a photoresist, which is thicker than the chrome layer, is deposited on the chrome layer. The photoresist layer is patterned, a first nickel is sputtered on the photoresist pattern layer and onto a first portion of the chrome layer exposed by the patterning. A second nickel layer is formed on the portions of the first nickel layer in contact with the first portion of the chrome layer by electroplating. The photoresist pattern has side walls having acute angles to prevent contact between the first nickel layer on the photoresist and the second nickel layer on the first portion of the chrome layer. The photoresist pattern layer and the first nickel layer formed on the photoresist pattern layer are removed using a solvent, and the chrome layer is removed by dry etching in plasma using a gas.Type: GrantFiled: July 17, 2001Date of Patent: September 23, 2003Assignee: Samsung Electronics Co., LtdInventors: Sun-Tae Jung, Duk-Yong Choi, Joo-Hoon Lee
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Patent number: 6606782Abstract: To form a spin valve device, start by forming a gap layer. Form a buffer layer with a layer of refractory material on the buffer layer. Form patterned underlayers including a magnetic material for providing trackwidth and longitudinal bias on the buffer layer comprising either a lower antiferromagnetic layer stacked with a ferromagnetic layer or a Cr layer stacked with a permanent magnetic layer. Form an inwardly tapered depression in the patterned underlayers down to the buffer layer by either ion milling through a mask or a stencil lift off technique. Form layers covering the patterned underlayers that cover the inwardly tapered depression. Form free, pinned, spacer and antiferromagnetic layers. Form conductors either on a surface of the antiferromagnetic layer aside from the depression or between the buffer layer and the patterned underlayers.Type: GrantFiled: March 22, 2002Date of Patent: August 19, 2003Assignee: Headway Technologies, Inc.Inventors: Tai Min, Po-Kang Wang, Moris Musa Dovek
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Patent number: 6565763Abstract: A pattern forming material contains a block copolymer or graft copolymer and forms a structure having micro polymer phases, in which, with respect to at least two polymer chains among polymer chains constituting the block copolymer or graft copolymer, the ratio between N/(Nc−No) values of monomer units constituting respective polymer chains is 1.4 or more, where N represents total number of atoms in the monomer unit, Nc represents the number of carbon atoms in the monomer unit, No represents the number of oxygen atoms in the monomer unit.Type: GrantFiled: June 7, 2000Date of Patent: May 20, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Koji Asakawa, Toshiro Hiraoka, Yoshihiro Akasaka, Yasuyuki Hotta
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Publication number: 20030091937Abstract: A method of forming a patterned layer on a substrate including depositing a notched or undercut resist pattern to define at least one recess in the photoresist, with the notch or undercut circumjacent the base of the recess, sputtering a material into the recess and removing the resist and the material deposited on the resist characterised in that the aspect ratio of the recess and height of the mouth of the notch or undercut are such that the notch or undercut lies substantially in the shadow beneath the resist, the layer deposited upon it and the layer at the base of the recess in respect of any sputtered particle travelling in a straight line through the mouth of the recess such that material deposited on the walls of the recesses is not continuous with material deposited on the base of the recess.Type: ApplicationFiled: November 8, 2002Publication date: May 15, 2003Inventors: James Francis O'Sullivan, Stephen Robert Burgess
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Patent number: 6550131Abstract: A method for making a thin-film magnetic head with a magnetoresistive layer having a desired shaped to facilitate narrowing of the track width, wherein the surface, in the depth direction, is not curved, and wherein the shape and magnetic anisotropy of each sublayer of the magnetoresistive layer is stabilized to ensure improved reading characteristics.Type: GrantFiled: June 9, 2000Date of Patent: April 22, 2003Assignee: Alps Electric Co., Ltd.Inventor: Kiyoshi Sato
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Patent number: 6544430Abstract: Improved methods and articles used to fabricate flexible circuit structures are disclosed. The methods include depositing a release layer or a dielectric film on a substrate, and then forming a conductive laminate on the release layer or the dielectric film. The conductive laminate may be easily separated by the substrate to eventually form a flexible circuit structure. Plasma may be used to treat a surface of the release layer or the dielectric film to produce a plasma-treated surface to lower the peel strength of any film or layer bound to the plasma-treated surface.Type: GrantFiled: May 31, 2001Date of Patent: April 8, 2003Assignee: Fujitsu LimitedInventors: Mark Thomas McCormack, James Roman, Lei Zhang, Solomon I. Beilin
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Publication number: 20030029830Abstract: This invention has an object of providing a method for producing a multilayer substrate or an electronic part wherein decrease in the thickness has been enabled without causing the problem of insufficient strength or the like in the handling, as well as the electronic part. Such object has been attained by a method for producing a multilayer substrate or an electronic part comprising the steps of adhering a conductor layer to a transfer film, patterning the conductor layer to form a predetermined pattern, placing the transfer film overlaid with the patterned conductor layer on a prepreg so that the side of the conductor layer faces the prepreg, and then adhering the transfer film to the prepreg by applying heat and pressure and peeling the transfer film to produce the prepreg having the conductor layer formed thereon; and the multilayer electronic part produced by such method.Type: ApplicationFiled: September 11, 2002Publication date: February 13, 2003Applicant: TDK Corp.Inventors: Minoru Takaya, Toshikazu Endo, Masami Sasaki
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Publication number: 20030031940Abstract: A low cost, durable mask for use in structuring anodically bondable glass materials and other structurable glass materials.Type: ApplicationFiled: October 15, 2002Publication date: February 13, 2003Inventor: Amy V. Skrobis
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Publication number: 20030013046Abstract: There is disclosed a method of producing nano or micro-scale chemical reactor devices and novel devices produced by said method. The method of the invention uses deposited sacrificial layers to provide various channels and reservoirs of reactor devices. Reactor devices of the present invention are chemical reactor devices, electro-chemical reactor devices, or chemical/electro-chemical deivices. A fuel cell embodiment is disclosed.Type: ApplicationFiled: June 28, 2002Publication date: January 16, 2003Applicant: THE PENN STATE RESEARCH FOUNDATION, UNIVERSITY PARK, PENNSYLVANIAInventors: Stephen J. Fonash, Wook Jun Nam, Kyuhwan Chang, Henry C. Foley
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Patent number: 6495311Abstract: The magnetic tape recording head of the present invention is formed with magnetic poles that are comprised of a laminated NiFeN/FeN structure. The method for fabricating the magnetic poles utilizes an additive photolithographic technique including a bilayer liftoff resist. In this fabrication method magnetic pole trenches are formed in the bilayer liftoff resist such that an undercut exists in the liftoff layer. Thereafter, the laminated NiFeN/FeN structure is sputter deposited into the trench, followed by the wet chemical removal of the bilayer resist.Type: GrantFiled: March 17, 2000Date of Patent: December 17, 2002Assignee: International Business Machines CorporationInventors: Mahbub R. Khan, Jane Ellyn Nealis, Alfred Floyd Renaldo, John David Westwood
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Patent number: 6485894Abstract: A method to self-align a lithographic pattern to a workpiece, the method including the steps of obtaining a workpiece having a predetermined pattern of features; modifying at least some of the features so that when a photoresist material is applied to the pattern, there is a substantial difference in reflectivity between two adjacent features, at least one of which has been modified; applying a photoresist material; masklessly exposing the photoresist material; developing the photoresist material, the substantial difference in reflectivity of the two adjacent features causing the developed photoresist material to reveal one adjacent feature but not the other.Type: GrantFiled: September 29, 2000Date of Patent: November 26, 2002Assignee: International Business Machines CorporationInventors: Hiroyuki Akatsu, Franz X. Zach
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Patent number: 6447689Abstract: An improved process for manufacturing a spin valve structure that has buried leads is disclosed. A key feature is the inclusion in the process of a temporary protective layer over the seed layer on which the spin valve structure will be grown. This protective layer is in place at the time that photoresist (used to define the location of the spin valve relative to the buried leads and longitudinal bias layers) is removed. The protective layer is later removed as a natural byproduct of surface cleanup just prior to the formation of the spin valve itself.Type: GrantFiled: June 5, 2000Date of Patent: September 10, 2002Assignee: Headway Technologies, Inc.Inventors: Chyu-Jiuh Torng, Chen-Jung Chien, Kochan Ju, Jei-Wei Chang
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Patent number: 6428714Abstract: An improved process for manufacturing a spin valve structure that has buried leads is disclosed. A key feature is the inclusion in the process of a temporary protective layer over the seed layer on which the spin valve structure will be grown. This protective layer remains in place while the buried leads as well as longitudinal bias means are formed. Processing includes use of photoresist liftoff. The protective layer is removed as a natural byproduct of surface cleanup just prior the formation of the spin valve.Type: GrantFiled: June 5, 2000Date of Patent: August 6, 2002Assignee: Headway Technologies, Inc.Inventors: Chyu-Jiuh Torng, Chen-Jung Chien, Kochan Ju, Jei-Wei Chang
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Patent number: 6416677Abstract: As the read capabilities of magnetic disk systems improve due to advanced GMR heads, it becomes necessary to correspondingly reduce the area of recorded data. This requires a narrowing of the stitched sub-pole at the write gap. This has proved difficult for pole widths less than about 0.4 microns because of problems in filling the mold. In the present invention this is overcome by introducing a layer of PMGI (polydimethylglutarimide) between the planarized positive photoresist layer that comprises the mold and the non-magnetic write gap layer on which the mold rests. This greatly facilitates formation of a high aspect ratio hole with a clean flat bottom and essentially vertical sides as well as the subsequent removal of the photoresist after said hole has been filled through electroplating to form a stitched sub-pole.Type: GrantFiled: June 5, 2000Date of Patent: July 9, 2002Assignee: Headway Technologies, Inc.Inventors: Hsiang-Yi Wei, Yi-Ting Yao, Eiki Narumi, Chyu-Jiuh Torng, Cherng-Chyi Han
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Patent number: 6383944Abstract: By forming a lift-off resist pattern on a surface of a first layer, forming a second layer over the first layer surface including the resist pattern, removing the resist pattern to partially expose the first layer surface, and etching the exposed area of the first layer, a micropattern having a high resolution of 0.3 &mgr;m or less and improved dimensional control is obtained.Type: GrantFiled: October 13, 1999Date of Patent: May 7, 2002Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Tomoyoshi Furihata, Hideto Kato, Satoshi Okazaki
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Publication number: 20020020053Abstract: This invention uses large surface to volume ratio materials for separation, release layer, and sacrificial material applications. The invention outlines the material concept, application designs, and fabrication methodologies. The invention is demonstrated using deposited column/void network materials as examples of large surface to volume ratio materials. In a number of the specific applications discussed, it is shown that it is advantageous to create structures on a laminate on a mother substrate and then, using the separation layer material approach, to separate this laminate from the mother substrate using the present separation scheme. It is also shown that the present materials have excellent release layer utility. In a number of applications it is also shown how the approach can be used to uniquely form cavities, channels, air-gaps, and related structures in or on various substrates.Type: ApplicationFiled: April 17, 2001Publication date: February 21, 2002Inventors: Stephen J. Fonash, Wook Jun Nam, Youngchul Lee, Kyuhwan Chang, Daniel J. Hayes, A. Kaan Kalkan, Sanghoon Bae
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Publication number: 20020011460Abstract: A method for making a magnetic sensor for a disk drive read head, the method comprising the steps of depositing a magnetoresistive stack on a surface of a first layer of material, depositing a resist layer on a first portion of the magnetoresistive stack, removing a second portion of the magnetoresistive stack not covered by the resist layer, depositing a layer of additional material on the magnetoresistive stack, the resist material, and the surface of the first layer, removing the additional material from sidewalls of the resist material, and using a lift-off process to remove the resist material. Magnetic sensors made by the above process are also included.Type: ApplicationFiled: July 26, 2001Publication date: January 31, 2002Inventors: Michael Allen Seigler, Andrew Robert Eckert
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Patent number: 6305840Abstract: Thermopile detector and method for fabricating the same, the method including the steps of (1) forming a diaphragm film on a substrate, (2) forming thermocouples in a given region on the diaphragm film, (3) forming a protection film on the thermocouples, (4) forming a photoresist on the protection film and removing the photoresist from a given region, (5) forming a black body on an entire surface including the photoresist and removing the remaining photoresist and the black body on the photoresist, and (6) removing a portion of the substrate from a given region of a back-side of the substrate, to expose the diaphragm film, thereby facilitating a compatibility of fabrication process with an existing semiconductor fabrication process#(a CMOS fabrication process), whereby improving a mass production capability, preventing a damage to the diaphragm film occurred in formation of the black body, and controlling a property of the black body uniform.Type: GrantFiled: February 10, 1999Date of Patent: October 23, 2001Assignee: LG Electronics Inc.Inventors: Insik Kim, Taeyoon Kim
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Patent number: 6296777Abstract: A layer is structured by first applying a sacrificial layer on the layer to be structured, forming a mask with an inorganic material on the sacrificial layer, then patterning the sacrificial layer and the layer to be structured through the mask, and, finally, removing the sacrificial layer and the mask.Type: GrantFiled: August 3, 1998Date of Patent: October 2, 2001Assignee: Infineon Technologies AGInventors: Manfred Engelhardt, Volker Weinrich
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Publication number: 20010019036Abstract: A method of patterning a thin film includes a step of forming at least one strippable conductive film on a surface of a thin film to be patterned, a step of forming a mask on the at least one strippable conductive film, a step of patterning the thin film to be patterned by dry etching using the mask, and a step of removing the at least one strippable conductive film.Type: ApplicationFiled: April 10, 2001Publication date: September 6, 2001Inventor: Akifumi Kamijima
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Publication number: 20010013501Abstract: There are provided methods of making hardmask assemblies or other layered structures, and other masks, including providing an annular seal member between a first surface of layered structure, preferably a hardmask assembly, and a first clamp element, the hardmask assembly comprising at least a hardmask layer; and applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element In addition, there are provided methods further comprising etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member. Furthermore, there are provided methods further comprising etching the substrate layer through the hardmask layer and/or removing the hardmask layer after etching the substrate layer.Type: ApplicationFiled: March 27, 2001Publication date: August 16, 2001Inventor: J. Brett Rolfson
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Patent number: 6256849Abstract: A method for fabricating a microactuator for an inkjet head, which achieves easy formation of oxide piezoelectric elements and upper electrodes having desired patterns, using a patterning process mainly used in the fabrication of semiconductor devices. The method includes the steps of sequentially laminating a vibrating plate, a lower electrode, an oxide piezoelectric sheet, and an electrode layer, patterning the electrode layer, thereby forming upper electrodes of a desired pattern, and patterning the oxide piezoelectric sheet in accordance with an etching process while using the upper electrodes as a mask, thereby forming oxide piezoelectric elements of a desired pattern.Type: GrantFiled: December 18, 1998Date of Patent: July 10, 2001Assignee: Samsung Electro-Mechanics., Ltd.Inventor: Il Kim
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Patent number: 6251297Abstract: A method of manufacturing a polarizing plate of a resonance absorption effect type wherein plural bar-like polarizing members are arranged in a light-transmittable polarizing matrix layer with major axes thereof orienting in a constant direction. The method includes a preparing process of a forming die for preparing a forming die having a concavoconvex pattern corresponding to a layout pattern of the bar-like polarizing members, a forming process of a concavoconvex pattern on a resin layer for forming a resin layer directly or indirectly on a substrate and pressing the forming die onto the resin layer so as to form a concavoconvex pattern on the resin layer, a forming process of bar-like polarizing members for forming the bar-like polarizing members in the foregoing layout pattern using the concavoconvex pattern of the resin layer, and a forming process of a polarizing matrix layer for forming the light-transmittable polarizing matrix layer so as to bury the formed bar-like polarizing members.Type: GrantFiled: December 9, 1998Date of Patent: June 26, 2001Assignee: TDK CorporationInventors: Eiju Komuro, Tohru Kineri
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Patent number: 6228276Abstract: A method for forming a magnetoresistive (MR) sensor element. There is first provided a substrate. There is then formed over the substrate a seed layer. There is then formed contacting a pair of opposite ends of the seed layer a pair of patterned conductor lead layer structures. There is then etched, while employing an ion etch method, the seed layer and the pair of patterned conductor lead layer structures to form an ion etched seed layer and a pair of ion etched patterned conductor lead layer structures. Finally, there is then formed upon the ion etched seed layer and the pair of ion etched patterned conductor lead layers structures a magnetoresistive (MR) layered structure. Within the magnetoresistive (MR) sensor element, the pair of patterned conductor lead layer structures may be formed within a pair of recesses within an ion etch recessed dielectric isolation layer.Type: GrantFiled: February 5, 1999Date of Patent: May 8, 2001Assignee: Headway Technologies, Inc.Inventors: Kochan Ju, Jei-Wei Chang, Cheng T. Horng
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Patent number: 6117344Abstract: Methods for fabricating nano-structured surfaces having geometries in which the passage of elementary particles through a potential barrier is enhanced are described. The methods use combinations of electron beam lithography, lift-off, and rolling, imprinting or stamping processes.Type: GrantFiled: March 20, 1998Date of Patent: September 12, 2000Assignee: Borealis Technical LimitedInventors: Isaiah Watas Cox, Avto Tavkhelidze, Jonathan Sidney Edelson, Stuart Harbron