Mechanically Forming Pattern Into A Resist Patents (Class 216/44)
  • Patent number: 6936181
    Abstract: The current invention is directed to a method of patterning a surface or layer in the fabrication of a micro-device. In accordance with a preferred embodiment of the invention, a first mask structure is formed by depositing a layer of a first material onto the surface or layer and embossing the layer with a micro-stamp structure. The layer is preferably embossed as a liquid, which is solidified or cured to form the first mask structure. The first mask structure can be used as an etch-stop mask which is removed in a subsequent processing step or, alternatively, the first mask structure can remain a functional layer of the micro-device. In further embodiments, unmasked regions of the surface or layer are chemically treated through the first mask structure and/or a second material is deposited onto the unmasked regions of the surface or layer through the first mask structure to form a second mask structure and/or a second functional layer of the micro-device.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: August 30, 2005
    Assignee: Kovio, Inc.
    Inventors: Colin Bulthaup, Chris Spindt
  • Patent number: 6909998
    Abstract: The present invention provides a method for in-situ real-time monitoring of mold deformation by using a database to store temporary information during the following steps: (a) providing a mark on the mold body that is easy to observe in order to monitor the mold deformation, (b) installing a signal source and a monitor device for monitoring the deformation quantity on the mold, (c) transforming the above deformation quantity into computer signals for storing in the database and (d) issuing controlling or warning signals to the imprinting machine based on the processing results of the stored information in the database.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: June 21, 2005
    Inventors: Hong Hocheng, Chin Chung Nien
  • Patent number: 6890688
    Abstract: This invention relates to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10, 110, 210) is formed having a substrate (12, 112, 212) and a charge dissipation layer (20, 120, 220), and a patterned imageable relief layer, (16, 116, 216) formed on a surface (14, 114, 214) of the substrate (10, 110, 210) using radiation. The template (10, 110, 210) is used in the fabrication of a semiconductor device (344) for affecting a pattern in the device (344) by positioning (338) the template (10, 11, 210) in close proximity to semiconductor device (344) having a radiation sensitive material (334) formed thereon and applying a pressure (340) to cause the radiation sensitive material to flow into the relief image present on the template (10, 110, 210).
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: May 10, 2005
    Assignees: Freescale Semiconductor, Inc., University of Texas System
    Inventors: David P. Mancini, Douglas J. Resnick, Carlton Grant Willson
  • Patent number: 6875695
    Abstract: A master wafer is replicated by creating a mold by plating a nickel electroform on a surface of a silicon wafer. Thereafter, a child wafer is prepared with a layer of photoresist or similar material that is compatible with plasma-etching techniques. Thereafter, the mold shape is transferred to the photoresist through compression molding, thereafter the child wafer is etched.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: April 5, 2005
    Assignee: Mems Optical Inc.
    Inventors: John S. Harchanko, Michele Banish
  • Patent number: 6872320
    Abstract: A method and system for masking a surface to be etched is described. A droplet source ejects droplets of a masking material for deposit on a thin-film or other substrate surface to be etched. The temperature of the thin-film or substrate surface is controlled such that the droplets rapidly freeze upon contact with the thin-film or substrate surface. The thin-film or substrate is then etched. After etching the masking material is removed.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: March 29, 2005
    Assignee: Xerox Corporation
    Inventors: William S. Wong, Robert A. Street, Stephen D. White, Robert Matusiak, Raj B. Apte
  • Patent number: 6841082
    Abstract: A method of manufacturing Er-doped silicon nano-dot arrays and a laser ablation apparatus are provided. In the method, a target having a silicon region and an erbium region is prepared. A silicon substrate is introduced opposite to the target. Laser light is irradiated onto the target, a plume containing silicon ablated from the silicon region and erbium ablated from the erbium region is generated, and an Er-doped silicon film is deposited on the silicon substrate from the plume. The Er-doped silicon film is patterned.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: January 11, 2005
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeong-sook Ha, Kyoung-wan Park, Seung-min Park, Jong-hyurk Park
  • Patent number: 6824699
    Abstract: This invention relates to a method of heating an insulating layer, such as is found in semiconductor devices, in which a formation has been etched through a layer of resist comprising reactive etching the resist, inhibiting absorption of or removing water vapour and/or oxygen at the exposed surfaces of the etched formation and filling the formation with conductive metal in the absence of said water vapour and/or oxygen.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: November 30, 2004
    Assignee: Trikon Holdings Ltd.
    Inventor: Christopher David Dobson
  • Patent number: 6814879
    Abstract: A method of forming a pattern, which comprises forming a first resist film on a surface of a substrate, patterning the first resist film to form a first resist pattern, and forming a covering layer containing silicon or a metal on the first resist pattern by making use of a coating method using a solution containing a solvent which is incapable of dissolving the first resist.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: November 9, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Shibata
  • Patent number: 6811656
    Abstract: A method for creating a material library of surface areas having different properties in which a substrate is coated. The substrate is subjected to a combined pretreatment procedure.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: November 2, 2004
    Assignee: Robert Bosch GmbH
    Inventors: Thomas Brinz, Ilona Ullmann
  • Patent number: 6813077
    Abstract: A method for fabricating an integrated optical isolator includes depositing a wire grid material on a magneto-optical substrate and depositing a resist film on the wire grid material. The method further includes bringing a mold with a wire grid pattern on contact with the resist film and compressing the mold and resist film together so as to emboss the wire grid pattern in the resist film. The method further includes transferring the wire grid pattern in the resist film to the wire grid material on the magneto-optical substrate by etching.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: November 2, 2004
    Assignee: Corning Incorporated
    Inventors: Nicholas F. Borrelli, David G. Grossman, Kenjro Hasui, Tamio Kosaka, Nick J. Visovsky
  • Publication number: 20040182820
    Abstract: A pillar with a high aspect ratio is transferred by a nanoprinting method. In order to form a fine structure on a substrate, a nanoprinting apparatus heats and presses the substrate and a mold with a fine concave-convex pattern formed thereon, the mold having a mechanism for transferring and applying a mold-releasing agent. A method for transferring a fine structure using the aforementioned nanoprinting apparatus.
    Type: Application
    Filed: March 17, 2004
    Publication date: September 23, 2004
    Inventors: Shigehisa Motowaki, Akihiro Miyauchi, Masahiko Ogino, Kosuke Kuwabara
  • Patent number: 6770188
    Abstract: A structural body material layer is formed directly on a base substrate or via a sacrificing layer or a peeling layer, a groove is fabricated electrochemically along an outer configuration shape of a part constituting an object at the structural body material layer and thereafter, only the sacrificing layer or the base substrate is selectively removed or the part is mechanically separated from the peeling layer to thereby separate the part and the base substrate and provide the part constituting the object or fabricate a part having a movable portion by partially restricting a portion to be separated.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: August 3, 2004
    Assignee: Seiko Instruments Inc.
    Inventors: Masayuki Suda, Naoya Watanabe, Kazuyoshi Furuta
  • Patent number: 6755984
    Abstract: A micro-casted silicon carbide nano-imprinting stamp and method of making a micro-casted silicon carbide nano-imprinting stamp are disclosed. A micro-casting technique is used to form a foundation layer and a plurality of nano-sized features connected with the foundation layer. The foundation layer and the nano-sized features are unitary whole that is made entirely from a material comprising silicon carbide (SiC) which is harder than silicon (Si) alone. As a result, the micro-casted silicon carbide nano-imprinting stamp has a longer service lifetime because it can endure several imprinting cycles without wearing out or breaking. The longer service lifetime makes the micro-casted silicon carbide nano-imprinting stamp economically feasible to manufacture as the manufacturing cost can be recouped over the service lifetime.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: June 29, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Heon Lee, Gun-Young Jung
  • Patent number: 6719915
    Abstract: A method of forming a relief image in a structure comprising a substrate and a transfer layer formed thereon comprises covering the transfer layer with a polymerizable fluid composition, and then contacting the polymerizable fluid composition with a mold having a relief structure formed therein such that the polymerizable fluid composition fills the relief structure in the mold. The polymerizable fluid composition is subjected to conditions to polymerize polymerizable fluid composition and form a solidified polymeric material therefrom on the transfer layer. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material; and the transfer layer and the solidified polymeric material are subjected to an environment to selectively etch the transfer layer relative to the solidified polymeric material such that a relief image is formed in the transfer layer.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: April 13, 2004
    Assignee: Board of Regents, The University of Texas System
    Inventors: Carlton Grant Willson, Matthew Earl Colburn
  • Publication number: 20030209517
    Abstract: A maskant plate is described which allows for protection of textured, diffusion-hardened surfaces on prosthetic devices while not interfering with common post-oxidation mass finishing procedures which are often used to form the finished product after surface oxidation.
    Type: Application
    Filed: May 8, 2002
    Publication date: November 13, 2003
    Inventors: Brian McGehee, Les Darby
  • Publication number: 20030201248
    Abstract: This invention relates to a method of heating an insulating layer, such as is found in semiconductor devices, in which a formation has been etched through a layer of resist comprising reactive etching the resist, inhibiting absorption of or removing water vapour and/or oxygen at the exposed surfaces of the etched formation and filling the formation with conductive metal in the absence of said water vapour and/or oxygen.
    Type: Application
    Filed: May 16, 2003
    Publication date: October 30, 2003
    Inventor: Christopher David Dobson
  • Publication number: 20030141017
    Abstract: A plasma processing apparatus has a process chamber, an upper electrode, a susceptor which can elevate up and down and serves as a lower electrode and on which a work is placed, a feeder bar connected to an upper surface of the upper electrode and an insulating film formed on the feeder bar and the upper surface of the upper electrode, a bellows which is connected at one end to the susceptor and at the other end to a bottom portion of the process chamber and maintain the vacuum state inside the process chamber. The insulating film has a porous structure formed by thermal-spraying insulating material, e.g., PTFE toward the feeder bar and the upper electrode. The bellows is formed of high purity aluminum or nickel.
    Type: Application
    Filed: January 30, 2003
    Publication date: July 31, 2003
    Applicant: Tokyo Electron Limited
    Inventor: Toshiaki Fujisato
  • Patent number: 6592770
    Abstract: This invention relates to a method of heating an insulating layer, such as is found in semiconductor devices, in which a formation has been etched through a layer of resist comprising reactive etching the resist, inhibiting absorption of or removing water vapor and/or oxygen at the exposed surfaces of the etched formation and filling the formation with conductive metal in the absence of said water vapor and/or oxygen.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: July 15, 2003
    Assignee: Trikon Holdings Limited
    Inventor: Christopher David Dobson
  • Patent number: 6558733
    Abstract: An implantable prosthesis, for example a stent, is provided having one or more micropatterned microdepots formed in the stent. Depots are formed in the prosthesis via chemical etching and laser fabrication methods, including combinations thereof. They are formed at preselected locations on the body of the prosthesis and have a preselected depth, size, and shape. The depots can have various shapes including a cylindrical, a conical or an inverted-conical shape. Substances such as therapeutic substances, polymeric materials, polymeric materials containing therapeutic substances, radioactive isotopes, and radiopaque materials can be deposited into the depots.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: May 6, 2003
    Assignee: Advanced Cardiovascular Systems, Inc.
    Inventors: Syed F. A. Hossainy, Li Chen
  • Publication number: 20030080472
    Abstract: The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula:
    Type: Application
    Filed: September 16, 2002
    Publication date: May 1, 2003
    Inventor: Stephen Y. Chou
  • Publication number: 20030080471
    Abstract: The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula:
    Type: Application
    Filed: September 16, 2002
    Publication date: May 1, 2003
    Inventor: Stephen Y. Chou
  • Publication number: 20030034329
    Abstract: The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula:
    Type: Application
    Filed: September 16, 2002
    Publication date: February 20, 2003
    Inventor: Stephen Y. Chou
  • Publication number: 20020167117
    Abstract: The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula:
    Type: Application
    Filed: October 29, 2001
    Publication date: November 14, 2002
    Applicant: Regents of the University of Minnesota
    Inventor: Stephen Y. Chou
  • Patent number: 6473966
    Abstract: A printer head substrate having a silicon substrate on which heat generating elements and partitions are formed and an orifice plate which adhered to the partitions is placed on a stage of a helicon-wave dry etching system. Helicon-wave dry etching is performed while cooling the printer head substrate by allowing a coolant gas to be intervened between the substrate and the stage. This allows multiple orifices of a desired and adequate shape to be simultaneously and quickly bored in the orifice plate even if a thin film sheet having adhesive layers adhered to both sides thereof is used as the orifice plate, thereby improving the working efficiency.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: November 5, 2002
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ichiro Kohno, Junji Shiota, Hideki Kamada, Satoshi Kanemitsu, Yoshihiro Kawamura
  • Publication number: 20020113034
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: August 22, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Publication number: 20020096491
    Abstract: The present invention provides a method and apparatus for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including backgrinding in particular. The present method comprises reducing the cross-section of a wafer or device, applying a tape having optical energy-markable properties over a surface or edge of the wafer or device, and exposing the tape to an optical energy source to create an identifiable mark. A method for manufacturing an integrated circuit chip and for identifying a known good die are also disclosed. The apparatus of the present invention comprises a multi-level laser-markable tape for application to a bare semiconductor die. In the apparatus, an adhesive layer of the tape provides a homogenous surface for marking subsequent to exposure to electro-magnetic radiation.
    Type: Application
    Filed: March 6, 2002
    Publication date: July 25, 2002
    Inventors: William D. Tandy, Bret K. Street
  • Publication number: 20020084242
    Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.
    Type: Application
    Filed: November 2, 2001
    Publication date: July 4, 2002
    Applicant: Kionix, Inc.
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin, Kevin A. Shaw, Paul C. Waldrop, Sharlene A. Wilson
  • Publication number: 20020084252
    Abstract: New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 4, 2002
    Inventors: Stephen L. Buchwalter, Gareth Geoffrey Hougham, Kang-Wook Lee, John J. Ritsko, Mary Elizabeth Rothwell, Peter M. Fryer
  • Patent number: 6387290
    Abstract: A microfilter utilizing the principles of tangential flow to prevent clogging, and sloped channel sides to overcome surface tension effects is provided which has feed inlet and exit connected by a feed flow channel; a barrier channel parallel to the feed flow channel, and a filtrate collection channel parallel to the barrier channel so that liquid can flow from the feed flow channel through the barrier channel which is too small to accommodate the particles, into the filtrate collection channel, and from then through a filtrate flow channel to a filtrate exit. Several picoliters of cell-free plasma are recovered from one drop of blood for analysis.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: May 14, 2002
    Assignee: University of Washington
    Inventors: James P. Brody, Thor D. Osborn
  • Patent number: 6387771
    Abstract: A method for forming a valve metal oxide for semiconductor fabrication in accordance with the present invention is disclosed and claimed. The method includes the steps of providing a semiconductor wafer, depositing a valve metal on the wafer, placing the wafer in an electrochemical cell such that a solution including electrolytes interacts with the valve metal to form a metal oxide when a potential difference is provided between the valve metal and the solution and processing the wafer using the metal oxide layer.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: May 14, 2002
    Assignee: Infineon Technologies AG
    Inventors: Oliver Genz, Alexander Michaelis
  • Publication number: 20020036183
    Abstract: A method of forming a pattern, which comprises forming a first resist film on a surface of a substrate, patterning the first resist film to form a first resist pattern, and forming a covering layer containing silicon or a metal on the first resist pattern by making use of a coating method using a solution containing a solvent which is incapable of dissolving the first resist.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 28, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi Shibata
  • Patent number: 6334960
    Abstract: A method of forming a relief image in a structure comprising a substrate and a transfer layer formed thereon comprises covering the transfer layer with a polymerizable fluid composition, and then contacting the polymerizable fluid composition with a mold having a relief structure formed therein such that the polymerizable fluid composition fills the relief structure in the mold. The polymerizable fluid composition is subjected to conditions to polymerize polymerizable fluid composition and form a solidified polymeric material therefrom on the transfer layer. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material; and the transfer layer and the solidified polymeric material are subjected to an environment to selectively etch the transfer layer relative to the solidified polymeric material such that a relief image is formed in the transfer layer.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: January 1, 2002
    Assignee: Board of Regents, The University of Texas System
    Inventors: Carlton Grant Willson, Matthew Earl Colburn
  • Publication number: 20010046343
    Abstract: The invention relates to a method of manufacturing an indiffused optical waveguide (6) in a substrate (1). A metal layer (7) and photoresist (8) are deposited on a substrate (1) in this order. Portions of the photoresist (8) are removed such that a photoresist structure (8) corresponding to the desired waveguide structure is left. The exposed portions of the metal layer (7) are removed by a chemical/physical etching technique whereafter the remaining photoresist (8) is removed and the remaining metal layer (7) is diffused into the substrate (1) by a heat treatment. The usage of a chemical/physical etching method for removing portions of the metal layer (7) results in smaller variations in the width of the waveguide after indiffusion. Such waveguides are particularly advantageous when being used in connection with acousto-optical devices. The optical waveguides according to the invention are also useable with other integrated optics devices.
    Type: Application
    Filed: June 12, 2001
    Publication date: November 29, 2001
    Applicant: Pirelli Cavi E SISTEMI S.p.A.
    Inventor: Carlo Carmannini
  • Patent number: 6309580
    Abstract: The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula: RELEASE-M(X)n−1— RELEASE-M(X)n−m−1 Qm, or RELEASE-M(OR)n−1—, wherein RELEASE is a molecular chain of from 4 to 20 atoms in length, preferably from 6 to 16 atoms in length, which molecule has either polar or non-polar properties; M is a metal atom, semiconductor atom, or semimetal atom; X is halogen or cyano, especially Cl, F, or Br; Q is hydrogen or alkyl group; m is the number of Q groups; R is hydrogen, alkyl or phenyl, preferably hydrogen or alkyl of 1 to 4 carbon atoms; and; n is the valence −1 of M, and n−m−1 is at least 1 provides good release properties.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: October 30, 2001
    Assignee: Regents of the University of Minnesota
    Inventor: Stephen Y. Chou
  • Patent number: 6251297
    Abstract: A method of manufacturing a polarizing plate of a resonance absorption effect type wherein plural bar-like polarizing members are arranged in a light-transmittable polarizing matrix layer with major axes thereof orienting in a constant direction. The method includes a preparing process of a forming die for preparing a forming die having a concavoconvex pattern corresponding to a layout pattern of the bar-like polarizing members, a forming process of a concavoconvex pattern on a resin layer for forming a resin layer directly or indirectly on a substrate and pressing the forming die onto the resin layer so as to form a concavoconvex pattern on the resin layer, a forming process of bar-like polarizing members for forming the bar-like polarizing members in the foregoing layout pattern using the concavoconvex pattern of the resin layer, and a forming process of a polarizing matrix layer for forming the light-transmittable polarizing matrix layer so as to bury the formed bar-like polarizing members.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: June 26, 2001
    Assignee: TDK Corporation
    Inventors: Eiju Komuro, Tohru Kineri
  • Publication number: 20010004065
    Abstract: A process of manufacturing a roll punch used for forming the partition walls on the rear panel of a PDP is disclosed. In the process of this invention, a forming roll is primarily coated with a mask on its external surface. The mask is, thereafter, partially removed from the forming roll, thus forming a plurality of regularly spaced mask-free parts on the forming roll. The forming roll is, thereafter, etched at the mask-free parts using ultrasonic waves within an etching tank, and so a desired roll punch having partition wall forming grooves is produced. This manufacturing process enlarges the width of the lands between the forming grooves of the roll punch, thus allowing an easy arrangement of address electrodes on the rear panel of a PDP. It is also possible to produce a desired highly precise roll punch by properly adjusting the intervals between the mask-free parts of the forming roll.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 21, 2001
    Inventors: Sang Jin Oh, Bong Hyang Kim, Deok Hwan Kim
  • Publication number: 20010002337
    Abstract: In one aspect, the invention provides a method of exposing a material from which photoresist cannot be substantially selectively removed utilizing photoresist. In one preferred implementation, a first material from which photoresist cannot be substantially selectively removed is formed over a substrate. At least two different material layers are formed over the first material. Photoresist is deposited over the two layers and an opening formed within the photoresist over an outermost of the two layers. First etching is conducted through the outermost of the two layers within the photoresist opening to outwardly expose an innermost of the two layers and form an exposure opening thereto. After the first etching, photoresist is stripped from the substrate. After the stripping, a second etching is conducted of the innermost of the two layers within the exposure opening.
    Type: Application
    Filed: December 26, 2000
    Publication date: May 31, 2001
    Inventors: Gurtej S. Sandhu, Shubneesh Batra
  • Patent number: 6214246
    Abstract: Apparatus for optical analysis of a sample material includes a channel block incorporating microfabricated channels and an integral gel material. Illuminating optics direct light to the sample material and light reflected from, refracted by and/or emitted by the sample is collected by collection optics for detection. The gel material is formed within the channels and includes multiple closely spaced pillars to form a porous separator for sample material to be analyzed.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: April 10, 2001
    Assignee: Cornell Research Foundation
    Inventor: Harold G. Craighead
  • Patent number: 6045715
    Abstract: Method of providing a pattern of apertures and/or cavities in, for example, a glass duct plate of a plasma-addressed liquid crystal display, in which first a mechanical treatment is performed (for example, by means of powder blasting) and then a wet-chemical etching treatment is performed to render the walls of the ducts microscopically less rough so that the optical disturbance is reduced and the glass becomes clearer again.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: April 4, 2000
    Assignee: U.S. Philips Corporation
    Inventors: Gijsbertus A. C. M. Spierings, Poul K. Larsen, Jan B. P. H. Van der Putten, Johannes M. M. Busio, Frederik H. In 'T Veld, Lambertus Postma
  • Patent number: 5972234
    Abstract: The present invention discloses a method for marking an electronic substrate without the splatter or debris defect which can be carried out by first providing a tape, then creating a cavity or a mark through the tape by a high-intensity energy beam or any other suitable mechanical means such that the tape can be laminated to a top surface of the substrate and exposed to an etchant until a similar mark in the substrate is reproduced by the etching process. After the tape is removed, the mark is reproduced in the surface of the electronic substrate.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: October 26, 1999
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Yao Weng, Yu-Chi Lin
  • Patent number: 5817242
    Abstract: A hybrid stamp structure for lithographic processing of features below 1 micron is described, comprising a deformable layer (14) for accommodating unevenness of the surface of a substrate, and a patterned layer on the deformable layer in which a lithographic pattern is engraved. The stamp structure is further enhanced by comprising a third layer (16), which acts as rigid support for the stamp, thus preventing an undesired deformation of the stamp under load.
    Type: Grant
    Filed: August 1, 1996
    Date of Patent: October 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: Hans Andre Biebuyck, Bruno Michel
  • Patent number: 5800723
    Abstract: A process (200) for fabricating a flex circuit (708, 806, 812, 818 or 824) using a fabrication process without the use of a photomask includes the steps of generating (412) an electronic image (702 or 802) of circuit traces (704 or 804) representing at least a single-sided flex circuit, and selectively thermal transferring (506 or 606) a resin to either a conductively clad or non-conductive flexible substrate (304) under the control of the electronic image (702 or 802) to form either an etch resist or a conductor which defines the circuit traces (704 or 804). The conductively clad flexible substrate (304) is etched to form the circuit traces (704 or 804) of the flex circuit defined by the etch resist, after which the etch resist is removed.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: September 1, 1998
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Douglas W. Hendricks, Sally A. Stallings
  • Patent number: 5772905
    Abstract: A lithographic method and apparatus for creating ultra-fine (sub-25 nm) patterns in a thin film coated on a substrate is provided, in which a mold having at least one protruding feature is pressed into a thin film carried on a substrate. The protruding feature in the mold creates a recess of the thin film. The mold is removed from the film. The thin film then is processed such that the thin film in the recess is removed exposing the underlying substrate. Thus, the patterns in the mold is replaced in the thin film, completing the lithography. The patterns in the thin film will be, in subsequent processes, reproduced in the substrate or in another material which is added onto the substrate.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: June 30, 1998
    Assignee: Regents of the University of Minnesota
    Inventor: Stephen Y. Chou
  • Patent number: 5693364
    Abstract: The present invention relates to a process for the manufacture of printed circuit boards. The method contemplates a novel processing sequence for this manufacturing process which method is particularly versatile in reducing the number of steps and variety of chemicals currently necessary to produce the circuit boards.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: December 2, 1997
    Assignee: Mac Dermid, Incorporated
    Inventor: Peter Kukanskis
  • Patent number: 5527662
    Abstract: In a process using a single-layer or multi-layer resist, by using a resist material comprising an acid-decomposable polymer, an acid generator and a conducting polymer or a resist material comprising a monomer to be made reactive by an acid, an acid generator and a conducting polymer, there can be formed a fine pattern precisely without inviting charging during charged beam writing.
    Type: Grant
    Filed: January 24, 1994
    Date of Patent: June 18, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiko Hashimoto, Noboru Nomura
  • Patent number: 5425848
    Abstract: A description is given of a method and a device (1) for providing (replicating) a patterned resyntetic resin relief (37) on the surface (25) of a glass substrate (27). For this purpose, a UV-curable acrylate lacquer (33) is applied to the surface (25), after which a transparent mould (3) having a relief (13) is rolled-off over the surface (25). By means of a UV light source (17) and an elliptic mirror (21), the lacquer is cured at the location of the focal line (23), thereby forming said relief (37). The relief (13) of the mould (3) is replicated on the glass substrate (27). The method described enables a relief of small dimensions (10.times.10 .mu.m) to be seamlessly provided on a large fiat surface (1.times.1 m), without being hindered by large release forces.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: June 20, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Jan Haisma, Martinus Verheijen, Johannes T. Schrama