Abstract: A power semiconductor component includes a semiconductor body having a beed peripheral surface, a cathode electrode and an anode electrode. A materially joined connection between at least the anode electrode and the semiconductor body is not produced by alloying. The anode electrode has a diameter being greater than the cathode electrode and smaller than the semiconductor body.

Abstract: A semiconductor device includes a plurality of defect layers separated from one another in the semiconductor layer. A distance separating any adjacent ones of the defect layers is kept such that they are prevented from contacting each other and those regions having effect of shortening a carrier lifetime overlap each other.

Abstract: A bistable SCR-like switch (41) protects a signal line (65) of an SOI integrated circuit (40) against damage from ESD events. The bistable SCR-like switch (41) is provided by a first and a second transistors (42 and 44) which are formed upon the insulator layer (46) of the SOI circuit (40) and are separated from one another by an insulating region (60). Interconnections (62 and 64) extend between the two transistors (42 and 44) to connect a P region (62) of a first transistor (42) to a P region (54) of the second transistor (44) and an N region (50) of the first transistor (42) to an N region (58) of the second transistor (44). The transistors (42 and 44) may be either bipolar transistors or enhancement type MOSFET transistors. For bipolar transistors, the base of an NPN transistor (42) is connected to the collector of a PNP transistor (44) and the base of the PNP transistor (44) is connected to the collector of the NPN transistor (42).

Abstract: The present invention relates to an assembly of two pairs of diodes in a single semiconductor substrate of a first type of conductivity, the first pair including a first diode in series with a second diode, the second pair including a third diode in series with a fourth diode, the two pairs of diodes being arranged in parallel. Each of the first and third diodes includes neighboring regions of distinct types of conductivity formed in a lightly-doped well of the second type of conductivity, these wells being separated; each of the second and fourth diodes includes separated regions of distinct types of conductivity; and metallizations connect the electrodes of the diodes to form the desired series-to-parallel assembly.

Abstract: The present invention relates to a bidirectional breakover component including a lightly-doped N-type substrate, an upper P-type region extending over practically the entire upper surface of the component except its circumference, a lower P-type uniform layer on the lower surface side of the component, substantially complementary N-type regions respectively formed in the upper region and in the lower layer, a peripheral P-type well, an overdoped P-type region at the upper surface of the well, and lightly-doped N-type regions between the circumference of the upper region and the well.

Abstract: In a semiconductor device, such as a diode and thyristor, having at least one pn junction between a pair of main surfaces, a first main electrode formed on the surface of one of the main surfaces and a second main electrode formed on the surface of the other one of the main surfaces, a semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of the carrier density in the conduction state can be flattened, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.

Abstract: In a diode, the backward length L of an anode electrode in a region, where a semiconductor layer of a p.sup.+ conductivity type and an anode electrode do not contact each other, is made longer than the diffusion length of holes in a semiconductor layer of an n.sup.- conductivity type for obtaining a large critical di/dt.

Abstract: A protection semiconductor component includes at least two pairs of main Shockley diodes, each pair including two parallel diodes, head-to-tail connected between a front surface metallization and a rear surface metallization, the rear surface metallization being common to the two pairs of diodes. Each of the main diodes whose blocking junction corresponds to a distinct well on the side of the front surface is associated with at least one auxiliary Shockley diode having the same polarity and a lower triggering threshold, the triggering of one auxiliary diode thus causing the triggering of the other auxiliary diode and of the associated main Shockley diodes.

Abstract: A mesa-type semiconductor component including on at least one of its surfaces, in addition to a circumferential ring constituted by a portion of a passivating glass layer, at least one pad constituted by a portion of this layer and acting as a spacer.

Abstract: An SCR circuit formed on a semiconductor substrate includes a well region, a first diffusion region and a second diffusion region in the well region, and a third diffusion region in the substrate. The SCR circuit also includes a capacitor connected between the first diffusion region and the third diffusion region. The junction region between the well region and the diffusion region is forward biased when an electrostatic force is applied to the SCR circuit, thereby triggering the SCR circuit to discharge the electrostatic force.

Abstract: An light emitting diode of indium gallium aluminum phosphide with a substrate, an electrical contact to the substrate, a dual hetero structure as a active zone comprising a first cladding layer, an active layer and a second cladding layer to which, a window layer is applied, and to which in turn, an electrical contact is applied. This window layer is made of gallium aluminum phosphide.

Abstract: A gateless thyristor or a gateless triac with shorting holes having a sharp switching threshold and a high current value I.sub.H includes, a first area having a first density of shorting holes and a second area having a second density of shorting holes lower than the first density.

Abstract: A semiconductor device sets an impurity density of a p base layer in a bevel end-face region to a density lower than that in an operating region and has a parasitic channel preventive region provided between the bevel end-face region and the operating region. Since the blocking-voltage and the current-carrying capacity can be adjusted independently from each other, the blocking voltage and the current-carrying capacity can be both improved.

Abstract: A current limiter component constituted by a semiconductor bar or wafer doped in four layers (P, N, P, N) between its anode and cathode. The doping characteristics and the dimensional characteristics of the bar are adjusted to obtain a characteristic current to voltage curve which initially increases as voltage and current increases in the manner of a diode followed by a part constituting a current limiting plateau wherein the plateau reflects that the current remains fixed until the voltage reaches a breakdown voltage.

Abstract: In a Schottky barrier diode, concentration of an electrical field at an edge of an insulation layer is suppressed to improve the reverse breakdown voltage. An n- layer of a compound semiconductor substrate having an n+ layer and the n- layer is configured in the form of a mesa. An insulation layer is formed on at least a skirt portion and a slant portion of the mesa. An anode is formed on the insulation layer and n- layer, and a cathode is formed on the n+ layer. Thus, concentration of an electrical field at an edge of the insulation layer is canceled at least in part by an electrical field generated at the anode on the slant portion to improve the reverse breakdown voltage.

Abstract: A thyristor device includes first and second terminals, a PNPN thyristor structure including first P-region, a first N-region, a second P-region and a second N-region disposed in series between the first and second terminals, and an electrode for inducing an electric field into the second P-region. The induced electric field increases the number of charge carriers in the second P-region, and enables the device to be triggered at a lower voltage applied between the first and second terminals. The electrode includes an insulated gate, and can be connected to either the first or second terminal. The gate can include a thick field oxide layer, or a thin oxide layer to further reduce the triggering voltage. A differentiator including a capacitor connected between the first terminal and the electrode and a resistor connected between the second terminal and the electrode prevents false triggering during normal operation.

Abstract: A semiconductor device is fabricated which has reduced power dissipation when the device is turned on and runs cooler in surge suppressor applications. This result is achieved by fabricating a device where the breakdown action takes place preferentially under cathode region. The lower power dissipated during the turn-on action enables the device to operate in environmental conditions from -20.degree. C. to 65.degree. C.

Abstract: A thyristor type surge protector having a breakdown voltage V.sub.BO approximately equal to a surge clamping voltage V.sub.CL includes a P-type first semiconductor layer, an N-type second semiconductor layer provided in one surface of the first semiconductor layer, a P-type third semiconductor layer provided in the second semiconductor layer so as to provide at least one first exposed region of the second semiconductor layer, and an N-type fourth semiconductor layer formed in the other surface of the first semiconductor layer so as to provide at least one exposed region of said first semiconductor layer, a first electrode provided over the third semiconductor layer and of the first exposed region, and a second electrode provided over the fourth semiconductor layer and second exposed region.

Abstract: A gateless thyristor or a gateless triac with shorting holes having a sharp switching threshold and a high current value I.sub.H includes, a first area having a first density of shorting holes and a second area having a second density of shorting holes lower than the first density.

Abstract: This invention relates to an improved solid state suppressor and a method for making the same. Due to the fact that at least part of the substrate is substituted during fabrication of the suppressor, it is possible to produce a suppressor having a substrate which has an effective thickness that is less than the physical thickness of the slice. This allows for a good functioning suppressor which is unlikely to break during fabrication.

Abstract: An integrated power switch structure comprises a lateral MOS transistor (3) and a lateral or vertical thyristor (2). The drain-source path of the lateral MOS transistor (3) is in series with the cathode-anode path of the thyristor (2). In order to ensure that the power switch structure reliably switches on and off with great dielectric strength and low switch-on resistance, at least the source electrode of the lateral MOS transistor (3) is insulated against the substrate (7) by means of a buried oxide layer (8) in accordance with the present invention.

Abstract: An integrated circuit including a first device having respective input and output electrodes at opposed first and second faces of a semiconductor block in which the device is formed, and a second device, formed in the semiconductor block, having its respective input and output electrodes at the first and second faces of the semiconductor block, the electrodes at the first face of the semiconductor block intermingling with each other. In one form of the integrated circuit, the electrode of the first device at the first face of the semiconductor block includes a plurality of discrete contact areas distributed over substantially all of the first face, and the electrode of the second device at the first face includes a contact area which lies between the discrete contact areas.

Abstract: A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which comprises a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of one conductivity type provided on the first semiconductor layer, a third semiconductor layer of an opposite conductivity type having a depth D and formed in the second semiconductor layer to provide a pn junction therebetween, the third semiconductor layer defining a plurality of exposed regions of the second semiconductor layer, each of the plurality of exposed regions of the second semiconductor layer having a width W, a relation between the depth D and the width W being given by D.gtoreq.0.5W, and a metal electrode provided on the substrate surface.

Abstract: A monolithic protection component is formed in a P-type low-doped semiconductor substrate. The protection diode comprises, in an upper surface of the substrate, a first and a second N-type well with a mean doping level; at the surface of the first well, a first highly doped P region; at the surface of the second well, a second very highly doped N region; a third very highly doped N region laterally contacting the first well; a fourth highly-doped P region beneath a portion of the lower surface of the third region; a first metallization contacting the surface of the first and second regions which constitute the first diode terminal; and a second metallization coupled to a P-type area extending up to the fourth region and second well, which forms the second terminal of the diode. The protection component provides a unidirectional protection diode. Two of the protection components may be combined in a single structure to provide a bidirectional protection diode.

Abstract: The present invention comprises a semi-insulating layer of GaAs with p+ and layers of aluminum gallium arsenide AlGaAs grown on one side of the semi-insulating GaAs and with p and n+ layers of AlGaAs grown on the other side of the semi-insulating GaAs. Ohmic contacts are grown on both sides of the thyristor as well as low temperature GaAs to provide for surface passivity.

Abstract: A bidirectional two-terminal ungated thyristor (9) having two wide-base portions (25, 27). The bidirectional two-terminal ungated thyristor (9) has a first semiconductor device having a first narrow-base portion (28) in series with a first wide-base portion (25), and a second semiconductor device having a second narrow-base portion (26) in series with a second wide-base portion (27). A width of the first wide base portion (25) and a width of the second wide base portion (27) are decreased to decrease a total base width. The first and second wide-base portions (25, 27) having a decreased width produce a low forward voltage drop across the bidirectional two-terminal ungated thyristor (9); thus, improving a power dissipation capability of the bidirectional two-terminal ungated thyristor (9).