Abstract: A three-terminal avalanche photodiode provides a first controllable voltage drop across a light absorbing region and a second, independently controllable, voltage drop across a photocurrent amplifying region. The absorbing region may also have a different composition from the amplifying region, allowing further independent optimization of the two functional regions. An insulating layer blocks leakage paths, redirecting photocurrent toward the region(s) of highest avalanche gain. The resulting high-gain, low-bias avalanche photodiodes may be fabricated in integrated optical circuits using commercial CMOS processes, operated by power supplies common to mature computer architecture, and used for optical interconnects, light sensing, and other applications.

Abstract: A laser diode bar: includes a semiconductor substrate comprising a first semiconductor layer of a first conductivity type; a first laser diode stack on an upper side of the semiconductor layer; a second laser diode stack on the upper side of the semiconductor layer, the second laser diode stack being electrically connected in series with the first laser diode stack, in which an electrical conductivity of the first semiconductor layer of the first conductivity type is higher than an electrical conductivity of each semiconductor layer of the first and second laser diode stacks; and a first electrode layer on the first laser diode stack, in which the first electrode layer electrically connects the first laser diode stack to a portion of the first semiconductor layer of the first conductivity type that is between the first laser diode stack and the second laser diode stack.

Abstract: Disclosed herein is an apparatus comprising: an array of avalanche photodiodes (APDs) or an absorption region comprising a semiconductor single crystal such as a CdZnTe single crystal or a CdTe single crystal. The apparatus may be configured to absorb radiation particles incident on an absorption region of the APDs or the semiconductor single crystal and to generate charge carriers. The apparatus may comprise an electrode comprising silver nanoparticles and being electrically connected to the absorption region of the APDs or the semiconductor single crystal. For the APDs, each of the APDs may comprise an amplification region, which may comprise a junction with an electric field in the junction. The electric field may be at a value sufficient to cause an avalanche of charge carriers entering the amplification region, but not sufficient to make the avalanche self-sustaining. The junctions of the APDs may be discrete.

Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack.

Abstract: Provided are a semiconductor photodiode which achieves a higher response rate in a state in which light receiving sensitivity is maintained. The semiconductor photodiode includes a p-type semiconductor contact layer, an n-type semiconductor contact layer, and a light absorption layer. The light absorption layer includes a first semiconductor absorption layer having a thickness Wd and a p-type second semiconductor absorption layer having a thickness Wp. The first semiconductor absorption layer and the second absorption layer are made of the same composition. The first semiconductor absorption layer is depleted, and the second semiconductor absorption layer maintains an electric charge neutral condition except for a region near an interface with the first semiconductor absorption layer. A relationship between the thickness Wd and the thickness Wp satisfies 0.47?Wp/(Wp+Wd)?0.9.

Abstract: According to some implementations, an avalanche photodiode may include a photon absorbing layer to absorb photons of an optical beam and to provide a response. The avalanche photodiode may include a gain response layer to provide a gain to the response. The avalanche photodiode may include a bias control structure connected to the gain response layer to control an electric field in the photon absorbing layer and the gain response layer.

Abstract: A semiconductor crystal substrate includes a crystal substrate that is formed of a material including one of GaSb and InAs, a first buffer layer that is formed on the crystal substrate and formed of a material including GaSb, and a second buffer layer that is formed on the first buffer layer and formed of a material including GaSb. The first buffer layer has a p-type conductivity, and the second buffer layer has an n-type conductivity.

Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.

Abstract: An avalanche photodiode includes: a first contact layer; a light absorbing layer located on the first contact layer and having a multi-quantum well structure; a first electric field control layer located on the light absorbing layer; and a carrier multiplication layer located on the first electric field control layer. At least one of the multi-quantum well structure includes a well layer that includes Ga1-xAlxN (0?X?0.3), and a barrier layer that includes Ga1-xAlxN (0.7?X?1) and a doping portion doped with a p-type dopant.

Abstract: A semiconductor device comprises a semiconductor substrate and a semiconductor fin. The semiconductor substrate has an upper surface and a recess extending downwards into the semiconductor substrate from the upper surface. The semiconductor fin is disposed in the recess and extends upwards beyond the upper surface, wherein the semiconductor fin is directly in contact with semiconductor substrate, so as to form at least one semiconductor hetero-interface on a sidewall of the recess.

Abstract: An image sensor may include an array of image sensor pixels. Each pixel may have a photodiode, a floating diffusion node, and a charge transferring transistor. The charge transferring transistor may be a dual gate transistor having first and second gate terminals. A suitable bias may be applied to the second gate terminal to alter the capacitance of the floating diffusion node. The amount of electrons that may be accommodated by the floating diffusion node may be altered with application of a varying voltage level bias at the second gate terminal. By implementing a dual gate transistor, dynamic range compression and anti-blooming charge overflow may be implemented directly in the pixel to reduce image sensor pixel size and cost.

Abstract: Disclosed herein are a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes: a substrate, a light-emitting layer disposed on a surface of the substrate and including a first type semiconductor layer, an active layer, and a second type semiconductor layer, a first bump disposed on the first type semiconductor layer and a second bump disposed the second type semiconductor layer, a protective layer covering at least the light-emitting layer, and a first bump pad and a second bump pad disposed on the protective layer and connected to the first bump and the second bump, respectively.

Abstract: A semiconductor device includes a fin extending on a substrate along a first direction; a gate extending along a second direction across the fin; and source/drain regions and a gate spacer on the fin at opposite sides of the gate, in which there is a surface layer on the top and/or sidewalls of the fin.

Abstract: In a method for fabricating a field-effect transistor (FET) structure, forming a shallow trench isolation (STI) structure on a semiconductor substrate, wherein the STI structure includes dielectric structures that form one or more dielectric walled aspect ratio trapping (ART) trenches. The method further includes epitaxially growing a first semiconductor material on the semiconductor substrate and substantially filling at least one of the one or more ART trenches, and recessing the first semiconductor material down into the ART trenches selective to the dielectric structures, such that the upper surface of the first semiconductor material is below the upper surface of the dielectric structures.

Abstract: A fin structure on a substrate can have a lower portion formed from the substrate, a middle portion, and an upper portion. The middle portion can include a dielectric region having a dielectric composition and a concentrated region of a first material. The first material can be an element of the dielectric composition. The concentrated region can be located at an interface of the middle portion and lower portion. The structure can also include isolation regions in the substrate on opposing sides of the fin. The structure can also include a gate structure over the upper portion of the fin that are exposed from the isolation regions. The gate structure can include a gate dielectric and gate material over the gate dielectric. The structure can also include source/drain regions extending laterally from the upper portion and the middle portion of the fin.

Abstract: The disclosure provides a photo-detection device for use in long-wave infrared detection and a method of fabrication. The device comprises a GaSb substrate, a photo absorbing layer comprising InAs/InAsSb superlattice type-II, a barrier layer comprising AlAsSb, and a contact layer comprising InAs/InAsSb superlattice type-II. The barrier layer is configured to allow minority carrier holes current flow while blocking majority carrier electrons current flow between the photo-absorbing and contact layers. The disclosure further provides a method of producing the photo-detector using photolithography which includes selective etching of the contact layer that stops on the top of the barrier so no etching is made to the barrier layer so the barrier may operate as a passivator too. The disclosure presents an x-ray and photoluminescence results for InAs/InAsSb superlattice type-II material.

Abstract: Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.

Abstract: In some embodiments, a semiconductor device includes a first well region configured to be an anode of the semiconductor device, a first doped region configured to be a cathode of the semiconductor device, a second doped region configured to be another cathode of the semiconductor device, and a conductive region. The first well region is disposed between the first doped region and the second doped region, and is configured for electrical connection of the conductive region.

Abstract: A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.

Abstract: Avalanche photodiodes (APDs) and single photon avalanche detectors (SPADs) are provided with a lateral multiplication region that provides improved amplification through increased impact ionization.

Abstract: In a method for fabricating a field-effect transistor (FET) structure, forming a shallow trench isolation (STI) structure on a semiconductor substrate, wherein the STI structure includes dielectric structures that form one or more dielectric walled aspect ratio trapping (ART) trenches. The method further includes epitaxially growing a first semiconductor material on the semiconductor substrate and substantially filling at least one of the one or more ART trenches, and recessing the first semiconductor material down into the ART trenches selective to the dielectric structures, such that the upper surface of the first semiconductor material is below the upper surface of the dielectric structures.

Abstract: A light receiving element includes a substrate of a first conduction type, a light absorbing layer of the first conduction type formed on the substrate, a diffusion layer of a second conduction type formed on a portion of the light absorbing layer, a window layer of the first conduction type formed on the light absorbing layer so as to surround the diffusion layer and having a bandgap larger than that of the light absorbing layer, an anode electrode formed on the diffusion layer, and a cathode electrode provided on the substrate so as to contact the substrate without contacting each of the window layer and the light absorbing layer, wherein a groove is formed which surrounds a boundary between the diffusion layer and the window layer as viewed in plan and extends through the window layer and the light absorbing layer as viewed in section.

Abstract: A semiconductor device includes first conductive layers and first interlayer insulating layers stacked alternately with each other, at least one second conductive layer and at least one second interlayer insulating layer formed on the first conductive layers and the first interlayer insulating layers and stacked alternately with each other, a first semiconductor layer passing through the first conductive layers and the first interlayer insulating layers and including polysilicon, and a second semiconductor layer coupled to the first semiconductor layer and passing through the at least one second conductive layer the at least one second interlayer insulating layer, wherein the second semiconductor layer includes silicon germanium.

Abstract: Example embodiments disclose transistors, methods of manufacturing the same, and electronic devices including transistors. An active layer of a transistor may include a plurality of material layers (oxide layers) with different energy band gaps. The active layer may include a channel layer and a photo sensing layer. The photo sensing layer may have a single-layered or multi-layered structure. When the photo sensing layer has a multi-layered structure, the photo sensing layer may include a first material layer and a second material layer that are sequentially stacked on a surface of the channel layer. The first layer and the second layer may be alternately stacked one or more times.

Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge—Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge—Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge—Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge—Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current.

Abstract: An optoelectronic device comprising a first semiconductor layer having a first lattice constant; a second semiconductor layer having a second lattice constant, wherein the second lattice constant is smaller than the first lattice constant; and a first buffer layer formed between the first semiconductor layer and the second semiconductor layer, wherein a lattice constant of one side of the first buffer layer near the second semiconductor layer is smaller than the second lattice constant.

Abstract: A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat.

Abstract: A dichromatic photodiode and method for dichromatic photodetection are disclosed. A wide bandgap junction comprises a lattice matched junction operable to detect a first light spectrum. A narrow bandgap junction is coupled to the wide bandgap junction, and comprises a photodiode structure. The narrow bandgap junction is operable to detect a second light spectrum.

Abstract: TA photo detection device, including a substrate, a band-pass filter layer formed over the substrate, a light absorption layer formed over the band-pass filter layer, a Schottky layer formed on a portion of the light absorption layer, a first electrode layer formed on a portion of the Schottky layer, and a second electrode layer formed on the light absorption layer and spaced apart from the Schottky layer.

Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.

Abstract: A semiconductor device includes a channel layer, an electron-supplying layer provided on the channel layer, a cap layer provided on the electron-supplying layer and creating lattice match with the channel layer, and ohmic electrodes provided on the cap layer. The cap layer has a composition of (InyAl1-y)zGa1-zN (0?y?1, 0?z?1). The z for such cap layer monotonically decreases as being farther away from the electron-supplying layer.

Abstract: A solar cell includes a base layer; an emitter layer disposed on one side of the base layer; a first electrode in electrical communication with the base layer; and a second electrode in electrical communication with the emitter layer, wherein the base layer has a higher doping concentration with increasing distance from the interface between the base layer and the emitter layer, and the base layer has a doping concentration change slope that is further decreased with increasing distance from the interface between the base layer and the emitter layer.

Abstract: A method of making a two-dimensional detector array (and of such an array) comprising, for each of a plurality of rows and a plurality of columns of individual detectors, forming an n-doped semiconductor photo absorbing layer, forming a barrier layer comprising one or more of AlSb, AlAsSb, AlGaAsSb, AlSb, AlGaPSb, and HgZnTe, and forming an n-doped semiconductor contact area.

Abstract: A wafer includes a wafer frontside surface and a region adjacent to the wafer frontside surface. The region includes oxygen precipitates and the wafer frontside includes a predetermined surface structure to form thereon a device with a desired property.

Abstract: A method of making a two-dimensional detector array (and of such an array) comprising, for each of a plurality of rows and a plurality of columns of individual detectors, forming an n-doped semiconductor photo absorbing layer, forming a barrier layer comprising one or more of AlSb, AlAsSb, AlGaAsSb, AlPSb, AlGaPSb, and HgZnTe, and forming an n-doped semiconductor contact area.

Abstract: A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.

Abstract: A semiconductor structure having a transistor and a thermo electronic structure. The transistor has a control electrode for controlling a flow of carriers through a semiconductor layer between a pair of electrodes. The thermo electronic structure has a first portion disposed on at least one of the pair of electrodes and a second portion disposed over a region of the semiconductor layer proximate the control electrode between the control electrode and said at least one of the pair of electrode. The thermo electronic structure extends from the first portion to the second portion for removing heat generated heat from said region in the semiconductor layer.

Abstract: In broad terms the present invention is a semiconductor junction comprising a first material (102) and a second material (104), in which a surface of one or both of the junction materials has a periodically repeating structure that causes electron wave interference resulting in a change in the way electron energy levels within the junction are distributed.

Abstract: A method of manufacturing a stacked-layered thin film solar cell with a light-absorbing layer having a band gradient is provided. The stacked-layered thin film solar cell includes a substrate, a back electrode layer, a light-absorbing layer, a buffer layer, a window layer, and a top electrode layer stacked up sequentially. The light-absorbing layer has a band gradient structure and is essentially a group I-III-VI compound, wherein the group III elements at least include indium (In) and aluminum (Al). Moreover, the Al/In ratio in the upper half portion of the light-absorbing layer is greater than that in the lower half portion of the light-absorbing layer, wherein the upper half portion is proximate to a light incident surface.

Abstract: The invention specifies a radiation detector for detecting radiation (8) according to a predefined spectral sensitivity distribution (9) that exhibits a maximum at a predefined wavelength ?0, comprising a semiconductor body (1) with an active region (5) serving to generate a detector signal and intended to receive radiation, in which according to one embodiment the active region (5) includes a plurality of functional layers (4a, 4b, 4c, 4d) that have different band gaps and/or thicknesses and are implemented such that they (4a, 4b, 4c, 4d) at least partially absorb radiation in a range of wavelengths greater than ?0. According to a further embodiment, disposed after the active region is a filter layer structure (70) comprising at least one filter layer (7, 7a, 7b, 7c), said filter layer structure determining the short-wave side (101) of the detector sensitivity (10) according to the predefined spectral sensitivity distribution (9) by absorbing wavelengths smaller than ?0.

Abstract: The invention discloses a method of fabricating a first substrate and a method of recycling a second substrate during fabrication of the first substrate. The second substrate is heterogeneous for the first substrate. First, the fabricating method according to the invention is to prepare the second substrate. Subsequently, the fabricating method is to deposit a buffer layer on the second substrate. Then, the fabricating method is to deposit a semiconductor material layer on the buffer layer. The buffer layer assists the epitaxial growth of the semiconductor material layer, and serves as a lift-off layer. Finally, with an etching solution, the fabricating method is to only etch the lift-off layer to debond the second substrate away from the semiconductor material layer, where the semiconductor material layer serves as the first substrate.

Abstract: A stacked-layered thin film solar cell and a manufacturing method thereof are provided. The stacked-layered thin film solar cell includes a front electrode layer, a stacked-layered light-absorbing structure, and a back electrode layer. The stacked-layered light-absorbing structure has a p-i-n-type layered structure and consists essentially of I-III-VI compounds, wherein the group III elements at least include indium (In) and aluminum (Al). The p-type layer of the stacked-layered light-absorbing structure is near the front electrode layer while the n-type layer is near the back electrode layer. The Al/In concentration ratio in the p-type layer is higher than that in the n-type layer.

Abstract: An avalanche photodetector comprising a multiplication layer formed of a first material having a first polarization; the multiplication layer having a first electric field upon application of a bias voltage; an absorption layer formed of a second material having a second polarization forming an interface with the multiplication layer; the absorption layer having a second electric field upon application of the bias voltage, the second electric field being less than the first electric field or substantially zero, carriers created by light absorbed in the absorption layer being multiplied in the multiplication layer due to the first electric field; the absorption layer having a second polarization which is greater or less than the first polarization to thereby create an interface charge; the interface charge being positive when the first material predominately multiplies holes, the interface charge being negative when the first material predominately multiplies electrons, the change in electric field at the inte

Abstract: Disclosed herein is a solid-state image pickup device including, a plurality of light receiving units, a transfer channel, a first transfer electrode, a second transfer electrode, first wiring, and second wiring.

Abstract: A method of making a two-dimensional detector array (and of such an array) comprising, for each of a plurality of rows and a plurality of columns of individual detectors, forming an n-doped semiconductor photo absorbing layer, forming a barrier layer comprising one or more of AlSb, AlAsSb, AlGaAsSb, AlPSb, AlGaPSb, and HgZnTe, and forming an n-doped semiconductor contact area.

Abstract: A semiconductor device has a semiconductor substrate of a first conductivity type; first to third high-voltage insulated-gate field effect transistors formed on a principal surface of the semiconductor substrate; a first device isolation insulating film that is formed in the semiconductor substrate and isolates the first high-voltage insulated-gate field effect transistor and the second high-voltage insulated-gate field effect transistor from each other; a second device isolation insulating film that is formed in the semiconductor substrate and isolates the first high-voltage insulated-gate field effect transistor and the third high-voltage insulated-gate field effect transistor from each other; a first impurity diffusion layer of the first conductivity type that is formed below the first device isolation insulating film; and a second impurity diffusion layer of the first conductivity type that is formed below the second device isolation insulating film.

Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.

Abstract: A metamorphic buffer layer is formed on a semi-insulating substrate by an epitaxial growth method, a collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially laminated on the metamorphic buffer layer, and a collector electrode is provided in contact with an upper layer of the metamorphic buffer layer. The metamorphic buffer layer is doped with an impurity, in a concentration equivalent to or higher than that in a conventional sub-collector layer, by an impurity doping process during crystal growth so that the metamorphic buffer layer will be able to play the role of guiding the collector current to the collector electrode. Since the sub-collector layer, which is often formed of a ternary mixed crystal or the like having a high thermal resistance, can be omitted, the heat generated in the semiconductor device can be rapidly released into the substrate.

Abstract: A dual band photodetector for detecting infrared and ultraviolet optical signals is disclosed. Aspects include homojunction and heterojunction detectors comprised of one or more of GaN, AlGaN, and InGaN. In one aspect ultraviolet/infrared dual-band detector is disclosed that is configured to simultaneously detect UV and IR.

Abstract: A semiconductor substrate, of GaAs with a semiconductor layer sequence applied on top of the substrate. The semiconductor layer sequence comprises a plurality of semiconductor layers of Al1-yGayAs1-xPx with 0?x?1 and 0?y?1. A number of the semiconductor layers respectively comprising a phosphorus component x which is greater than in a neighboring semiconductor layer lying thereunder in the direction of growth of the semiconductor layer sequence. Two semiconductor layers directly preceding the uppermost semiconductor layer of the semiconductor layer sequence have a smaller lattice constant than the uppermost layer.