Light Responsive Structure Patents (Class 257/184)
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Patent number: 12191419Abstract: Inhibition of movement of charges in a semiconductor element formed by growing a group III-V compound semiconductor layer on a silicon substrate is prevented. The semiconductor element includes a silicon substrate, a first compound semiconductor layer, a second compound semiconductor layer, and an electrode. The first compound semiconductor layer is formed on the silicon substrate. The second compound semiconductor layer is stacked on the first compound semiconductor layer. The electrode is disposed on the silicon substrate and controls movement of charges between the silicon substrate and the second compound semiconductor layer via the first compound semiconductor layer.Type: GrantFiled: June 4, 2020Date of Patent: January 7, 2025Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shota Kitamura, Tetsuji Yamaguchi, Akihiro Wakahara, Keisuke Yamane
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Patent number: 12153251Abstract: A silicon photonics integration circuit includes a silicon substrate member; a RX sub-circuit formed in the silicon substrate member including multiple RX-input ports each having a mode size converter configured to receive an incoming light signal into one of multiple waveguides and multiple RX photo detectors coupled respectively to the multiple waveguides; and a TX sub-circuit formed in the silicon substrate member including one or more TX-input ports each having a mode size converter coupled to a first TX photo detector into one input waveguide, one or more 1×2 directional couplers each coupled between the input waveguide and two mod-input waveguides, multiple modulators coupled between respective multiple mod-input waveguides and multiple mod-output waveguides each being coupled to a second TX photo detector into one of multiple output waveguides, and multiple TX-output ports each having a mode size converter coupled to respective one of the multiple output waveguides.Type: GrantFiled: August 8, 2022Date of Patent: November 26, 2024Assignee: MARVELL ASIA PTE LTDInventors: Xiaoguang Tu, Masaki Kato, Yu Li
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Patent number: 11923654Abstract: Described herein are one or more methods for integrating an optical component into an integrated photonics device. The die including a light source, an outcoupler, or both, may be bonded to a wafer having a cavity. The die can be encapsulated using an insulating material, such as an overmold, that surrounds its edges. Another (or the same) insulating material can surround conductive posts. Portions of the die, the overmold, and optionally, the conductive posts can be removed using a grinding and polishing process to create a planar top surface. The planar top surface enables flip-chip bonding and an improved connection to a heat sink. The process can continue with forming one or more additional conductive layers and/or insulating layers and electrically connecting the p-side and n-side contacts of the laser to a source.Type: GrantFiled: November 4, 2021Date of Patent: March 5, 2024Assignee: Apple Inc.Inventors: Michael J. Bishop, Jason Pelc, Vijay M. Iyer, Alex Goldis
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Patent number: 11888013Abstract: A sensing device includes a light source to emit light, a light sensor to detect reflection of the emitted light and distance determination circuitry responsive to reflected-light detection within the light sensor. The light sensor includes a photodetector having a photocharge storage capacity in excess of one electron and an output circuit that generates an output signal responsive to light detection within the photodetector with sub-hundred nanosecond latency. The distance determination circuitry measures an elapsed time based on transition of the output signal in response to photonic detection within the photodetector and determines, based on the elapsed time, a distance between the sensing device and a surface that yielded the reflection of the emitted light.Type: GrantFiled: November 4, 2022Date of Patent: January 30, 2024Assignee: Gigajot Technology, Inc.Inventors: Saleh Masoodian, Jiaju Ma
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Patent number: 11581501Abstract: An electronic device and a production method thereof, wherein the electronic device includes: a semiconductor layer comprising a plurality of quantum dots; and a first electrode and a second electrode spaced apart from each other; wherein the plurality of quantum dots do not comprise cadmium, lead, or mercury; wherein the plurality of quantum dots comprise indium and optionally gallium; a Group VA element, wherein the Group VA element comprises antimony, arsenic, or a combination thereof, and a molar ratio of the Group VA element with respect to the Group IIIA metal (e.g., indium) is less than or equal to about 1.2:1, and wherein the semiconductor layer may be disposed between the first electrode and the second electrode.Type: GrantFiled: June 14, 2019Date of Patent: February 14, 2023Assignees: SAMSUNG ELECTRONICS CO., LTD., THE TRUSTEES OF THE UNIVERSITY OF PENNSYLVANIAInventors: Tae Gon Kim, Tianshuo Zhao, Nuri Oh, Cherie Kagan, Eun Joo Jang, Christopher Murray
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Patent number: 11502172Abstract: A semiconductor device includes a SiC semiconductor layer that has a carbon density of 1.0×1022 cm?3 or more, a SiO2 layer that is formed on the SiC semiconductor layer and that has a connection surface contiguous to the SiC semiconductor layer and a non-connection surface positioned on a side opposite to the connection surface, a carbon-density-decreasing region that is formed at a surface layer portion of the connection surface of the SiO2 layer and in which a carbon density gradually decreases toward the non-connection surface of the SiO2 layer, and a low carbon density region that is formed at a surface layer portion of the non-connection surface of the SiO2 layer and that has a carbon density of 1.0×1019 cm?3 or less.Type: GrantFiled: January 10, 2019Date of Patent: November 15, 2022Assignee: ROHM CO., LTD.Inventors: Tsunenobu Kimoto, Takuma Kobayashi, Yuki Nakano, Masatoshi Aketa
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Patent number: 11482838Abstract: An optical waveguide structure includes a lower cladding layer positioned on a substrate; an optical guide layer positioned on the lower cladding layer; an upper cladding layer positioned on the optical guide layer; and a heater positioned on the upper cladding layer. The lower cladding layer, the optical guide layer, and the upper cladding layer constitute a mesa structure. The optical guide layer has a lower thermal conductivity than the upper cladding layer. An equation “Wwg?Wmesa?3×Wwg” is satisfied, wherein Wmesa represents a mesa width of the mesa structure, and Wwg represents a width of the optical guide layer. The optical guide layer occupies one-third or more of the mesa width in a width direction of the mesa structure.Type: GrantFiled: August 6, 2019Date of Patent: October 25, 2022Assignee: FURUKAWA ELECTRIC CO., LTD.Inventors: Yasutaka Higa, Yasumasa Kawakita
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Patent number: 11467294Abstract: Disclosed herein is a radiation detector comprising: a substrate of an intrinsic semiconductor; a semiconductor single crystal in a recess in the substrate, the semiconductor single crystal having a different composition from the intrinsic semiconductor; a first electrical contact in electrical contact with the semiconductor single crystal; a second electrical contact on or in the substrate, and surrounding the first electrical contact or the semiconductor single crystal, wherein the second electrical contact is electrically isolated from the semiconductor single crystal; wherein the radiation detector is configured to absorb radiation particles incident on the semiconductor single crystal and to generate charge carriers.Type: GrantFiled: March 16, 2021Date of Patent: October 11, 2022Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.Inventors: Peiyan Cao, Yurun Liu
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Patent number: 11424376Abstract: A superlattice absorber for a detector is provided. The superlattice absorber includes a plurality of material periods deposited successively. Each of the material periods includes a first layer of InAs, InGaAs, InAsSb or InGaAsSb; and a plurality of second layers of InGaAsSb. The second layers comprise at least two InGaAsSb layers with at least two different content combinations. The content of the second layers is different from that of the first layer.Type: GrantFiled: April 9, 2019Date of Patent: August 23, 2022Inventor: Peng Du
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Patent number: 11422369Abstract: A waveguide includes an input area, a multi-layered substrate, and an output area. The multi-layered substrate includes a plurality of layers of at least a substrate and at least one partially reflective layers. The input area in-couples light in a first band into the waveguide. The one or more partially reflective layers are partially reflective to light in the first band. Each of the one or more partially reflective layers are located between respective layers of the plurality of layers of the substrate. The output area out-couples light from the waveguide. The pupil replication density of the out-coupled light is based in part on a number of the one or more partially reflective layers and respective locations of the one or more partially reflective layers in the waveguide.Type: GrantFiled: April 26, 2018Date of Patent: August 23, 2022Assignee: Meta Platforms Technologies, LLCInventors: Maxwell Parsons, Giuseppe Calafiore, Wanli Chi
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Patent number: 11367803Abstract: The present disclosure provides a light detecting device. The light detecting devices includes an insulating layer, a silicon layer, a light detecting layer, N first doped regions and M second doped regions. The silicon layer is disposed over the insulating layer. The light detecting layer is disposed over the silicon layer and extends within at least a portion of the silicon layer. The first doped regions have a first dopant type and are disposed within the light detecting layer. The second doped regions have a second dopant type and are disposed within the light detecting layer. The first doped regions and the second doped regions are alternatingly arranged. M and N are integers equal to or greater than 2.Type: GrantFiled: April 1, 2020Date of Patent: June 21, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chewn-Pu Jou, Lan-Chou Cho, Weiwei Song
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Patent number: 11335820Abstract: A waveguide photoelectric detector, comprising: a substrate comprising a silicon layer, the silicon layer having a silicon waveguide formed thereon; an active layer dispose on the silicon waveguide, the active layer having a first doped region formed thereon; a horizontal PIN junction formed at an area of the silicon layer below the active layer, the horizontal PIN junction comprising a second doped region, an intrinsic region, and a third doped region. A doping type of the second doped region is the same as that of the first doped region. One end of the second doped region near the intrinsic region is connected to the first doped region. The third doped region and the first doped region form a vertical PIN junction.Type: GrantFiled: September 30, 2020Date of Patent: May 17, 2022Assignee: InnoLight Technology (Suzhou) Ltd.Inventors: Chih-Kuo Tseng, Xianyao Li, Yuzhou Sun
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Patent number: 11335826Abstract: A photo-detecting device includes a substrate, a first semiconductor layer, a light-absorbing layer, a second semiconductor layer, a semiconductor contact layer, an insulating layer, and an electrode structure. The second semiconductor layer includes a first region and a second region. The semiconductor contact layer is on the first region. The insulating layer covers the semiconductor contact layer, the first region, and the second region. The electrode structure covers the semiconductor contact layer, the insulating layer, the first region, and the second region.Type: GrantFiled: June 30, 2020Date of Patent: May 17, 2022Assignee: EPISTAR CORPORATIONInventors: Chu-Jih Su, Chao-Shun Huang, Shiuan-Leh Lin, Shih-Chang Lee, Wen-Luh Liao, Mei-Chun Liu
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Patent number: 11322642Abstract: Disclosed herein are a radiation detector and a method of making it. The radiation detector is configured to absorb radiation particles incident on a semiconductor single crystal of the radiation detector and to generate charge carriers. The semiconductor single crystal may be a CdZnTe single crystal or a CdTe single crystal. The method may comprise forming a recess into a substrate of semiconductor; forming a semiconductor single crystal in the recess; and forming a heavily doped semiconductor region in the substrate. The semiconductor single crystal has a different composition from the substrate. The heavily doped region is in electrical contact with the semiconductor single crystal and embedded in a portion of intrinsic semiconductor of the substrate.Type: GrantFiled: January 14, 2020Date of Patent: May 3, 2022Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.Inventors: Peiyan Cao, Yurun Liu
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Patent number: 11302835Abstract: Techniques to use energy band gap engineering (or band offset engineering) to produce a photodetector semiconductor assembly that can be tuned to absorb light in one or more wavelengths. For example, the assembly can be tuned to receive infrared (IR) and/or ultraviolet (UV) light. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor.Type: GrantFiled: December 11, 2019Date of Patent: April 12, 2022Assignee: Analog Devices, Inc.Inventor: Mohamed Azize
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Patent number: 11295207Abstract: Boltzmann machines are trained using an objective function that is evaluated by sampling quantum states that approximate a Gibbs state. Classical processing is used to produce the objective function, and the approximate Gibbs state is based on weights and biases that are refined using the sample results. In some examples, amplitude estimation is used. A combined classical/quantum computer produces suitable weights and biases for classification of shapes and other applications.Type: GrantFiled: November 28, 2015Date of Patent: April 5, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Nathan Wiebe, Krysta Svore, Ashish Kapoor
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Patent number: 11264425Abstract: A process for fabricating an optoelectronic device including an array of germanium-based photodiodes including the following steps: producing a stack of semiconductor layers, made from germanium; producing trenches; depositing a passivation intrinsic semiconductor layer, made from silicon; annealing, ensuring, for each photodiode, an interdiffusion of the silicon of the passivation semiconductor layer and of the germanium of a semiconductor portion, thus forming a peripheral zone of the semiconductor portion, made from silicon-germanium.Type: GrantFiled: November 26, 2019Date of Patent: March 1, 2022Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Jean-Louis Ouvrier-Buffet, Abdelkader Aliane, Jean-Michel Hartmann, Julie Widiez
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Patent number: 11226504Abstract: The present disclosure provides a multi-pass free-carrier absorption variable optical attenuator device, including: a diode structure including a P-type doped region and an N-type doped region separated by an intrinsic region; and an optical waveguide including a plurality of optical waveguide sections aligned parallel to one another and disposed between the P-type doped region and the N-type doped region and within the intrinsic region of the diode structure. Further, the present disclosure provides a multi-pass thermal phase shifter device, including: a silicon structure including or coupled to one or more heater elements; and an optical waveguide including a plurality of optical waveguide sections aligned parallel to one another and disposed adjacent to the one or more heater elements. Optionally, at least two of the optical waveguide sections have different geometries and are separated by a predetermined gap.Type: GrantFiled: July 19, 2019Date of Patent: January 18, 2022Assignee: Ciena CorporationInventors: Sean Sebastian O'Keefe, Alexandre Delisle-Simard, Yves Painchaud
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Patent number: 11171172Abstract: A back side illumination (BSI) image sensor is provided. The BSI image sensor includes a semiconductor substrate, a first dielectric layer, a reflective element, a second dielectric layer and a color filter layer. The semiconductor substrate has a front side and a back side. The first dielectric layer is disposed on the front side of the semiconductor substrate. The reflective element is disposed on the first dielectric layer, in which the reflective element has an inner sidewall contacting the first dielectric layer, and the inner sidewall has a zigzag profile. The second dielectric layer is disposed on the first dielectric layer and the reflective element. The color filter layer is disposed on the backside of the semiconductor substrate.Type: GrantFiled: July 16, 2019Date of Patent: November 9, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Ying-Hao Chen
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Patent number: 11075314Abstract: An example device includes a doped absorption region to receive optical energy and generate free electrons from the received optical energy. The example device also includes a doped charge region to increase an electric field. The example device also includes an intrinsic multiplication region to generate additional free electrons from impact ionization of the generated free electrons. The example device includes a doped contact region to conduct the free electrons and the additional free electrons.Type: GrantFiled: June 2, 2020Date of Patent: July 27, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Zhihong Huang, Raymond G. Beausoleil
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Patent number: 11070030Abstract: A waveguide heterostructure for a semiconductor laser with an active part, comprising an active region layer depending of the type of semiconductor used, which is sandwiched between an electrode layer and a substrate, usable for dispersion compensation in a semiconductor laser frequency comb setup, an optical frequency comb setup and a manufacturing method.Type: GrantFiled: September 27, 2018Date of Patent: July 20, 2021Inventors: Jérôme Faist, Yves Bidaux, Filippos Kapsalidis
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Patent number: 11063163Abstract: An infrared detector and a method for manufacturing it are disclosed. The infrared photo-detector contains a photo absorber layer responsive to infrared light, a first barrier layer disposed on the absorber layer, wherein the first barrier layer substantially comprises AlSb, a second barrier layer disposed on the first barrier layer, wherein the second barrier layer substantially comprises AlxGa1-xSb and a contact layer disposed on the second barrier layer.Type: GrantFiled: March 14, 2014Date of Patent: July 13, 2021Assignee: HRL Laboratories, LLCInventors: Terence J. De Lyon, Rajesh D. Rajavel
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Patent number: 11052644Abstract: An electrical conductor includes: a first conductive layer including a plurality of ruthenium oxide nanosheets, wherein at least one ruthenium oxide nanosheet of the plurality of ruthenium oxide nanosheets includes a halogen, a chalcogen, a Group 15 element, or a combination thereof on a surface of the ruthenium oxide nanosheet.Type: GrantFiled: December 30, 2019Date of Patent: July 6, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungwoo Hwang, Se Yun Kim, Jong Wook Roh, Woojin Lee, Jongmin Lee, Doh Won Jung, Chan Kwak
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Patent number: 11005000Abstract: A connector that provides alignment of an optical fiber to a photonic device. The connector has a threaded sleeve, a ferrule cavity, an aperture in optical communication with the ferrule cavity and having a center that is substantially aligned with a center of the ferrule cavity and a device cavity that is configured to receive the photonic device and further in optical communication with the ferrule cavity via the aperture.Type: GrantFiled: July 8, 2019Date of Patent: May 11, 2021Assignee: Avago Technologies International Sales Pte. LimitedInventors: Simon Fafard, Denis Paul Masson
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Patent number: 10962810Abstract: An integrated optical modulator array useful for modulating light at different wavelengths in the same optical band includes multiple GeSi waveguides on a substrate. Each GeSi waveguide has a different width and is coupled to electrodes to form an electro-absorption modulator. A stressor material, such as SiN, disposed between the GeSi waveguides in the optical modulators applies a strain to the GeSi waveguides. Because each GeSi waveguide has a different width, it experiences a different strain. This difference can be a difference in magnitude, type (homogeneous v. inhomogeneous, compressive v. tensile), or both. The different strains shift the bandgaps of the Ge in the GeSi waveguides by different amounts, shifting the optical absorption edges for the GeSi waveguides by different amounts. Put differently, the stressor layer strains each GeSi modulator differently, causing each GeSi modulator to operate at a different wavelength.Type: GrantFiled: September 27, 2019Date of Patent: March 30, 2021Assignee: Massachusetts Institute of TechnologyInventors: Danhao Ma, Yiding Lin, Jurgen Michel
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Patent number: 10964862Abstract: A semiconductor heterostructure for an optoelectronic device includes a base semiconductor layer having one or more semiconductor heterostructure mesas located thereon. One or more of the mesas can include a set of active regions having multiple main peaks of radiative recombination at differing wavelengths. For example, a mesa can include two or more active regions, each of which has a different wavelength for the corresponding main peak of radiative recombination. The active regions can be configured to be operated simultaneously or can be capable of independent operation. A system can include one or more optoelectronic devices, each of which can be operated as an emitter or a detector.Type: GrantFiled: September 29, 2017Date of Patent: March 30, 2021Assignee: Sensor Electronic Technology, Inc.Inventors: Grigory Simin, Michael Shur, Alexander Dobrinsky
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Patent number: 10910591Abstract: An organic EL display device according to an embodiment of the present invention includes a substrate on which a display region including a plurality of pixels including an organic EL layer and an external region that surrounds the display region are formed, at least one separating wall that is formed at a part of the external region on the substrate, and an organic layer that covers at least a part of the display region, includes an organic material, and is formed on a display region side of the at least one separating wall. A wall surface of the display region side of the at least one separating wall includes an inclined surface that is inclined toward the display region side as it is extended away from the substrate.Type: GrantFiled: March 31, 2017Date of Patent: February 2, 2021Assignee: Japan Display Inc.Inventors: Yukio Matsumoto, Hiraaki Kokame
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Patent number: 10903620Abstract: There are included: a substrate; a semiconductor laser part formed on the substrate by stacking a plurality of layers including an active layer; and an adjacent part formed on the substrate by stacking a plurality of layers including a core layer, and being an optical modulator or an optical waveguide in contact with the semiconductor laser part through butt joint joining thereto. In a semiconductor device including the semiconductor laser part and the adjacent part which are joined in a butt joint manner, at least a portion, of the semiconductor laser part, that is contact with the adjacent part is disordered.Type: GrantFiled: May 19, 2017Date of Patent: January 26, 2021Assignee: Mitsubishi Electric CorporationInventor: Hiroyuki Kawahara
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Patent number: 10868407Abstract: An array of monolithic wavelength division multiplexing (WDM) vertical cavity surface emitting lasers (VCSELs) with spatially varying gain peak and Fabry Perot wavelength is provided. Each VCSEL includes a lower distributed Bragg reflector (DBR), a Fabry Perot tuning/current spreading layer, and a structure comprising a multiple quantum well (MQW) layer sandwiched between a lower separate confinement heterostructure (SCH) layer and an upper SCH layer. The structure is sandwiched between the DBR and the Fabry Perot tuning/current spreading layer. Each MQW experiences a different amount of quantum well intermixing and concomitantly a different wavelength shift. Each VCSEL further includes a top mirror on the Fabry Perot tuning/current spreading layer. A method is also provided for manufacturing the array.Type: GrantFiled: June 4, 2015Date of Patent: December 15, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Sagi Mathai, Michael Renne Ty Tan
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Patent number: 10847665Abstract: A Ge-on-Si photodetector constructed without doping or contacting Germanium by metal is described. Despite the simplified fabrication process, the device has responsivity of 1.24 A/W, corresponding to 99.2% quantum efficiency. Dark current is 40 nA at ?4 V reverse bias. 3-dB bandwidth is 30 GHz.Type: GrantFiled: November 29, 2019Date of Patent: November 24, 2020Assignee: Elenion Technologies, LLCInventors: Thomas Baehr-Jones, Yi Zhang, Michael J. Hochberg, Ari Novack
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Patent number: 10741714Abstract: An infrared detection device includes a semiconductor substrate; a first metamorphic buffer layer that is formed on the semiconductor substrate; a first contact layer that is formed on the first metamorphic buffer layer; a first infrared absorption layer that is formed on the first contact layer; a second contact layer that is formed on the first infrared absorption layer; a second metamorphic buffer layer that is formed on the second contact layer; a third contact layer that is formed on the second metamorphic buffer layer; a second infrared absorption layer that is formed on the third contact layer; a fourth contact layer that is formed on the second infrared absorption layer; a lower electrode that is connected with the first contact layer; an upper electrode that is connected with the fourth contact layer; and an intermediate electrode that is connected with the second contact layer and the third contact layer.Type: GrantFiled: June 13, 2019Date of Patent: August 11, 2020Assignee: FUJITSU LIMITEDInventor: Shigekazu Okumura
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Patent number: 10727267Abstract: A method of assembling a photodetector assembly includes depositing bumps on a read out integrated circuit (ROIC) without depositing bumps on a photodiode array (PDA). The method includes assembling the PDA and ROIC together wherein each bump electrically interconnects the ROIC with a respective contact of the PDA. A photodetector assembly includes a PDA. A ROIC is assembled to the PDA, wherein the ROIC is electrically interconnected with the PDA through a plurality of electrically conductive bumps. Each bump is confined within a respective pocket between the ROIC and a respective contact of the PDA. The disclosed methods can enable focal plane array manufacturers to achieve low-cost production of ultra-fine pitch, large format imaging arrays.Type: GrantFiled: September 12, 2018Date of Patent: July 28, 2020Assignee: Sensors Unlimited, Inc.Inventors: Wei Zhang, Douglas Stewart Malchow, Michael J. Evans, Wei Huang, Paul L. Bereznycky, Namwoong Paik
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Patent number: 10686532Abstract: An optical receiver component, wherein the receiver component comprises a first type of partial-voltage source with a first absorption edge and a second type of partial-voltage source with a second absorption edge, and the first absorption edge lies at a higher energy than the second absorption edge. Each partial-voltage source produces a partial voltage, provided a photon flux at a specific wavelength strikes the partial-voltage source, and the two partial-voltage sources are connected in series. A first number of series-connected sub-partial-voltage sources of the first type and a second number of series-connected sub-partial-voltage sources of the second type are provided. The first number and/or the second number are greater than one, and the respective deviation of the source voltages of the sub-partial-voltage sources among themselves is less than 20% in both types. Each sub-partial-voltage source comprises a semiconductor diode with a p-n junction.Type: GrantFiled: April 20, 2018Date of Patent: June 16, 2020Assignee: AZUR SPACE Solar Power GmbHInventors: Wolfgang Guter, Daniel Fuhrmann, Christoph Peper
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Patent number: 10686101Abstract: Provided is a semiconductor light emitting device which includes: a light emitting structure including a plurality of semiconductor layers and configured to generate and emit light to an outside of the light emitting structure; a transparent electrode layer disposed on the light emitting structure; a transparent protective layer disposed on the transparent electrode layer; a distributed Bragg reflector (DBR) layer disposed on the transparent protective layer and covering at least a part of the transparent electrode layer; and at least one electrode pad connected to the transparent electrode layer through a hole or via.Type: GrantFiled: July 6, 2018Date of Patent: June 16, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ju Heon Yoon, Ha Yeong Son, Young Sub Shin
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Patent number: 10680131Abstract: An example device includes a doped absorption region to receive optical energy and generate free electrons from the received optical energy. The example device also includes a doped charge region to increase an electric field. The example device also includes an intrinsic multiplication region to generate additional free electrons from impact ionization of the generated free electrons. The example device includes a doped contact region to conduct the free electrons and the additional free electrons.Type: GrantFiled: July 27, 2015Date of Patent: June 9, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Zhihong Huang, Raymond G Beausoleil
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Patent number: 10680124Abstract: Disclosed are systems and methods for improving applications involving the generation and detection of electromagnetic radiation at terahertz (THz) frequencies. Embodiments of the systems and methods include the fabrication and use of plasmonic devices that enhance light-matter interaction at the nanometer scale by extreme focusing with nanostructured metals. This plasmonic enhancement is used to produce high efficiency THz photoconductive switches that combine the benefits of low-temperature grown GaAs while using mature 1.55 ?m femtosecond lasers operating with photon energy below the GaAs band-gap.Type: GrantFiled: November 14, 2016Date of Patent: June 9, 2020Assignee: UVic Industry Partnerships Inc.Inventors: Thomas E. Darcie, Reuven Gordon, Afshin Jooshesh
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Patent number: 10680086Abstract: A heterojunction bipolar transistor is integrated on radio frequency (RF) dies of different sizes. The heterojunction bipolar transistor includes an emitter on a first-side of a semiconductor-on-insulator (SOI) layer of an SOI substrate. The emitter is accessed from the first-side while a collector is accessed from a second-side of the SOI substrate. One or more portions of a base of the heterojunction bipolar transistor is between the emitter and one or more portions of the collector. The heterojunction bipolar transistor also includes a compound semiconductor layer between the collector and the emitter. The compound semiconductor layer carries a charge between the emitter and the collector.Type: GrantFiled: June 18, 2018Date of Patent: June 9, 2020Assignee: QUALCOMM IncorporatedInventors: Sinan Goktepeli, George Pete Imthurn, Stephen Alan Fanelli
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Patent number: 10644480Abstract: An optical module includes a light-forming part configured to form light; and a protective member that includes an output window configured to transmit light from the light-forming part and that is disposed so as to surround the light-forming part. The light-forming part includes a base member; a plurality of semiconductor light-emitting devices mounted on the base member and configured to emit light differing from each other in wavelength; and a filter mounted on the base member and configured to directly receive and coaxially multiplex diverging light from the plurality of semiconductor light-emitting devices.Type: GrantFiled: April 19, 2017Date of Patent: May 5, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventor: Hiromi Nakanishi
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Patent number: 10608070Abstract: An organic EL display device includes: a lower electrode; an upper electrode; a first organic layer which is disposed between the lower electrode and the upper electrode and is formed of a plurality of layers including a light emitting layer formed of an organic material that emits light; a metal wire that extends between the pixels within the display region; and a second organic layer which is formed of a plurality of layers the same as that of the first organic layer and which comes into contact with a part of the metal wire and does not come into contact with the first organic layer. The upper electrode comes into contact with the metal wire in the periphery of the second organic layer. Accordingly, it is possible to uniformize the potential of the upper electrode without reducing the light emission area.Type: GrantFiled: September 19, 2018Date of Patent: March 31, 2020Assignee: Japan Display Inc.Inventors: Yuko Matsumoto, Toshihiro Sato
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Patent number: 10580923Abstract: A disclosed optical semiconductor device includes a first semiconductor layer having a first refractive index and a first optical absorption coefficient; and a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having a second refractive index and a second optical absorption coefficient. The second refractive index is larger than the first refractive index, and the second optical absorption coefficient is larger than the first optical absorption coefficient. The first semiconductor layer includes a first region of p-type, a second region of n-type, a third region of p-type or n-type between the first region and the second region, a fourth region of i-type between the first region and the third region, and a fifth region of i-type between the second region and the third region. The second semiconductor layer is formed on the first region, the fourth region, and the third region.Type: GrantFiled: May 30, 2019Date of Patent: March 3, 2020Assignees: FUJITSU LIMITED, PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATIONInventor: Takasi Simoyama
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Patent number: 10566576Abstract: This disclosure provides a display panel including a first substrate with pixel areas and emission areas defined by a plurality of gate lines and a plurality of data lines; and a second substrate on which partitions are formed to correspond with the emission areas. The present disclosure provides a method for improving luminance efficiency of a display device having a mirror or transmittance function.Type: GrantFiled: October 21, 2016Date of Patent: February 18, 2020Assignee: LG DISPLAY CO., LTD.Inventors: Eui-Tae Kim, Ki-Seob Shin
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Patent number: 10546663Abstract: An electrical conductor includes: a first conductive layer including a plurality of ruthenium oxide nanosheets, wherein at least one ruthenium oxide nanosheet of the plurality of ruthenium oxide nanosheets includes a halogen, a chalcogen, a Group 15 element, or a combination thereof on a surface of the ruthenium oxide nanosheet.Type: GrantFiled: October 18, 2016Date of Patent: January 28, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungwoo Hwang, Se Yun Kim, Jong Wook Roh, Woojin Lee, Jongmin Lee, Doh Won Jung, Chan Kwak
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Patent number: 10529878Abstract: A Ge-on-Si photodetector constructed without doping or contacting Germanium by metal is described. Despite the simplified fabrication process, the device has responsivity of 1.24 A/W, corresponding to 99.2% quantum efficiency. Dark current is 40 nA at ?4 V reverse bias. 3-dB bandwidth is 30 GHz.Type: GrantFiled: November 30, 2018Date of Patent: January 7, 2020Assignee: Elenion Technologies, LLCInventors: Thomas Wetteland Baehr-Jones, Yi Zhang, Michael J. Hochberg, Ari Novack
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Patent number: 10455175Abstract: A voltage limiting unit of a solid state imaging device limits a voltage of a signal line so as not to become a predetermined value or less. A signal processing unit to which a pixel signal is input via a signal line. A controlling unit is disposed between the voltage limiting unit and the signal processing unit on the signal line. Further, the controlling unit causes the voltage limiting unit and the signal processing unit to be non-conductive in a period in which a transfer unit of a pixel transfers the electric charge converted by a photoelectric conversion unit of the pixel to a floating diffusion region of the pixel.Type: GrantFiled: December 27, 2012Date of Patent: October 22, 2019Assignee: NIKON CORPORATIONInventor: Hideaki Matsuda
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Patent number: 10418409Abstract: Disclosed herein is an apparatus comprising: an array of avalanche photodiodes (APDs), each of the APDs comprising an absorption region and an amplification region; wherein the absorption region is configured to generate charge carriers from a photon absorbed by the absorption region; wherein the amplification region comprises a junction with an electric field in the junction; wherein the electric field is at a value sufficient to cause an avalanche of charge carriers entering the amplification region, but not sufficient to make the avalanche self-sustaining; wherein the junctions of the APDs are discrete.Type: GrantFiled: August 30, 2018Date of Patent: September 17, 2019Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.Inventors: Peiyan Cao, Yurun Liu
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Patent number: 10411149Abstract: A lateral Ge/Si APD constructed on a silicon-on-insulator wafer includes a silicon device layer having regions that are doped to provide a lateral electric field and an avalanche region. A region having a modest doping level is in contact with a germanium body. There are no metal contacts made to the germanium body. The electrical contacts to the germanium body are made by way of the doped regions in the silicon device layer.Type: GrantFiled: October 23, 2018Date of Patent: September 10, 2019Assignee: Elenion Technologies, LLCInventors: Ari Novack, Yang Liu, Yi Zhang
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Patent number: 10367284Abstract: According to an example, a socket to support a first board in a spaced relation to a second board may include a base section having openings to receive connectors that are to electrically connect the first board to the second board. The socket may also include a plurality of walls extending from the base section, in which each of the plurality of walls is angled with respect to the base section and in which the plurality of walls include air ducts to enable air to flow through the socket when the first board is positioned on the socket. The socket may further include socket alignment elements extending from the base section, in which the alignment elements are to be inserted into mating holes in the second board.Type: GrantFiled: July 27, 2015Date of Patent: July 30, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Kevin B Leigh, George D Megason, John Norton
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Patent number: 10361243Abstract: A method for making a CMOS image sensor may include forming a plurality of laterally adjacent infrared (IR) photodiode structures on a semiconductor substrate having a first conductivity type. Forming each IR photodiode structure may include forming a superlattice on the semiconductor substrate including a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The superlattice may have the first conductivity type. A semiconductor layer may be formed on the superlattice, along with a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well above the retrograde well having the first conductivity type.Type: GrantFiled: December 15, 2017Date of Patent: July 23, 2019Assignee: ATOMERA INCORPORATEDInventors: Robert J. Mears, Marek Hytha
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Patent number: 10361335Abstract: A method includes: forming a first mask having a first opening and a second opening; performing etching by using the first mask, to allow the etching to progress at a higher rate in the second opening than in the first opening; forming a second mask having a third opening and a fourth opening; performing etching by using the second mask, to form a mesa in a region interposed by the third opening, and an n-type contact region in the fourth opening; and forming a first electrode on the mesa and a second electrode on the n-type contact region, the first electrode being electrically connected to the third layer, the second electrode being electrically connected to the first layer, wherein a region covered with the first mask and exposed through the fourth opening of the second mask turns into the n-type contact region after the etching using the second mask.Type: GrantFiled: May 1, 2018Date of Patent: July 23, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke Kimura, Sundararajan Balasekaran
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Patent number: 10340407Abstract: An avalanche photodetector (APD) includes a photo converter for signals to be demodulated into free charge carriers; and at least one avalanche amplifier for the free charge carriers. The photo converter and the avalanche amplifier are located next to each other on the same substrate and are in direct contact with each other. The avalanche amplifier includes a contact layer and a multiplier layer. The multiplier layer is made of a semiconductor of the same conductivity type as the photo converter and faces the substrate abutting the photo converter on one side. A first electrode is on the contact layer of the avalanche amplifier, while the second electrode is on a bottom of the substrate.Type: GrantFiled: October 18, 2016Date of Patent: July 2, 2019Assignee: LLC “Dephan”Inventors: Vitaly Emmanuilovich Shubin, Dmitry Alexeevich Shushakov, Nikolay Afanasievich Kolobov