Staircase (including Graded Composition) Device Patents (Class 257/185)
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Patent number: 7851824Abstract: A light emitting device includes: a light emitting layer; an n-type contact layer made of a compound provided on the light emitting layer; a composition modulation layer provided on the n-type contact layer; and a transparent electrode provided on the composition modulation layer. The composition modulation layer consists of a plurality of elements which constitute the compound. A composition ratio of one of the plurality of elements is higher in the composition modulation layer than in the compound. Alternatively, the light emitting device includes: a light emitting layer; an n-type contact layer made of a compound provided on the light emitting layer; a metal layer provided on the n-type contact layer; and a transparent electrode provided on the metal layer. The metal layer is made of a metal having a lower work function than the compound.Type: GrantFiled: September 26, 2006Date of Patent: December 14, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Masato Sawada, Akihiro Ooishi
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Patent number: 7834379Abstract: The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its solubility to the dopant compared to the solubility of the multiplication layer to dopant. The solid source has a diameter between the first and second diffusion windows. Thus, there are three distinct diffusion regions during the second diffusion. The dopant in the multiplication layer at the edge region, the dopant from the solid source material with a relatively higher dopant concentration (limited by the solubility of the dopant in the solid source material) at the intermediate region, and the central region exposed to an infinite diffusion source from the solid source material as it is continually charged with new dopant from the external gas source.Type: GrantFiled: July 15, 2008Date of Patent: November 16, 2010Assignee: JDS Uniphase CorporationInventors: Zhong Pan, David Venables, Craig Ciesla
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Patent number: 7808065Abstract: A semiconductor photosensitive element comprises: a semiconductor substrate of a first conductivity type; a first light absorption layer, a first semiconductor layer of a second conductivity type, a first semiconductor layer of the first conductivity type, a second light absorption layer, and a second semiconductor layer of a second conductivity type, arranged in this order on the semiconductor substrate; a first electrode connected the second semiconductor layer of the second conductivity type; a second electrode connected to the semiconductor substrate; and a third electrode electrically connecting the first semiconductor layer of the first conductivity type to the first semiconductor layer of the second conductivity type. The third electrode is located outside a light detection region for detecting optical signals.Type: GrantFiled: May 30, 2008Date of Patent: October 5, 2010Assignee: Mitsubishi Electric CorporationInventors: Eitaro Ishimura, Masaharu Nakaji
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Patent number: 7799592Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.Type: GrantFiled: September 26, 2007Date of Patent: September 21, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Anthony J. Lochtefeld
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Patent number: 7795639Abstract: A photodiode designed to capture incident photons includes a stack of at least three superposed layers of semiconductor materials having a first conductivity type. The stack includes: an interaction layer designed to interact with incident photons so as to generate photocarriers; a collection layer to collect the photocarriers; a confinement layer designed to confine the photocarriers in the collection layer. The collection layer has a band gap less than the band gaps of the interaction layer and confinement layer. The photodiode also includes a region which extends transversely relative to the planes of the layers. The region is in contact with the collection layer and confinement layer and has a conductivity type opposite to the first conductivity type so as to form a p-n junction with the stack.Type: GrantFiled: September 12, 2007Date of Patent: September 14, 2010Assignee: Commissariat A l'Energie AtomiqueInventor: Johan Rothman
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Patent number: 7795640Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.Type: GrantFiled: June 28, 2004Date of Patent: September 14, 2010Assignee: Semi-Conductor Devices-An Elbit Systems-Rafael PartnershipInventor: Philip Klipstein
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Patent number: 7759698Abstract: A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state.Type: GrantFiled: August 14, 2008Date of Patent: July 20, 2010Assignee: National Institute of Advanced Industrial Science and TechnologyInventor: Mutsuo Ogura
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Patent number: 7741657Abstract: An avalanche photodetector is disclosed. An apparatus according to aspects of the present invention includes a semiconductor substrate layer including a first type of semiconductor material. The apparatus also includes a multiplication layer including the first type of semiconductor material disposed proximate to the semiconductor substrate layer. The apparatus also includes an absorption layer having a second type of semiconductor material disposed proximate to the multiplication layer such that the multiplication layer is disposed between the absorption layer and the semiconductor substrate layer. The absorption layer is optically coupled to receive and absorb an optical beam. The apparatus also includes an n+ doped region of the first type of semiconductor material defined at a surface of the multiplication layer opposite the absorption layer.Type: GrantFiled: July 17, 2006Date of Patent: June 22, 2010Assignee: Intel CorporationInventors: Alexandre Pauchard, Michael T. Morse
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Patent number: 7671395Abstract: Integrated circuit devices are provide having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in lower region of the contact hole and a bottom electrode in the contact hole has a bottom surface on a top surface of the vertical diode. The bottom electrode is self-aligned with the vertical diode. A top surface area of the bottom electrode is less than a horizontal section area of the contact hole. Methods of forming the integrated circuit devices and phase change memory cells are also provided.Type: GrantFiled: September 29, 2008Date of Patent: March 2, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Hyun Park, Jae-Hee Oh, Se-Ho Lee, Won-Cheol Jeong
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Publication number: 20100012974Abstract: A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.Type: ApplicationFiled: July 15, 2008Publication date: January 21, 2010Inventors: Hung-Lin Shih, Tsan-Chi Chu, Wen-Shiang Liao, Wen-Ching Tsai
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Publication number: 20090315073Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.Type: ApplicationFiled: August 7, 2008Publication date: December 24, 2009Applicant: National Central UniversityInventors: Jin-Wei SHI, Yen-Hsiang Wu
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Patent number: 7629663Abstract: This invention relates to an MSM type photo-detection device designed to detect incident light and comprising reflecting means (2) superposed on a support (1), to form a first mirror for a Fabry-Pérot type resonant cavity, a layer of material (3) that does not absorb light, an active layer (4) made of a semiconducting material absorbing incident light and a network (5) of polarization electrodes collecting the detected signal. The electrodes network is arranged on the active layer and is composed of parallel conducting strips at a uniform spacing at a period less than the wavelength of incident light, the electrodes network forming a second mirror for the resonant cavity, the optical characteristics of this second mirror being determined by the geometric dimensions of the said conducting strips. The distance separating the first mirror from the second mirror is determined to obtain a Fabry-Pérot type resonance for incident light between these two mirrors.Type: GrantFiled: July 24, 2003Date of Patent: December 8, 2009Assignee: Centre National de la Recherche ScientifiqueInventors: Fabrice Pardo, Stephane Collin, Jean-Luc Pelouard
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Publication number: 20090257703Abstract: An optical device includes at least two materials forming a structure with a graded bandgap where photocarriers are generated. A first of the at least two materials has a larger concentration at opposed ends of the graded bandgap structure than a concentration of the first of the at least two materials at an interior region of the graded bandgap structure. The second of the at least two materials has a larger concentration at the interior region of the graded bandgap structure than the concentration of the second of the at least two materials at the opposed ends of the graded bandgap structure.Type: ApplicationFiled: October 31, 2008Publication date: October 15, 2009Inventors: Alexandre Bratkovski, Theodore I. Kamins, David Fattal, Raymond Beausoleil
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Patent number: 7592654Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.Type: GrantFiled: November 15, 2007Date of Patent: September 22, 2009Assignee: Aptina Imaging CorporationInventors: Sandeep R. Bahl, Fredrick P. LaMaster, David W. Bigelow
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Patent number: 7525131Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.Type: GrantFiled: August 29, 2006Date of Patent: April 28, 2009Assignees: National University Corporation Shizuoka University, Hamamatsu Photonics K.K.Inventors: Masatomo Sumiya, Shunro Fuke, Tokuaki Nihashi, Minoru Hagino
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Patent number: 7504672Abstract: A photodiode for detection of preferably infrared radiation wherein photons are absorbed in one region and detected in another. In one example embodiment, an absorbing P region is abutted with an N region of lower doping such that the depletion region is substantially (preferably completely) confined to the N region. The N region is also chosen with a larger bandgap than the P region, with compositional grading of a region of the N region near the P region. This compositional grading mitigates the barrier between the respective bandgaps. Under reverse bias, the barrier is substantially reduced or disappears, allowing charge carriers to move from the absorbing P region into the N region (and beyond) where they are detected. The N region bandgap is chosen to be large enough that the dark current is limited by thermal generation from the field-free p-type absorbing volume, and also large enough to eliminate tunnel currents in the wide gap region of the diode.Type: GrantFiled: October 13, 2005Date of Patent: March 17, 2009Assignee: DRS Sensors & Targeting Systems, Inc.Inventor: Michael A. Kinch
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Patent number: 7495264Abstract: A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.Type: GrantFiled: December 7, 2006Date of Patent: February 24, 2009Assignee: NEC CorporationInventors: Heiji Watanabe, Haruhiko Ono, Nobuyuki Ikarashi
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Publication number: 20090020782Abstract: The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its solubility to the dopant compared to the solubility of the multiplication layer to dopant. The solid source has a diameter between the first and second diffusion windows. Thus, there are three distinct diffusion regions during the second diffusion. The dopant in the multiplication layer at the edge region, the dopant from the solid source material with a relatively higher dopant concentration (limited by the solubility of the dopant in the solid source material) at the intermediate region, and the central region exposed to an infinite diffusion source from the solid source material as it is continually charged with new dopant from the external gas source.Type: ApplicationFiled: July 15, 2008Publication date: January 22, 2009Applicant: JDS Uniphase CorporationInventors: Zhong Pan, David Venables, Craig Ciesla
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Publication number: 20080308840Abstract: A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state.Type: ApplicationFiled: August 14, 2008Publication date: December 18, 2008Applicant: National Institute of Advanced Ind. Sci & TechInventor: Mutsuo Ogura
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Publication number: 20080303058Abstract: A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.Type: ApplicationFiled: February 21, 2008Publication date: December 11, 2008Inventors: Mitsuyoshi MORI, Toru OKINO, Daisuke UEDA, Toshinobu MATSUNO
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Patent number: 7462892Abstract: A semiconductor device includes an emitter layer: a base layer; and a collector layer, wherein the collector layer and the emitter layer each include a heavily doped thin sublayer having a high impurity concentration, and each of the heavily doped thin sublayers has an impurity concentration higher than those of semiconductor layers adjacent to each heavily doped thin sublayer.Type: GrantFiled: July 24, 2006Date of Patent: December 9, 2008Assignee: Sony CorporationInventors: Ichiro Hase, Ken Sawada, Masaya Uemura
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Publication number: 20080203425Abstract: A phototransistor (400) comprises an emitter (43) comprising antimony, a base (42) comprising antimony, and a collector (41) comprising antimony. Preferably, the emitter, the base and the collector each comprises at least one of AlInGaAsSb, AlGaAsSb, AlGaSb, GaSb and InGaAsSb. The base comprises an emitter-contacting portion (41b) with a base-contacting portion (43a) of the emitter. The collector comprises a base-contacting portion (41b) which is in contact with a collector-contacting portion (421a) of the base. The phototransistor produces an internal gain upon being contacted with light within a receivable wavelength range, preferably greater than 1.7 micrometers. Also, a method of detecting light using such a phototransistor.Type: ApplicationFiled: January 24, 2005Publication date: August 28, 2008Inventor: Oleg Sulima
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Patent number: 7397066Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.Type: GrantFiled: August 19, 2004Date of Patent: July 8, 2008Assignee: Micron Technology, Inc.Inventor: Steven D. Oliver
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Patent number: 7372068Abstract: A QWIP structure is disclosed that includes a graded emitter barrier and can further be configured with a blocked superlattice miniband. The graded emitter barrier effectively operates to launch dark electrons into the active quantum well region, thereby improving responsivity. A graded collector barrier may also be included for reverse bias applications. The configuration operates to eliminate or otherwise reduce image artifacts or persistence associated with dielectric relaxation effect in low-background applications.Type: GrantFiled: February 16, 2007Date of Patent: May 13, 2008Assignee: Bae Systems Information and Electronic Systems Integration Inc.Inventors: Mani Sundaram, Axel R Reisinger
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Patent number: 7365356Abstract: The invention relates to a photocathode having a structure that permits a decrease in the radiant sensitivity at low temperatures is suppressed so that the S/N ratio is improved. In the photocathode, a light absorbing layer is formed on the upper layer of a substrate. An electron emitting layer is formed on the upper layer of the light absorbing layer. A contact layer having a striped-shape is formed on the upper layer of the electron emitting layer. A surface electrode composed of metal is formed on the surface of the contact layer. The interval between bars in the contact layer is adjusted so as to become 0.2 ?m or more but 2 ?m or less.Type: GrantFiled: February 11, 2005Date of Patent: April 29, 2008Assignee: Hamamatsu Photonics K.K.Inventors: Toru Hirohata, Minoru Niigaki, Tomoko Mochizuki, Masami Yamada
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Patent number: 7348608Abstract: A planar avalanche photodiode includes a small localized contact layer on the top of the device produced by either a diffusion or etching process and a semiconductor layer defining a lower contact area. A semiconductor multiplication layer is positioned between the two contact areas and a semiconductor absorption layer is positioned between the multiplication layer and the upper contact layer. The photodiode has a low capacitance and a low field near the edges of the semiconductor multiplication and absorption layers.Type: GrantFiled: April 30, 2004Date of Patent: March 25, 2008Assignee: Picometrix, LLCInventors: Cheng C. Ko, Barry Levine
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Patent number: 7348607Abstract: The present invention includes a planar avalanche photodiode having a first n-type semiconductor layer defining a planar contact area, and a second n-type semiconductor layer having a p-type diffusion region. Further features of the structure includes an n-type semiconductor multiplication layer, an n-type semiconductor absorption layer, and a p-type contact layer. Further embodiments include a planar avalanche photodiode having a first n-type semiconductor layer defining a planar contact area, an n-type semiconductor multiplication layer, an n-type semiconductor absorption layer and a p-type semiconductor layer electrically coupled to a p-type contact layer.Type: GrantFiled: February 3, 2003Date of Patent: March 25, 2008Assignee: Picometrix, LLCInventors: Cheng C. Ko, Barry Levine
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Patent number: 7238972Abstract: A photodetector is described. The photodetector is comprised of a substrate, a first n-type III-V compound semiconductor layer located on the substrate, an n++-type III-V compound semiconductor layer located on a first portion of the first n-type III-V compound semiconductor layer with a second portion of the first n-type III-V compound semiconductor layer exposed, a p-type III-V compound semiconductor layer located on the n++-type compound semiconductor layer, an undoped III-V compound semiconductor layer located on the p-type III-V compound semiconductor layer, a second n-type III-V compound semiconductor layer located on the undoped III-V compound semiconductor layer, a conductive transparent oxide layer located on the second n-type III-V compound semiconductor layer, a first electrode located on a portion of the conductive transparent oxide layer, and a second electrode located on a portion of the second portion of the first n-type III-V compound semiconductor layer.Type: GrantFiled: May 16, 2005Date of Patent: July 3, 2007Assignee: Epitech Technology CorporationInventors: Ming-Lum Lee, Wei-Chih Lai, Shih-Chang Shei
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Patent number: 7214971Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.Type: GrantFiled: June 10, 2004Date of Patent: May 8, 2007Assignee: Hamamatsu Photonics K.K.Inventors: Minoru Niigaki, Kazutoshi Nakajima
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Patent number: 7205563Abstract: A QWIP structure is disclosed that includes a graded emitter barrier and can further be configured with a blocked superlattice miniband. The graded emitter barrier effectively operates to launch dark electrons into the active quantum well region, thereby improving responsivity. A graded collector barrier may also be included for reverse bias applications. The configuration operates to eliminate or otherwise reduce image artifacts or persistence associated with dielectric relaxation effect in low-background applications.Type: GrantFiled: March 18, 2004Date of Patent: April 17, 2007Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Mani Sundaram, Axel R Reisinger
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Patent number: 7202511Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.Type: GrantFiled: August 18, 2004Date of Patent: April 10, 2007Assignee: DRS Sensors & Targeting Systems, Inc.Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
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Patent number: 7170105Abstract: A semiconductor device exhibiting interband tunneling with a first layer with a first conduction band edge with an energy above a first valence band edge, with the difference a first band-gap. A second layer with second conduction band edge with an energy above a second valence band edge, with the difference a second band-gap, and the second layer formed permitting electron carrier tunneling transport. The second layer is between the first and a third layer, with the difference between the third valence band edge and the third conduction band edge a third band-gap. A Fermi level is nearer the first conduction band edge than the first valence band edge. The second valence band edge is beneath the first conduction band edge. The second conduction band edge is above the third valence band edge. The Fermi level is nearer the third valence band edge than to the third conduction band edge.Type: GrantFiled: October 20, 2004Date of Patent: January 30, 2007Assignee: HRL Laboratories, LLCInventors: Joel N. Schulman, David H. Chow, Chanh Nguyen
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Patent number: 7115925Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.Type: GrantFiled: January 14, 2005Date of Patent: October 3, 2006Assignee: OmniVision Technologies, Inc.Inventor: Howard E. Rhodes
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Patent number: 7102185Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.Type: GrantFiled: June 21, 2004Date of Patent: September 5, 2006Assignee: Eastman Kodak CompanyInventors: David N. Nichols, David L. Losee, Christopher Parks
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Patent number: 7078741Abstract: The present invention includes a photodiode having a first p-type semiconductor layer and an n-type semiconductor layer coupled by a second p-type semiconductor layer. The second p-type semiconductor layer has graded doping along the path of the carriers. In particular, the doping is concentration graded from a high value near the anode to a lower p concentration towards the cathode. By grading the doping in this way, an increase in absorption is achieved, improving the responsivity of the device. Although this doping increases the capacitance relative to an intrinsic semiconductor of the same thickness, the pseudo electric field that is created by the graded doping gives the electrons a very high velocity which more than compensates for this increased capacitance.Type: GrantFiled: February 3, 2003Date of Patent: July 18, 2006Assignee: Picometrix, Inc.Inventors: Cheng C. Ko, Barry Levine
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Patent number: 7064399Abstract: The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of dopants into the region (40) directly beneath the gate dielectric layer (50).Type: GrantFiled: September 7, 2001Date of Patent: June 20, 2006Assignee: Texas Instruments IncorporatedInventors: Jeffrey A. Babcock, Angelo Pinto, Scott Balster, Alfred Haeusler, Gregory E. Howard
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Patent number: 7045833Abstract: An avalanche photodiode including a multiplication layer is provided. The multiplication layer may include a well region and a barrier region. The well region may include a material having a higher carrier ionization probability than a material used to form the barrier region.Type: GrantFiled: October 1, 2001Date of Patent: May 16, 2006Assignee: Board of Regents, The University of Texas SystemInventors: Joe C. Campbell, Ping Yuan
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Patent number: 6998635Abstract: A photocathode includes a first layer having a first energy band gap for providing absorption of light of wavelengths shorter than or equal to a first wavelength, a second layer having a second energy band gap for providing transmission of light of wavelengths longer than the first wavelength, and a third layer having a third energy band gap for providing absorption of light of wavelengths between the first wavelength and a second wavelength. The first wavelength is shorter than the second wavelength. The first, second and third layers are positioned in sequence between input and output sides of the photocathode.Type: GrantFiled: May 22, 2003Date of Patent: February 14, 2006Assignee: ITT Manufacturing Enterprises Inc.Inventors: Roger S. Sillmon, Arlynn W. Smith, Rudy G. Benz
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Patent number: 6956273Abstract: In a photoelectric conversion element which is formed by alternately stacking a region of a first conductivity type and a region of a second conductivity type as a conductivity type opposite to the first conductivity type to form a multi-layered structure, in which junction surfaces between the neighboring regions of the first and second conductivity types are formed to have depths suited to photoelectrically convert light in a plurality of different wavelength ranges, and which outputs signals for respective wavelength ranges, a region of a conductivity type opposite to the conductivity type of a surface-side region of the junction surface closest to a surface is formed in the surface of the surface-side region. Thus, highly color-separable signals which suffer less color mixture upon reading out signals from a plurality of photodiode layers is read out.Type: GrantFiled: April 4, 2003Date of Patent: October 18, 2005Assignee: Canon Kabushiki KaishaInventor: Toru Koizumi
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Patent number: 6927380Abstract: The charge read out efficiency of a line sensor utilizing a large photodiode is improved. A line sensor formed of a photoelectric converting portion utilizing a photodiode divided into a plurality of regions and having a potential inclination configuration wherein the potential wells thereof become deeper the closer the position thereof is to a readout gate is provided.Type: GrantFiled: February 1, 2002Date of Patent: August 9, 2005Assignee: Fuji Photo Film Co., Ltd.Inventors: Tatsuya Hagiwara, Jin Murayama, Tetsuo Yamada, Satoshi Arakawa, Hiroaki Yasuda
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Patent number: 6885039Abstract: There is provided a semiconductor photodetector which comprises (i) an InP substrate(1), (ii) an optical waveguide(5) having an N-type semiconductor layer(32) formed on the InP substrate(1), an optical waveguide core layer(3) formed on a partial area of the N-type semiconductor layer(32), and an upper cladding layer(4) formed on the optical waveguide core layer(3), and (iii) an avalanche photodiode(17) constructed by forming a photo absorbing layer(33), a heterobarrier relaxing layer(34), an underlying layer(14a) of a N-type field dropping layer(35), an overlying layer(14b) of the N-type field dropping layer(35), a carrier multiplying layer(36), and a P-type semiconductor layer(37) in sequence on another area of the N-type semiconductor layer(32), and coupled to the optical waveguide(5), wherein a side surface of the underlying layer(14a) of the N-type field dropping layer(35) comes into contact with a side surface of the optical waveguide core layer(3), and a part of the overlying layer(14b) of the N-type fiType: GrantFiled: October 29, 2003Date of Patent: April 26, 2005Assignee: Fujitsu LimitedInventor: Haruhiko Kuwatsuka
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Patent number: 6861681Abstract: A blue-ultraviolet on-p-GaAs substrate pin Zn1-xMgxSySe1-y photodiode with high quantum efficiency, small dark current, high reliability and a long lifetime. The ZnMgSSe photodiode has a metallic p-electrode, a p-GaAs single crystal substrate, a p-(ZnSe/ZnTe)m superlattice (m: integer number of sets of thin films), an optionally formed p-ZnSe buffer layer, a p-Zn1-xMgxSySe1-y layer, an i-Zn1-xMgxSySe1-y layer, an n-Zn1-xMgxSySe1-y layer, an n-electrode and an optionally provided antireflection film. Incidence light arrives at the i-layer without passing ZnTe layers. Since the incidence light is not absorbed by ZnTe layers, high quantum efficiency and high sensitivity are obtained.Type: GrantFiled: July 16, 2003Date of Patent: March 1, 2005Assignee: Sumitomo Electric Industries, Ltd.Inventors: Koshi Ando, Tomoki Abe, Takao Nakamura
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Patent number: 6853015Abstract: A modulation doped multiple quantum well structure having a steep Zn profile of several nm by the balance between an increase in a Zn concentration and a decrease in Zn diffusion by using metal organic vapor phase epitaxy using Zn, in which an InGaAlAs quaternary alloy is used and the Zn concentration and the range for crystal composition are defined to equal to or less than the critical concentration at which Zn diffuses abruptly in each of InGaAlAs compositions.Type: GrantFiled: June 19, 2002Date of Patent: February 8, 2005Assignee: Hitachi, Ltd.Inventor: Tomonobu Tsuchiya
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Patent number: 6849881Abstract: An optical semiconductor device with a multiple quantum well structure, is set out in which well layers and barrier layers, comprising various types of semiconductor layers, are alternately layered. The device well layers comprise a first composition based on a nitride semiconductor material with a first electron energy. The barrier layers comprise a second composition of a nitride semiconductor material with electron energy which is higher in comparison to the first electron energy. The well and barrier layers are in the direction of growth, by a radiation-active quatum well layer which with the essentially non-radiating well layers (6a) and the barrier layers (6b), arranged in front, form a supperlattice.Type: GrantFiled: November 20, 2000Date of Patent: February 1, 2005Assignee: Osram GmbHInventors: Volker Harle, Berthold Hahn, Hans-Jürgen Lugauer, Helmut Bolay, Stefan Bader, Dominik Eisert, Uwe Strauss, Johannes Völkl, Ulrich Zehnder, Alfred Lell, Andreas Weimer
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Patent number: 6809350Abstract: A quantum well made out of a the stack of layers of III-V semiconductor materials comprises, in addition to the quantum well, an electron storage layer separated from the quantum well by a transfer barrier layer. The barrier layer has a thickness that is greater than the thickness of the quantum well by about one order of magnitude. This barrier thus enables the separation of the absorption function (in the quantum well) and the function of reading the photocarriers (in the storage layer) and therefore the limiting of the rate of recombination of the carriers, thus improving the performance characteristics of the detector.Type: GrantFiled: June 9, 1999Date of Patent: October 26, 2004Assignee: Thomson-CSFInventors: Vincent Berger, Philippe Bois
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Patent number: 6791126Abstract: A bipolar heterojunction transistor (HBT) includes a collector layer, a base layer formed on the collector layer, a first transition layer formed on the base layer, an emitter layer formed on the first transition layer, a second transition layer formed on the emitter layer, and an emitter cap layer formed on the second transition layer. Each of the first and second transition layers is formed of a composition that contains an element, the mole fraction of which is graded in such a manner that the conduction band of the HBT is continuous through the base layer, the first and second transition layers, the emitter layer and the emitter cap layer.Type: GrantFiled: May 30, 2003Date of Patent: September 14, 2004Assignee: National Cheng Kung UniversityInventors: Wen-Chau Liu, Shiou-Ying Cheng
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Patent number: 6787819Abstract: A retrograde well structure for a CMOS imager that improves the quantum efficiency and signal-to-noise ratio of the imager. The retrograde well comprises a doped region with a vertically graded dopant concentration that is lowest at the substrate surface, and highest at the bottom of the well. A single retrograde well may have a single pixel sensor cell, multiple pixel sensor cells, or even an entire array of pixel sensor cells formed therein. The highly concentrated region at the bottom of the retrograde well repels signal carriers from the photosensor so that they are not lost to the substrate, and prevents noise carriers from the substrate from diffusing up into the photosensor. Also disclosed are methods for forming the retrograde well.Type: GrantFiled: November 18, 2002Date of Patent: September 7, 2004Assignee: Micron Technology, Inc.Inventors: Howard E. Rhodes, Mark Durcan
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Patent number: 6781211Abstract: Disclosed is a photodiode with improved light-receiving efficiency and coupling effect with an optical fiber, whose capacitance may be decreased. The inventive photodiode includes a substrate; a buffer layer and a light-absorbing layer laminated in sequence on the substrate; an epitaxial layer formed on the upper surface of the light absorbing layer and having an active region with a surface in a convex lens shape so that it has greater surface area and more effective light-receiving area than an active region defined in a two-dimensional plane, the active region further having a convex surface can harvest light with its convex-lens characteristics; a dielectric layer formed on the upper surface of the epitaxial layer; a first metal electrode formed on an upper surface of the dielectric layer; and, a second metal electrode formed on an under surface of the substrate.Type: GrantFiled: January 17, 2003Date of Patent: August 24, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Hwa-Young Kang, Jung-Kee Lee
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Patent number: 6781165Abstract: A hetero-junction bipolar transistor includes a collector layer, a base layer and an emitter layer, an emitter electrode containing Au being provided for the emitter layer, and an Au-diffusion barrier layer of InP or InGaP interposed between the emitter electrode and the base layer.Type: GrantFiled: January 22, 2003Date of Patent: August 24, 2004Assignee: Fujitsu Quantum Devices LimitedInventor: Hiroyuki Oguri
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Patent number: 6768139Abstract: A transistor configuration for a bandgap circuit is configured in the form of an npn transistor. An insulated p-type well, which is surrounded by a buried n-type well, is used as a base terminal. The n-type well constitutes the emitter terminal. A negatively doped region, which acts as a collector terminal, is formed in the p-type well. The structure that is used exists in DRAM processes, and it can therefore be used to form an npn transistor as a footprint diode in bandgap circuits.Type: GrantFiled: August 12, 2002Date of Patent: July 27, 2004Assignee: Infineon Technologies AGInventors: Helmut Fischer, Jürgen Lindolf