Abstract: A charge transfer device formed on a semiconductor substrate comprising: a charge transfer section formed on the semiconductor substrate for transferring charges, a floating gate having a floating gate diffusion layer formed on the semiconductor substrate for accumulating the charges transferred from the charge transfer section, an output gate section formed between the charge transfer section and the floating gate on the semiconductor substrate, and a charge detecting circuit electrically connected to the floating gate for outputting a voltage corresponding to the amount of the charges accumulated in the floating gate diffusion layer, the output gate section having a first output gate region adjacent to the charge transfer means and a second output gate region adjacent to the floating gate diffusion layer, the first output gate region having a first output gate electrode formed thereon with an insulating film therebetween, the second output gate region having a second output gate electrode formed thereon wit

Abstract: A solid state imaging device includes a plurality of picture photosensitive pixels (pixel trains P.sub.1 -P.sub.n) for generating signal charges corresponding to an incident light amount, a shift gate (12) and a charge coupled device (CCD) register. (13) for sequentially transferring the signal charges outputted from the picture photosensitive pixels, and a monitor photosensitive pixel for generating signal charges in proportion to a mean value of the incident light amount of a predetermined number of the picture photosensitive pixels. The device further includes a single output circuit for converting both signal charges, one of which are generated in the picture photosensitive pixels and transferred through the shift, gate and CCD register, and the other of which are generated in the monitor photosensitive pixels, into an output signal, thereby providing the solid state imaging device capable of accurately measuring a mean value of the signal charges of the picture photosensitive pixels.

Abstract: A device for producing an output voltage which is proportional to an applied magnetic field. The device includes a plurality charge injection regions, a corresponding plurality of charge exit regions, and a charge transfer region. The charge transfer region includes gate electrodes which serve to propagate at least one isolated charge packet across the charge transfer region in a predetermined direction from the charge input region to the charge output region. The charge packet is subject to the applied magnetic field which is perpendicular to the charge transfer region so as to induce a resultant potential that is orthogonal to both the applied magnetic field and the predetermined direction. Furthermore, the resultant potential effects a lateral redistribution of charge carriers in the packet. A recirculation configuration allows for a recycling of the packet from the output region back to the input region in order to accommodate a continuation of the redistribution of charge carriers.

Abstract: The invention relates to a semiconductor device with which input signals can be weighted and the weighted input signals can be summed, and which in conjunction with a neuron can be used, for example, as a synapse in a neural network. The device comprises a number of switched capacitances with a common capacitor plate formed by a surface region 3 in a p-type substrate 1. The region 3 is connected to the inverting input of an amplifier 11 whose +input is connected to a reference voltage and whose output 12 supplies the summed output signal. The output 12 can be fed back to the input 3 via switch S. The other plate of the capacitances is formed by an electrode 6a, 6b, 6c, which can be switched between a reference voltage and an input source. The weight factors are stored in the form of electric charges on a floating gate 5a, 5b, 5c, which is provided between each input electrode 6 and the surface region 3.

Abstract: The process tracking bias generator for antiblooming structures includes a lateral overflow antiblooming drain and bias circuitry coupled to the antiblooming drain for automatically adjusting a bias for the antiblooming drain independent of process variations.

Abstract: A CCD delay line comprises of first, second and third transfer regions which are formed in a semiconductor substrate. Output portions of the second and third transfer regions are connected to a differential amplifier. The output terminal of the differential amplifier is connected to input sources of the first and second transfer regions. The third transfer region is able to carry at most 30% of maximum amount of charge which the first and second transfer regions can carry. A signal is supplied from a signal source through a clamp circuit to an input gate electrode of the first transfer region. Bias changing means independently change one of an input bias voltage supplied to the input gate electrode of the first transfer region and a reference bias voltage supplied to an input gate electrode of the second transfer region.

Abstract: There is disclosed a solid-state image sensor comprising: photo-detecting devices arranged in a matrix structure for receiving external light signals; vertical charge transfer device interposed between the columns of said photo-detecting device for vertically transferring the charges produced from said photo-detecting device according to external control signal; first horizontal charge transfer device for horizontally transferring the charges coming out of said vertical charge transfer device according to external control signal; output control device for controlling the charges flowing from said first horizontal charge transfer device to said output device; second horizontal charge transfer device for transferring the output charges of said first horizontal charge transfer device controlled by said output control device to said vertical charge transfer device according to external control signal; and a feedback line for connecting the output of said first horizontal charge transfer device to the input of sai

Abstract: A charge-coupled device has a multi-layer structure insulating layer is formed beneath a transfer electrode, floating electrodes and an electrode adjacent the floating electrodes so that pin hole phenomenon in a charge transfer section of the charge coupled device can be successfully prevented. On the other hand, a sole-layer structure insulating layer is formed beneath a gate electrode of a peripheral component so that a threshold voltage of the gate electrode of the peripheral component can be successfully controlled at a desired value.

Abstract: An input structure of CCD comprises a primary register having an input gate and a source region and an automatic biasing system which generates a feedback signal to be fed back to input of the primary register. The output of the automatic biasing system is connected to one of the input gate and the source of the primary register for supplying the feedback signal thereto for adjusting input bias level of the primary register. The other one of the input gate and the source is connected to an information signal input terminal to receive therefrom an information signal to be transferred therethrough.