Abstract: A magnetoresistive memory element has a read module with a first pinned layer that has a magnetoresistance that is readable by a read current received from an external circuit. The element has a write module that receives a write current from the external circuit. A coupling module adjacent both the write module and the read module has a free layer that functions as a shared storage layer for both the read module and the write module. The shared storage layer receives spin torque from both the read module and the write module and has a magnetization that is rotatable by the write current.

Abstract: A Hall element is provided which has a high sensitivity and contributes to an improvement in S/N ratio per current by using a low-concentration n-well within a suitable range. The Hall element includes a p-type semiconductor substrate layer 21 of p-type silicon, and an n-type impurity region 22 located in a surface of the p-type semiconductor substrate layer 21, the n-type impurity region 22 functioning as a magnetic sensing part 26. A p-type impurity region 23 is located in a surface of the n-type impurity region 22, and n-type regions 24 are located laterally of the p-type impurity region 23. A p-type substrate region 21a having a resistivity equal to that of the p-type semiconductor substrate layer 21 is located to extend around the n-type impurity region 22. An impurity concentration N in the n-type impurity region 22 functioning as the magnetic sensing part 26 is preferably from 1×1016 to 3×1016 (atoms/cm3), and a distribution depth D of the impurity concentration is preferably from 3.0 ?m to 5.0 ?m.

Abstract: Disclosed are embodiments of a semiconductor structure and method of forming the structure with selectively adjusted reflectance and absorption characteristics in order to selectively control temperature changes during a rapid thermal anneal and, thereby, to selectively control variations in device performance and/or to selectively optimize the anneal temperature of such devices. Selectively controlling the temperature changes in different devices during a rapid thermal anneal is accomplished by selectively varying the isolation material thickness in different sections of a shallow trench isolation structures. Alternatively, it is accomplished by selectively varying the pattern of fill structures in different sections of a semiconductor wafer so that predetermined amounts of shallow trench isolation regions in the different sections are exposed.

Abstract: A magnetic transistor includes a first magnetic section, a second magnetic section, a conductive section, a first metal terminal, and a second metal terminal. The conductive section is disposed between and is in direct contact with both the first and second magnetic section. The first metal terminal is disposed on one end of an opposite surface to the conductive section of the first magnetic section. The second metal terminal is disposed on one end approximately diagonal to the first metal terminal on an opposite surface to the conductive section of the second magnetic section. While the magnetic transistor structure is turned on, a current flows through the first magnetic section and the second magnetic section via the conductive section.

Abstract: A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated circuit die to the first integrated circuit die, and encapsulating the second integrated circuit die along a second side of the substrate.

Abstract: An electric field read/write head, a method of manufacturing the same, and a data read/write device including the electric field read/write head are provided. The data read/write device includes an electric field read/write head which reads and writes data to and from a recording medium. The electric field read/write head includes a semiconductor substrate, a resistance region, source and drain regions, and a write electrode. The semiconductor substrate includes a first surface and a second surface with adjoining edges. The resistance region is formed to extend from a central portion at one end of the first surface to the second surface. The source region and the drain region are formed at either side of the resistance region and are separated from the first surface. The write electrode is formed on the resistance region with an insulating layer interposed between the write electrode and the resistance region.

Abstract: An embodiment of the invention is a transistor formed in part by a ferromagnetic semiconductor with a sufficiently high ferromagnetic transition temperature to coherently amplify spin polarization of a current. For example, an injected non-polarized control current creates ferromagnetic conditions within the transistor base, enabling a small spin-polarized signal current to generate spontaneous magnetization of a larger output current.

Abstract: An optically coupled resonator includes a resonator body having at least one resonator sidewall and a laterally offset photodiode formed in a semiconductor substrate adjacent to the resonator body. The resonator is driven by an electric field generated between the laterally offset photodiode and the resonator body when an incident light strikes the photodiode. A device including an optically coupled resonator and a method of operating an optically coupled resonator are also disclosed.

Abstract: A tri-state RF MEMS switch includes: a first well formed in a first substrate; a first input signal line and a first output signal line forming a first gap therebetween in the first well; a post bar forming a boundary between the second well and third well in the second substrate; a second input signal line and a second output signal line, and a third input signal line and a third output signal line forming a second gap and a third gap in the second well and the third well, respectively; and a membrane disposed between the first substrate and the second substrate such that the membrane crosses the first, second and third gaps, the membrane including a first conductive pad, a second conductive pad, and a third conductive pad thereon to face the first, second and third gaps, respectively.

Abstract: A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip. As such, the first and second chips may be placed in close proximity and electrically connected together or alternatively have no intentional electrical interaction.

Abstract: An MTJ MRAM cell is formed between or below an intersection of ultra-thin orthogonal word and bit lines of high conductivity material whose thickness is less than 100 nm. Lines of this thickness produce switching magnetic fields at the cell free layer that are enhanced by a factor of approximately two for a given current. The fabrication of a cell with such thin lines is actually simplified as a result of the thinner depositions because the fabrication process eliminates the necessity of removing material by CMP during patterning and polishing, thereby producing uniform spacing between the lines and the cell free layer.

Abstract: A sensor package apparatus includes a lead frame substrate that supports one or more electrical components, which are connected to and located on the lead frame substrate. A plurality of wire bonds are also provided, which electrically connect the electrical components to the lead frame substrate, wherein the lead frame substrate is encapsulated by a thermoset plastic to protect the plurality of wire bonds and at least one electrical component, thereby providing a sensor package apparatus comprising the lead frame substrate, the electrical component(s), and the wire bonds, while eliminating a need for a Printed Circuit Board (PCB) or a ceramic substrate in place of the lead frame substrate as a part of the sensor package apparatus. A conductive epoxy and/or solder can also be provided for maintaining a connection of the electrical component(s) to the lead frame substrate. The electrical components can constitute, for example, an IC chip and/or a sensing element (e.g.

Abstract: A thin film device includes a thin film element disposed on a surface of a substrate for high voltage formed of a material having an electric resistivity in the range of 108 ?·cm to 1010 ?·cm, with an adhesive layer in between. The substrate for high voltage is a sintered body containing Al2O3, TiC, and MgO in a predetermined weight ratio. Therefore, if electric charges are generated in the thin film element, the electric charges are, while they are not accumulated in large amounts, gradually shifted via the adhesive layer to the substrate for high voltage, so that the generation of ESD can be suppressed. On the other hand, even when mounted on a lead frame, a sufficient dielectric breakdown voltage can be ensured. This provides a thin film device that is less susceptible to damage due to ESD, and has superior withstand voltage characteristic to permit a stable operation.

Abstract: A Hall sensor on a semiconductor substrate includes a Hall plate in the semiconductor substrate, where the Hall plate includes a first zone having a first conduction type. The semiconductor substrate also include a second zone having a second conduction type. A space-charge zone in the semiconductor substrate separates the first zone and the second zone, first contacts supply a control current to the first zone, and second contacts supply a compensation current to the second zone.

Abstract: Methods and apparatus are disclosed for selectively inducing stress in a semiconductor device, wherein a first region of a substrate is implanted so as to induce stress in a second region. An electrical device is formed at least partially in the second region, wherein the induced stress therein may improve one or more operational characteristics of the device, such as channel region carrier mobility.

Abstract: A thin film sensing device operates based on a spin polarized current. The spin device includes ferromagnetic layers characterized by different coercivities and/or magnetization states, and one or more low transmission barriers in between. The device is further configured so that the spin polarized current flows at least in part in a direction perpendicular to the aforementioned layers.

Abstract: A vertical Hall device includes: a substrate; a semiconductor region having a first conductive type and disposed in the substrate; and a magnetic field detection portion disposed in the semiconductor region. The magnetic field detection portion is capable of detecting a magnetic field parallel to a surface of the substrate in a case where a current flows through the magnetic field detection portion in a vertical direction of the substrate. The semiconductor region is a diffusion layer including a conductive impurity doped and diffused therein. The semiconductor region is made of diffusion layer so that the device has high design degree of freedom.

Abstract: A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip.

Abstract: A magnetic random access memory with lower switching field is provided. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, and a multi-layered metal layer. The multi-layered metal layer is formed by at least one metal layer, where the direction of the anisotropy axis of the antiferromagnetic layer and the ferromagnetic layer and that of the ferromagnetic free layer are arranged orthogonally. The provided memory has the advantage of lowering the switching field of the ferromagnetic layer, and further lowering the writing current.

Abstract: A method of forming a magneto-resistive memory element includes forming a groove in a layer of insulating material. A liner is formed conformably within the groove and the groove is filled with copper and then planarized. The electrically conductive material is provided an upper surface that is recessed relative to the upper surface of the layer of insulating material. A cap, which can be conductive (e.g., Ta) or resistive (e.g., TiAIN), is disposed over the electrically conductive material and within the groove. A surface of the cap that faces away from the electrically conductive material, is formed with an elevation substantially equal to that of the edge of the liner, or the cap can extend over the liner edge. At least one layer of magneto-resistive material is disposed over a portion of the cap. Advantageously, the cap can protect the copper line from harmful etch processes required for etching a MRAM stack, while keeping the structure planar after CMP.

Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.

Abstract: A magnetic sensor device formed using SOI CMOS techniques includes a substrate, a silicon oxide layer and in some cases a plurality of gated regions. A first terminal is located between two innermost gated regions and supplies a supply voltage. A second and a third terminal, each of which is located between two adjacent gated regions other than the two innermost gated regions, output positive and negative Hall voltages. By appropriately controlling a bias voltage to the gated regions, small changes in a magnetic field induces larger currents in channel regions under the gated regions, which, in turn, results in detectable Hall voltages.

Abstract: In a magnetic random access memory for generating an inductive magnetic flux by passing current into write wirings disposed closely to MTJ elements, whose resistance values varying depending on the magnetization array state of two magnetic layers of MTJ elements including two magnetic layers that hold a non-magnetic layer correspond to the stored information of “0”/“1”, and writing information by varying the magnetization direction of a free layer of the MTJ elements, the shape of the MTJ elements is warped so as to coincide substantially with the magnetic field curve generated from the write wirings.

Abstract: A spin valve transistor, magnetic reproducing head including a spin valve transistor and a magnetic information storage system having the spin valve transistor. The spin valve transistor has a collector, a base formed on the collector, a tunnel barrier layer formed on the base and an emitter formed on the tunnel barrier layer. In one embodiment, the collector may have a first semiconductor layer of first composition and a second semiconductor layer of a different composition epitaxially grown. The base of the first spin valve transistor may be formed on the second semiconductor layer and have a magnetization pinned layer having a magnetization substantially fixed in an applied magnetic field, a nonmagnetic layer and a magnetization free layer having a magnetization free to rotate under the applied magnetic field. The emitter of a spin valve transistor of a second embodiment may include a semiconductor layer containing an oxide of transitional metal and contacting the tunnel barrier layer.

Abstract: A method and structure for a microelectronic device comprises a first film over a substrate, a first polish resistant layer over the first film, a second film over the first polish resistant layer, a second polish resistant layer over the second film, wherein the first and second polish resistant layers comprise diamond-like carbon. The first film comprises an electrically resistive material, while the second film comprises low resistance conductive material. The first film is an electrical resistor embodied as a magnetic read sensor. The electrically resistive material is sensitive to magnetic fields. The device further comprises a generally vertical junction between the first and second films and a dielectric film abutted to the electrically resistive material.

Abstract: The invention is a magnetic device, i.e., a magnetoresistive sensor or a magnetic tunnel junction device, that has a ferromagnetic structure of two ferromagnetic layers antiferromagnetically coupled together with an improved antiferromagnetically coupling (AFC) film. The AFC film is an alloy of Ru100-xFex where x is between approximately 10 and 60 atomic percent. This AFC film increases the exchange coupling by up to a factor or two and has an hcp crystalline structure making it compatible with Co alloy ferromagnetic layers.

Abstract: A semiconductor magnetic sensor includes a semiconductor substrate, a source, a drain, a gate, and a carrier condensing means. The source and the drain are located in a surface of the substrate. One of the source and the drain includes adjoining two regions. The gate is located between the source and the drain for drawing minority carriers of the substrate to induce a channel, through which the carriers flow between the source and the drain to form a channel carrier current. The carriers flow into the two regions to form two regional carrier currents. The magnitude of a magnetic field where the sensor is placed is measured using the difference in quantity between the two regional carrier currents. The carrier condensing means locally increases carrier density in the channel carrier current in the proximity of an axis that passes between the two regions in order to increase the difference.

Abstract: A semiconductor memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction differing from the first direction, and a magneto resistive element arranged between the first and second wirings and comprising a first portion and a second portion, the second portion being in contact with the second wiring and extending along the second wiring to reach an outside region positioned outside the first portion.

Abstract: Nanoelectromechanical switch systems (NEMSS) are provided that utilize the mechanical manipulation of nanotubes. Such NEMSS may realize the functionality of, for example, automatic switches, adjustable diodes, amplifiers, inverters, variable resistors, pulse position modulators (PPMs), and transistors. In one embodiment, a nanotube is anchored at one end to a base member and coupled to a voltage source that creates an electric charge at the tip of the nanotube's free-moving-end This free-moving end may be electrically controlled by applying an additional electric charge, having the same (repelling) or opposite (attracting) polarity as the nanotube, to a nearby charge member layer. A contact layer is located in the proximity of the free-moving end such that when a particular electric charge is provided to the nanotube (or charge member layer), the nanotube electrically couples with the contact layer.

Abstract: A detector includes a voltage source for providing a bias voltage and first and second non-insulating layers, which are spaced apart such that the bias voltage can be applied therebetween and form an antenna for receiving electromagnetic radiation and directing it to a specific location within the detector. The detector also includes an arrangement serving as a transport of electrons, including tunneling, between and to the first and second non-insulating layers when electromagnetic radiation is received at the antenna. The arrangement includes a first insulating layer and a second layer configured such that using only the first insulating in the arrangement would result in a given value of nonlinearity in the transport of electrons while the inclusion of the second layer increases the nonlinearity above the given value. A portion of the electromagnetic radiation incident on the antenna is converted to an electrical signal at an output.

Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.

Abstract: A semiconductor Hall sensor can reduce measuring error due to an unbalanced voltage by decreasing the unbalanced voltage, and improve resistance to electrostatic by suppressing maximum electric field in the sensor. A cross-shaped pattern of the semiconductor Hall sensor includes cutouts at its concave corners. Among the four concave corners of the cross-shaped pattern, consecutive two or four concave corners are provided with the cutouts. Besides, among the four concave corners of the cross-shaped patterns, the consecutive two or four concave corners have an acute angle at the intersection of the input terminal side pattern and output terminal side pattern. The semiconductor Hall sensor becomes insensitive to defects or unbalance of its pattern, thereby being able to reduce the unbalanced voltage as compared with a conventional cross-shaped pattern of the semiconductor Hall sensor.

Abstract: A magnetic memory device includes a magnetoresistance configured to store information. A first wiring is provided along a first direction. The first wiring has a function of applying a magnetic field to the magnetoresistance element. The first wiring has a first surface and a second surface. The second surface faces the magnetoresistance element and the first surface is opposite to it. The second surface is smaller in width than the first surface.

Abstract: A ferromagnetic thin-film based digital memory cell with a memory film of an anisotropic ferromagnetic material and with a source layer positioned on one side thereof so that a majority of conduction electrons passing therefrom have a selected spin orientation to be capable of reorienting the magnetization of the film. A disruption layer is positioned on the other side of the memory film so that conduction electrons spins passing therefrom are substantially random in orientation. The magnitude of currents needed to operate the cell can be reduced using coincident thermal pulses to raise the cell temperature.

Abstract: A magnetic sensor uses injection of spin-polarized electrons between magnetized regions via a semiconductor and spin precession of electrons that a magnetic field being measured causes in the semiconductor. The sensor can include donor n+-doped &dgr;-layers and acceptor doped transition layers at one or both interfaces between magnetized regions and the semiconductor region. The properties of the &dgr;-doped layers and the transition layers can be adjusted to improve efficiency of injection of spin-polarized electrons into the semiconductor at small voltage between about 25 and 50 mV. One geometry for the sensor has the magnetized regions that are laterally spaced apart on a major surface of a substrate with the semiconductor being either between or adjacent to the magnetic regions to form a current path for spin-polarized electrons.

Abstract: A magnetic memory device based on easy domain wall propagation and the extraordinary Hall effect includes a perpendicular-to-plane a magnetic electrically conductive element (2) that includes a memory node (3). Electrical conductors (12-15) surround the node (3) so that when energised, a magnetic field is produced to change the magnetization state of the node (3). In memory state “0” a magnetic domain is pinned within tapered portion (5) of the element (2). When a magnetic field is applied to the device, the domain (D) becomes unpinned and extends into the node (3) to produce a “1” state. The state of magnetization is sensed by means of a Hall contact (11). The current pulse (Jc) is applied through the element (2) so that the Hall voltage can be detected.

Abstract: A contactless acceleration switch detects a threshold acceleration value when a mass attached to a spring, moves towards a source, a drain, and a threshold adjustment channel implanted in a substrate layer. The threshold adjustment channel is located between the source and the drain. The implanted area is located between insulator posts. A spring is attached to the insulator posts. A mass is held above the implanted area by the spring. When the threshold acceleration value is detected, the mass moves towards the substrate layer. The threshold adjustment channel then inverts causing current to flow between the source and the drain, providing an electrical signal indicating that the threshold acceleration value has been reached.

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface: and (b) a ferromagnetic multilayer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can be a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract: A semiconductor memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction differing from the first direction, and a magneto resistive element arranged between the first and second wirings and including a first portion and a second portion, the second portion being in contact with the second wiring and extending along the second wiring to reach an outside region positioned outside the first portion.

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface; and (b) a ferromagnetic layer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can have a ferromagnetic element that is a multilayer (e.g., a bilayer), and a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract: Techniques of shallow trench isolation and devices produced therefrom. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such techniques facilitate lower dielectric constants than the standard silicon dioxide due to the cells of gaseous components inherent in foamed polymers, cured aerogels or air gaps. Lower dielectric constants reduce capacitive coupling concerns and thus permit higher device density in an integrated circuit device.

Abstract: A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no more than about a monolayer of material, capable of completely filling high aspect ratio trenches. Additionally, the trench-fill material composition can be tailored by processes described herein, particularly to match the coefficient of thermal expansion (CTE) to that of the surrounding substrate within which the trench is formed. Mixed phases of mullite and silica have been found to meet the goals of device isolation and matched CTE. The described process includes mixing atomic layer deposition cycles of aluminum oxide and silicon oxide in ratios selected to achieve the desired composition of the isolation material, namely on the order of 30% alumina and 70% silicon oxide by weight.

Abstract: A microelectromechanical system (MEMS) device is disclosed for determining the position of a mover. The MEMS device has a bottom layer connected to a mover layer. The mover layer is connected to a mover by flexures. The mover moves relative to the mover layer and the bottom layer. The flexures urge the mover back to an initial position of mechanical equilibrium. The flexures include coupling blocks to control movement of the mover. The MEMS device determines the location of the mover by determining the capacitance between mover electrodes located on the coupling blocks of the flexures and counter electrodes located on an adjacent layer. The coupling block moves according to a determinable relationship with the mover. As the coupling block moves, the capacitance between the mover electrode and the counter electrode changes. A capacitance detector analyzes the capacitance between the electrodes and determines the position of the mover.

Abstract: A sensor device that provides a relatively uniform electric field between a diaphragm and a substrate, regardless of the displacement of the diaphragm is disclosed. The sensor device provides a uniform spacing between the diaphragm and the substrate over a selected range of diaphragm displacements. A double layer diaphragm is disclosed that includes an upper support member and a lower electrode plate. The lower electrode plate is attached to the upper support member by a post member, and the post member is only attached to the center region of the support member. In another embodiment, an electro-mechanically controlled switch sensor is provided that uses an electrostatic force between the diaphragm and the substrate to produce a bi-stable snapping action.

Abstract: A symmetric magnetic tunnel device including first and second magnetic tunnel junctions each including a pinned magnetic layer, an insulating tunnel layer and a free magnetic layer stacked in parallel juxtaposition to allow tunneling of electrons through the insulating tunnel layer between the pinned and free magnetic layers. The first and second magnetic tunnel junctions positioned in parallel juxtaposition so as to form a continuous electron path through the first and second magnetic tunnel junctions and to provide a cell signal across the first and second magnetic tunnel junctions greater than a cell signal across each of the first and second magnetic tunnel junctions individually.

Abstract: A magnetic tunnel junction (MTJ) memory cell uses a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the free ferromagnetic layer in the MTJ stack to provide transverse and/or longitudinal bias fields to the free ferromagnetic layer. The MTJ is formed on an electrical lead on a substrate and is made up of a stack of layers.

Abstract: A device for producing circularly polarized optical emission includes a light emitting semiconductor heterostructure, further including at least one semiconducting layer; a ferromagnetic contact having a magnetic moment, in electrical contact with a layer of the semiconductor heterostructure; and a contact electrically connected to a different region of the semiconductor heterostructure. This light emitting semiconductor heterostructure may be a light emitting diode (LED), or some other structure. The ferromagnetic contact injects spin polarized carriers (electrons or holes) into the semiconducting device, which recombine with their opposing carriers to produce circularly polarized light. A process for producing circularly polarized optical emission includes applying a bias across a light emitting semiconductor heterostructure having a contact with a net magnetic moment, therby injecting spin polarized carriers into the light emitting semiconductor heterostructure.

Abstract: A semiconductor structure is disclosed in which two regions of semiconductor material positioned adjacent to each other have different electron mobilities. By application of a magnetic field to the device, a Hall voltage is created across the boundary region between the regions of semiconductor material to modify their resistance. By detecting the change in resistance, the device can function as a memory cell, a programmable logic device, a head for hard disk drives, a measurement tool for measuring magnetic fields, or other apparatus.

Abstract: There is disclosed a semiconductor integrated circuit device in which a semiconductor integrated circuit substrate provided with an electromagnetic coil from which lead wires are drawn out is movably arranged within a magnetic field. When a current is caused to flow in the magnetic coil through the conductors, a force in the direction of a magnetic field is exerted on the electromagnetic coil. Thus, this semiconductor integrated circuit device can operate as an actuator allowing the entirety of the substrate to be movable in either a positive or a negative direction the magnetic field. When the substrate is moved interlocking with a measurement object, an induced current flows in the electromagnetic coil. Accordingly, by measuring this current, it is possible to operate this device as a sensor capable of measuring changes in the physical quantity, etc. of the measurement object.

Abstract: A Hall generator includes a substrate body of single crystalline semi-insulating gallium arsenide having a surface. A thin layer, no greater than about 5 micrometers in thickness, of single crystalline indium arsenide is on the surface of the body and is in the form of four arms joined at a common point to form a cross. A separate metal contact is on each of the arms at the free end thereof. An accumulation layer is adjacent the outer surface of the indium arsenide layer and extends along the entire surface of the indium arsenide layer between the contacts. The accumulation layer is effective to provide a magnetic sensitivity and range of operating temperatures as if the indium arsenide layer was much thinner and had a much higher electron density and electron mobility. Electrical devices, such as field effect transistors, may be formed in the body and the surface and electrically connected to the contacts of the Hall generator in a desired circuit.