Magnetic Field Detector Using Compound Semiconductor Material (e.g., Gaas, Insb, Etc.) Patents (Class 257/425)
  • Patent number: 8492862
    Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Keiji Sato
  • Patent number: 8487391
    Abstract: There is provided a magnonic-crystal spin wave device capable of controlling a frequency of a spin wave. The magnonic-crystal spin wave device according to the invention includes a spin wave waveguide made of magnetic material, and the spin wave waveguide guides the spin wave so as to propagate in one direction, and includes a magnonic crystal part which has a cross-section orthogonal to the direction, and at least one of a shape, area size, and center line of the cross-section periodically changes in the direction. In accordance with the invention, it is possible to easily control the frequency of the spin wave using the spin wave waveguide made of single magnetic material.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 16, 2013
    Assignee: Seoul National University Industry Foundation
    Inventors: Sang-koog Kim, Ki-suk Lee, Dong-soo Han
  • Patent number: 8486723
    Abstract: A method and structure for a three-axis magnetic field sensing device is provided. The device includes a substrate, an IC layer, and preferably three magnetic field sensors coupled to the IC layer. A nickel-iron magnetic field concentrator is also provided.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: July 16, 2013
    Assignee: MCube Inc.
    Inventors: Hong Wan, Xiao “Charles” Yang
  • Patent number: 8482033
    Abstract: In one embodiment, a semiconductor structure is provided which includes a base substrate, and a multilayered stack located on the base substrate. The multilayered stack includes, from bottom to top, a first sacrificial material layer having a first thickness, a first semiconductor device layer, a second sacrificial material layer having a second thickness, and a second semiconductor device layer, wherein the first thickness is less than the second thickness.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: July 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Ning Li, Kuen-Ting Shiu
  • Publication number: 20130069186
    Abstract: According to one embodiment, a magnetoresistive element comprises a first magnetic layer having a magnetization direction invariable and perpendicular to a film surface, a tunnel barrier layer formed on the first magnetic layer, and a second magnetic layer formed on the tunnel barrier layer and having a magnetization direction variable and perpendicular to the film surface. The first magnetic layer includes an interface layer formed on an upper side in contact with a lower portion of the tunnel barrier layer, and a main body layer formed on a lower side and serving as an origin of perpendicular magnetic anisotropy. The interface layer includes a first area provided on an inner side and having magnetization, and a second area provided on an outer side to surround the first area and having magnetization smaller than the magnetization of the first area or no magnetization.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaru TOKO, Masahiko NAKAYAMA, Akihiro NITAYAMA, Tatsuya KISHI, Hisanori AIKAWA, Hiroaki YODA
  • Patent number: 8389911
    Abstract: Permanent magnets are arranged at the interior of a rotating body at uniform intervals. The device comprises: a rotating body which is rotated by a motor; a heat generation part, which is disposed in the vicinity of the rotating body, which includes an electroconductive material, and which is disposed within the magnetic fields of the permanent magnets; and a hot air capture plate, which is disposed in the vicinity of the heat generation part, and in which a plurality of hot air flow passage holes are provided, the rotating body being rotated by a rotating shaft, which is coupled to the motor. Furthermore, a thermocouple may be connected to the heat generation part, and the heat energy that would be dissipated to the outside air is converted to electrical energy by the thermocouple. Furthermore, the electromagnetic induction device is constituted such that a hot air capture plate, in which a plurality of hot air flow passage holes are provided, is disposed in the vicinity of the heat generation part.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: March 5, 2013
    Inventor: Tsugumitsu Matsui
  • Patent number: 8357983
    Abstract: A Hall effect element includes a Hall plate having geometric features selected to result in a highest ratio of a sensitivity divided by a plate resistance. The resulting shape is a so-called “wide-cross” shape.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: January 22, 2013
    Assignee: Allegro Microsystems, Inc.
    Inventor: Yigong Wang
  • Patent number: 8345390
    Abstract: An MR element according to the present invention has the superior effects that further improve an MR ratio because a structure of a spacer layer 40 is configured of a certain three-layer structure with certain materials, and at least one of a first ferromagnetic layer 30 and a second ferromagnetic layer 50 contains a certain amount of an element selected from the group of nitrogen (N), carbon (C), and oxygen (O).
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: January 1, 2013
    Assignee: TDK Corporation
    Inventors: Yoshihiro Tsuchiya, Shinji Hara, Tsutomu Chou, Hironobu Matsuzawa
  • Patent number: 8335059
    Abstract: A magnetoresistive effect element includes a first ferromagnetic layer, Cr layer, Heusler alloy layer, barrier layer, and second ferromagnetic layer. The first ferromagnetic layer has the body-centered cubic lattice structure. The Cr layer is formed on the first ferromagnetic layer and has the body-centered cubic lattice structure. The Heusler alloy layer is formed on the Cr layer. The barrier layer is formed on the Heusler alloy layer. The second ferromagnetic layer is formed on the barrier layer.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: December 18, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mizue Ishikawa, Yoshiaki Saito, Hideyuki Sugiyama, Tomoaki Inokuchi
  • Patent number: 8243400
    Abstract: A magnetoresistive effect element includes a first ferromagnetic layer, Cr layer, Heusler alloy layer, barrier layer, and second ferromagnetic layer. The first ferromagnetic layer has the body-centered cubic lattice structure. The Cr layer is formed on the first ferromagnetic layer and has the body-centered cubic lattice structure. The Heusler alloy layer is formed on the Cr layer. The barrier layer is formed on the Heusler alloy layer. The second ferromagnetic layer is formed on the barrier layer.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: August 14, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mizue Ishikawa, Yoshiaki Saito, Hideyuki Sugiyama, Tomoaki Inokuchi
  • Patent number: 8227099
    Abstract: This radio-frequency oscillator includes a magnetoresistive device in which a spin-polarized electric current flows. This device comprises a stack of at least a first so-called “anchored” magnetic layer having a fixed magnetization direction, a second magnetic layer, an amagnetic layer inserted between the above-mentioned two layers, intended to ensure magnetic decoupling of said layers. The oscillator also comprises means of causing a flow of electrons in said layers perpendicular to these layers and, if applicable, of applying an external magnetic field to the structure. The second magnetic layer has an excitation damping factor at least 10% greater than the damping measured in a simple layer of the same material having the same geometry for magnetic excitation having wavelengths equal to or less than the extent of the cone or cylinder of current that flows through the stack that constitutes the magnetoresistive device.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: July 24, 2012
    Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche Scientifique
    Inventors: Bernard Dieny, Alina-Maria Deac-Renner
  • Patent number: 8173446
    Abstract: A method of integrating a permanent bias magnet within a magnetoresistance sensor comprising depositing an alternating pattern of a metal material and a semiconductor material on or within a surface of an insulating substrate; depositing a mask on the surface of the insulating substrate to create an opening above the alternating pattern of metal material and semiconductor material; applying a magnetic paste within the opening above the alternating pattern of metal material and semiconductor material; curing the magnetic paste to form a hardened bias magnet; removing the mask; and magnetizing the hardened bias magnet by applying a strong magnetic field to the hardened bias magnet at a desired orientation.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: May 8, 2012
    Assignee: General Electric Company
    Inventor: William Hullinger Huber
  • Patent number: 8089110
    Abstract: An embodiment of the present memory cell includes a first layer of a chosen conductivity type, and a second layer which includes ferroelectric semiconductor material of the opposite conductivity type, the layers forming a pn junction. The first layer may be a conjugated semiconductor polymer, or may also be of ferroelectric semiconductor material. The layers are provided between first and second electrodes. In another embodiment, a single layer of a composite of conjugated semiconductor polymer and ferroelectric semiconductor material is provided between first and second electrodes. The various embodiments may be part of a memory array.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: January 3, 2012
    Assignee: Spansion LLC
    Inventor: Juri H. Krieger
  • Patent number: 8030719
    Abstract: There is provided a semiconductor package that includes a first semiconductor die mounted on a package substrate. The semiconductor package further includes a second semiconductor die mounted on the first semiconductor die and including a thermal sensing and reset protection circuit. The thermal sensing and reset protection circuit is configured to determine a temperature of the first semiconductor die and to provide a reset protection signal to the first semiconductor die when the temperature of the first semiconductor die is substantially equal to a preset temperature so as to protect the first semiconductor die from thermal runaway. The reset protection signal can cause the first semiconductor die to be in a sleep mode or a reset state.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: October 4, 2011
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Xiaoming Li, Mishel Matioubian, Surinderjit Dhaliwal
  • Patent number: 7973373
    Abstract: A microminiature moving device has disposed on a single-crystal silicon substrate movable elements such as a movable rod and a movable comb electrode that are displaceable in parallel to the substrate surface and stationary parts that are fixedly secured to the single -crystal silicon substrate with an insulating layer sandwiched between. Depressions are formed in the surface regions of the single-crystal silicon substrate where no stationary parts are present and the movable parts are positioned above the depressions. The depressions form gaps large enough to prevent foreign bodies from causing shorts and malfunctioning of the movable parts.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: July 5, 2011
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Keiichi Mori, Yoshichika Kato, Satoshi Yoshida, Kenji Kondou, Yoshihiko Hamada, Osamu Imaki
  • Patent number: 7936030
    Abstract: Provided are a multi-purpose magnetic film structure using a spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor memory device. The multi-purpose magnetic film structure includes a lower magnetic film, a tunneling film formed on the lower magnetic film, and an upper magnetic film formed on the tunneling film, wherein the lower and upper magnetic films are ferromagnetic films forming an electrochemical potential difference therebetween when the lower and upper magnetic films have opposite magnetization directions.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-wan Kim, Wan-jun Park, Sang-jin Park, In-jun Hwang, Soon-ju Kwon, Young-keun Kim, Richard J. Gambino
  • Patent number: 7928524
    Abstract: A magnetoresistive element is disclosed, wherein the magnetoresistive element is composed of a synthetic anti-ferromagnetic (SAF) structure that may include a first pinned layer, an intermediate layer, and a second pinned layer; and a Cr layer between the first pinned layer and the intermediate layer and/or the second pinned layer and the intermediate layer.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: April 19, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kee-won Kim
  • Patent number: 7821088
    Abstract: A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer includes a first ferromagnetic layer and a second ferromagnetic layer. The second ferromagnetic layer has a very high perpendicular anisotropy and an out-of-plane demagnetization energy. The very high perpendicular anisotropy energy is greater than the out-of-plane demagnetization energy of the second layer.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: October 26, 2010
    Assignee: Grandis, Inc.
    Inventors: Paul P. Nguyen, Yiming Huai
  • Publication number: 20100207222
    Abstract: A Hall effect element includes a Hall plate with an outer perimeter. The outer perimeter includes four corner regions, each tangential to two sides of a square outer boundary associated with the Hall plate, and each extending along two sides of the square outer boundary by a corner extent. The outer perimeter also includes four indented regions. Each one of the four indented regions deviates inward toward a center of the Hall plate. The Hall plate further includes a square core region centered with and smaller than the square outer boundary. A portion of each one of the four indented regions is tangential to a respective side of the square core region. Each side of the square core region has a length greater than twice the corner extent and less than a length of each side of the square outer boundary.
    Type: Application
    Filed: February 19, 2009
    Publication date: August 19, 2010
    Inventor: Yigong Wang
  • Patent number: 7772659
    Abstract: The magnetic device comprises a least two layers made of a magnetic material that are separated by at least one interlayer made of a non-magnetic material. The layers made of a magnetic material each have magnetization oriented substantially perpendicular to the plane of the layers. The layer of non-magnetic material induces an antiferromagnetic coupling field between the layers made of a magnetic material, the direction and amplitude of this field attenuating the effects of the ferromagnetic coupling field of magnetostatic origin that occurs between the magnetic layers.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: August 10, 2010
    Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche Scientifique
    Inventors: Bernard Rodmacq, Vincent Baltz, Alberto Bollero, Bernard Dieny
  • Patent number: 7745893
    Abstract: A magnetic transistor includes a first magnetic section, a second magnetic section, a conductive section, a first metal terminal, and a second metal terminal. The conductive section is disposed between and is in direct contact with both the first and second magnetic section. The first metal terminal is disposed on one end of an opposite surface to the conductive section of the first magnetic section. The second metal terminal is disposed on one end approximately diagonal to the first metal terminal on an opposite surface to the conductive section of the second magnetic section. While the magnetic transistor structure is turned on, a current flows through the first magnetic section and the second magnetic section via the conductive section.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: June 29, 2010
    Assignee: Northern Lights Semiconductor Corp.
    Inventors: James Chyi Lai, Tom Allen Agan
  • Patent number: 7741707
    Abstract: A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated circuit die to the first integrated circuit die, and encapsulating the second integrated circuit die along a second side of the substrate.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: June 22, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Seng Guan Chow, Heap Hoe Kuan, Dioscoro A. Merilo, Antonio B. Dimaano, Jr.
  • Patent number: 7719070
    Abstract: A nonmagnetic semiconductor device which may be utilized as a spin resonant tunnel diode (spin RTD) and spin transistor, in which low applied voltages and/or magnetic fields are used to control the characteristics of spin-polarized current flow. The nonmagnetic semiconductor device exploits the properties of bulk inversion asymmetry (BIA) in (110)-oriented quantum wells. The nonmagnetic semiconductor device may also be used as a nonmagnetic semiconductor spin valve and a magnetic field sensor. The spin transistor and spin valve may be applied to low-power and/or high-density and/or high-speed logic technologies. The magnetic field sensor may be applied to high-speed hard disk read heads. The spin RTD of the present invention would be useful for a plurality of semiconductor spintronic devices for spin injection and/or spin detection.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: May 18, 2010
    Assignee: University of Iowa Research Foundation
    Inventors: Kimberley C. Hall, Wayne H. Lau, Kenan Gündo{hacek over (g)}du, Michael E. Flatté, Thomas F. Boggess
  • Patent number: 7719069
    Abstract: In one illustrative example, a three terminal magnetic sensor includes a collector region made of a semiconductor material, a base region, and an emitter region. An insulator layer is formed between the collector region and a carrier substrate body which carries the three terminal magnetic sensor. The insulator layer serves to reduce a capacitance otherwise present between the collector region and magnetic media at a magnetic field sensing plane of the three terminal magnetic sensor. Thus, the insulator layer electrically isolates the collector region from the carrier substrate body. The structure may be formed through use of a separation by implanting oxygen (SIMOX) technique or a wafer-bonding technique, as examples.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: May 18, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Jeffrey S. Lille
  • Patent number: 7679155
    Abstract: The present invention provides a low resistance high magnetoresistance (MR) device comprised of a junction of two magnetic elements separated by a magnesium oxide (MgO) layer doped with such metals as Al and Li. Such device can be used as a sensor of magnetic field in magnetic recording or as a storage element in magnetic random access memory (MRAM). The invention provides a high-MR device possessing a diode function, comprised of a double junction of two outer magnetic elements separated by two MgO insulating layer and a center MgO layer doped with such metals as Al and Li. Such device provides design advantages when used as a storage element in MRAM. The invention with MR wherein a gate electrode is placed in electrical or physical contact to the center layer of the double tunnel junction.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: March 16, 2010
    Assignee: VNK Innovation AB
    Inventor: Vladislav Korenivski
  • Patent number: 7663131
    Abstract: A MTJ that minimizes error count (EC) while achieving high MR value, low magnetostriction, and a RA of about 1100 ?-?m2 for 1 Mbit MRAM devices is disclosed. The MTJ has a composite AP1 pinned layer made of a lower amorphous Co60Fe20B20 layer and an upper crystalline Co75Fe25 layer to promote a smoother and more uniform AlOx tunnel barrier. A “stronger oxidation” state is realized in the AlOx layer by depositing a thicker than normal Al layer or extending the ROX cycle time for Al oxidation and thereby reduces tunneling hot spots. The NiFe free layer has a low Fe content of about 8 to 21 atomic % and the Hf content in the NiFeHf capping layer is from 10 to 25 atomic %. A Ta hard mask is formed on the capping layer. EC (best) is reduced from >100 ppm to <10 ppm by using the preferred MTJ configuration.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: February 16, 2010
    Assignee: MagIC Technologies, Inc.
    Inventors: Cheng T. Horng, Ru-Ying Tong, Chyu-Jiuh Torng, Guangli Liu
  • Patent number: 7659562
    Abstract: An electric field read/write head, a method of manufacturing the same, and a data read/write device including the electric field read/write head are provided. The data read/write device includes an electric field read/write head which reads and writes data to and from a recording medium. The electric field read/write head includes a semiconductor substrate, a resistance region, source and drain regions, and a write electrode. The semiconductor substrate includes a first surface and a second surface with adjoining edges. The resistance region is formed to extend from a central portion at one end of the first surface to the second surface. The source region and the drain region are formed at either side of the resistance region and are separated from the first surface. The write electrode is formed on the resistance region with an insulating layer interposed between the write electrode and the resistance region.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: February 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyoung-soo Ko, Ju-hwan Jung, Yong-su Kim, Seung-bum Hong, Hong-sik Park
  • Publication number: 20090251139
    Abstract: The invention concerns a magnetic field-sensitive component, a magnetic field sensing device and a memory structure each incorporating said component, and a method for detecting a magnetic field using said component. A component according to the invention comprises: at least one diluted magnetic semiconductor, first means for generating an electric current in said semiconductor along one predetermined direction, and second means for producing a signal representing a Hall voltage transverse to said direction, and it is so designed that the semiconductor is selected from the group consisting of II/VI and IV/IV type semiconductors and comprises a zone sensitive to said field which forms all or part of a magnetic quantum well, wherein are confined current carriers incorporated by doping in the semiconductor and inducing in said well ferromagnetic exchange interactions.
    Type: Application
    Filed: March 7, 2007
    Publication date: October 8, 2009
    Inventors: Patrick Warin, Matthieu Jamet
  • Patent number: 7545013
    Abstract: A nonvolatilely reconfigurable logical circuit is built. It is a reconfigurable logical circuit based on the CMOS configuration using the spin MOSFET. By changing the transmission characteristic of each transistor in accordance with the magnetization states of Tr1, Tr2, Tr5, and Tr8 which are spin MOSFETs, it is possible to reconfigure all the two-input symmetric functions AND/OR/XOR/NAND/NOR/XNOR/“1”/“0”. Since it is possible to constitute the logical function by a small number of non-volatile elements, it is possible to reduce the chip area, thereby increasing the speed and reducing the power consumption.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: June 9, 2009
    Assignee: Japan Science and Technology Agency
    Inventors: Satoshi Sugahara, Tomohiro Matsuno, Masaaki Tanaka
  • Patent number: 7521264
    Abstract: Devices such as transistors, amplifiers, frequency multipliers, and square-law detectors use injection of spin-polarized electrons from one magnetic region, into another through a control region and spin precession of injected electrons in a magnetic field induced by current in a nanowire. In one configuration, the nanowire is also one of the magnetic regions and the control region is a semiconductor region between the magnetic nanowire and the other magnetic region. Alternatively, the nanowire is insulated from the control region and the two separate magnetic regions. The relative magnetizations of the magnetic regions can be selected to achieve desired device properties. A first voltage applied between one magnetic region and the other magnetic nanowire or region causes injection of spin-polarized electrons through the control region, and a second voltage applied between the ends of the nanowire causes a current and a magnetic field that rotates electron spins to control device conductivity.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: April 21, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Viatcheslav V. Osipov, Alexandre M. Bratkovski
  • Patent number: 7476953
    Abstract: An integrated sensor has a magnetic field sensing element and first and second relatively high magnetically permeable members forming a gap, wherein the magnetic field element is disposed within the gap. The magnetically permeable members provide an increase in the flux experienced by the magnetic field sensing element in response to a magnetic field. The integrated sensor can be used as a current sensor, a proximity detector, or a magnetic field sensor.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: January 13, 2009
    Assignee: Allegro Microsystems, Inc.
    Inventors: William P. Taylor, Richard Dickinson, Michael C. Doogue, Sandra R. Pinelle
  • Publication number: 20090001351
    Abstract: The present invention relates to a thin film lamination to be used in a micro InSb thin film magnetic sensor which can directly detect a magnetic flux density with high sensitivity and has small power consumption and consumption current, and the InSb thin film magnetic sensor. The InSb thin film magnetic sensor uses an InSb thin film as a magnetic sensor section or a magnetic detecting section. The sensor includes an InSb layer that is an InSb thin film formed on a substrate, and an AlxGayIn1-x-ySb mixed crystal layer (0?x, y?1) which shows resistance higher than the InSb layer or insulation, or p-type conduction, and has a band gap larger than that of InSb. The mixed crystal layer is provided between the substrate and the InSb layer, and has a content of Al and Ga atoms (x+y) in the range of 5.0 to 17%.
    Type: Application
    Filed: December 27, 2006
    Publication date: January 1, 2009
    Inventors: Ichiro Shibasaki, Hirotaka Geka, Atsushi Okamoto
  • Patent number: 7468282
    Abstract: A pin junction element includes a ferromagnetic p-type semiconductor layer and a n-type semiconductor layer which are connected via an insulating layer, and which shows a tunneling magnetic resistance according to the magnetization of the ferromagnetic p-type semiconductor layer and the magnetization of the ferromagnetic n-type semiconductor layer. In this pin junction element, an empty layer is formed with an applied bias, thereby generating tunnel current via an empty layer. As a result, it is possible to generate tunnel current even when adopting a thicker insulating layer than that of the conventional tunnel magnetic resistance element.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: December 23, 2008
    Assignee: Japan Science and Technology Agency
    Inventors: Hidekazu Tanaka, Tomoji Kawai
  • Patent number: 7423329
    Abstract: A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip. As such, the first and second chips may be placed in close proximity and electrically connected together or alternatively have no intentional electrical interaction.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: September 9, 2008
    Assignee: Honeywell International Inc.
    Inventors: William F. Witcraft, Lonny L. Berg, Mark D. Amundson
  • Patent number: 7388268
    Abstract: Hall device is provided by enabling stable provision of a quantum well compound semiconductor stacked structure. It has first and second compound semiconductor layers composed of Sb and at least two of five elements of Al, Ga, In, As and P, and an active layer composed of InxGa1-xAsySb1-y (0.8?x?1.0, 0.8?y?1.0), which are stacked. Compared with the active layer, the first and second compound semiconductor layers each have a wider band gap, and a resistance value five times or more greater. The lattice constant differences between the active layer and the first and second compound semiconductor layers are each designed in a range of 0.0-1.2%, and the thickness of the active layer is designed in a range of 30-100 nm.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: June 17, 2008
    Assignee: Asahi Kasei Electronics Co., Ltd.
    Inventors: Takayuki Watanabe, Yoshihiko Shibata, Tsuyoshi Ujihara, Takashi Yoshida, Akihiko Oyama
  • Patent number: 7349247
    Abstract: A magnetic switching element includes: a ferromagnetic layer which is substantially pinned in magnetization in one direction; and a magnetic semiconductor layer provided within a range where a magnetic field from the ferromagnetic layer reaches, where the magnetic semiconductor layer changes its state from a paramagnetic state to a ferromagnetic state by applying a voltage thereto, and a magnetization corresponding to the magnetization of the ferromagnetic layer is induced in the magnetic semiconductor layer by applying a voltage to the magnetic semiconductor layer.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: March 25, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiaki Saito
  • Patent number: 7339245
    Abstract: A Hall sensor on a semiconductor substrate includes a Hall plate in the semiconductor substrate, where the Hall plate includes a first zone having a first conduction type. The semiconductor substrate also include a second zone having a second conduction type. A space-charge zone in the semiconductor substrate separates the first zone and the second zone, first contacts supply a control current to the first zone, and second contacts supply a compensation current to the second zone.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: March 4, 2008
    Assignee: Austriamicrosystems AG
    Inventor: Thomas Mueller
  • Patent number: 7309903
    Abstract: A pin junction element (10) includes a ferromagnetic p-type semiconductor layer (11) and a n-type semiconductor layer (12) which are connected via an insulating layer (13), and which shows a tunneling magnetic resistance according to the magnetization of the ferromagnetic p-type semiconductor layer (11) and the magnetization of the ferromagnetic n-type semiconductor layer (12). In this pin junction element (10), an empty layer is formed with an applied bias, thereby generating tunnel current via an empty layer. As a result, it is possible to generate tunnel current even when adopting a thicker insulating layer than that of the conventional tunnel magnetic resistance element.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: December 18, 2007
    Assignee: Japan Science and Technology Agency
    Inventors: Hidekazu Tanaka, Tomoji Kawai
  • Patent number: 7265543
    Abstract: A magnetic-sensing apparatus and methods of making and using thereof are disclosed. The sensing apparatus may have one or more magneto-resistive-sensing elements, one ore more reorientation elements for adjusting the magneto-resistive-sensing elements, and semiconductor circuitry having driver circuitry for controlling the reorientation elements. The magneto-resistive-sensing elements, reorientation elements and semiconductor circuitry may be disposed in single package and/or monolithically formed on a single chip. Alternatively, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive-sensing elements, while a second portion of the semiconductor circuitry may be formed on a second chip. The first and second chips may be placed in close proximity and electrically connected together. Alternatively the chips may have no intentional electrical interaction.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: September 4, 2007
    Assignee: Honeywell International Inc.
    Inventors: William F. Witcraft, Mark D. Amundson
  • Patent number: 7262449
    Abstract: A magnetic random access memory according to an aspect of the present invention comprises a first magnetic layer in which a magnetization state is fixed, a second magnetic layer which has a shape different from that of the first magnetic layer and in which a magnetization state varies in accordance with write data, a non-magnetic layer which is arranged between the first magnetic layer and the second magnetic layer, and a third magnetic layer which surrounds the second magnetic layer.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: August 28, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeshi Kajiyama
  • Patent number: 7244997
    Abstract: An electronic system includes a three terminal device having a light emitting portion and a magnetically sensitive portion. The magnetically sensitive portion is for modulating light emission from the light emitting portion. The device is a spin valve transistor having a light-emitting quantum well in its collector. The device can convert a magnetic digital signal to both an electrical digital signal and an optical digital signal, wherein either or both of these signals can be provided as a device output. The magnetically sensitive portion of the device is formed of a pair of magnetically permeable layers. When the layers are aligned electron current can pass through with sufficient energy to reach a quantum well where they recombine, generating light. The device may be used to read a magnetic storage medium, such as a disk drive. Or it can be used to provide a display or a memory array composed of single device magnetic write, optical read memory cells.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: July 17, 2007
    Assignee: President and Fellows of Harvard College
    Inventors: Ian Robert Appelbaum, Douwe Johannes Monsma, Kasey Joe Russell
  • Patent number: 7239000
    Abstract: A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: July 3, 2007
    Assignee: Honeywell International Inc.
    Inventors: William F. Witcraft, Lonny L. Berg, Mark D. Amundson
  • Patent number: 7208808
    Abstract: A magnetic random access memory with lower switching field is provided. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, and a multi-layered metal layer. The multi-layered metal layer is formed by at least one metal layer, where the direction of the anisotropy axis of the antiferromagnetic layer and the ferromagnetic layer and that of the ferromagnetic free layer are arranged orthogonally. The provided memory has the advantage of lowering the switching field of the ferromagnetic layer, and further lowering the writing current.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: April 24, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Yuan-Jen Lee, Yung-Hsiang Chen, Wei-Chuan Chen, Ming-Jer Kao, Lien-Chang Wang
  • Patent number: 7193288
    Abstract: A ultrathin magnetoelectric transducer and its manufacturing method are provided which enable the quality of mounting to be inspected nondestructively, and can reduce a footprint. The magnetoelectric transducer has a substrate composed of a nonmagnetic substrate, and includes bottom surface connecting electrodes whose leads have a first thickness, and side electrodes which are exposed by dicing and have the first thickness. A more sensitive Hall element has a high-permeability magnetic substrate as the substrate, and includes the bottom surface connecting electrodes whose leads have the first thickness, and the side electrodes exposed by the dicing and having the first thickness. The bottom surface connecting electrodes of the leads with the first thickness are formed across the internal electrodes of adjacent magnetoelectric transducers with maintaining the first thickness. The side electrodes with the first thickness are formed by cutting the center between the adjacent magnetoelectric transducers.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: March 20, 2007
    Assignee: Asahi Kasei Electronics Co., Ltd.
    Inventors: Toshiaki Fukunaka, Atsushi Yamamoto
  • Patent number: 7173275
    Abstract: A hot electron transistor includes an emitter electrode, a base electrode, a collector electrode, and a first tunneling structure disposed and serving as a transport of electrons between the emitter and base electrodes. The first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer such that the transport of electrons includes transport by means of tunneling. The transistor further includes a second tunneling structure disposed between the base and collector electrodes. The second tunneling structure serves as a transport of at least a portion of the previously mentioned electrons between the base and collector electrodes by means of ballistic transport such that the portion of the electrons is collected at the collector electrode. An associated method for reducing electron reflection at interfaces in a thin-film transistor is also disclosed.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: February 6, 2007
    Assignee: Regents of the University of Colorado
    Inventors: Michael J. Estes, Blake J. Eliasson
  • Patent number: 7170173
    Abstract: A conductor with improved magnetic field per current ratio is disclosed. The conductor includes a magnetic liner lining a second surface and sides thereof. The corners of the conductor where the second surface and the sides meet are rounded. The rounded corners have been found to improve the concentration of magnetic flux in the magnetic liner.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: January 30, 2007
    Assignees: Infineon Technologies Aktiengesellschaft, International Business Machines Corporation
    Inventors: Rainer Leuschner, John Slonczewski
  • Patent number: 7164180
    Abstract: Disclosed is a new type of magnetoresistive random-access memory (MRAM) device using a magnetic semiconductor, which is capable of achieving high-integration and energy saving in a simplified structure without any MOS transistor, based on a rectification effect derived from a p-i-n type low-resistance tunneling-magnetoresistance-effect (low-resistance TMR) diode with a structure having a p-type half-metallic ferromagnetic semiconductor, an n-type half-metallic ferromagnetic semiconductor and at least one atomic layer of nonmagnetic insulator interposed therebetween, or a rectification effect derived from a p-n type low-resistance tunneling-magnetoresistance-effect (low-resistance TMR) diode with a structure devoid of the interposed atomic layer of nonmagnetic insulator.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: January 16, 2007
    Assignee: Japan Science and Technology Agency
    Inventors: Hiroshi Yoshida, Kazunori Sato
  • Patent number: 7164181
    Abstract: Devices such as transistors, amplifiers, frequency multipliers, and square-law detectors use injection of spin-polarized electrons from one magnetic region, into another through a control region and spin precession of injected electrons in a magnetic field induced by current in a nanowire. In one configuration, the nanowire is also one of the magnetic regions and the control region is a semiconductor region between the magnetic nanowire and the other magnetic region. Alternatively, the nanowire is insulated from the control region and the two separate magnetic regions. The relative magnetizations of the magnetic regions can be selected to achieve desired device properties. A first voltage applied between one magnetic region and the other magnetic nanowire or region causes injection of spin-polarized electrons through the control region, and a second voltage applied between the ends of the nanowire causes a current and a magnetic field that rotates electron spins to control device conductivity.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: January 16, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Viatcheslav V. Osipov, Alexandr M. Bratkovski
  • Patent number: 7141843
    Abstract: Embodiments of the invention provide a polarization rotator. The polarization rotator may be integrated with a waveguide on a substrate, and may include a ferromagnetic semiconductor layer on the substrate, a first doped layer on the ferromagnetic semiconductor layer, and a second doped layer on the first doped layer.
    Type: Grant
    Filed: October 11, 2004
    Date of Patent: November 28, 2006
    Assignee: Intel Corporation
    Inventors: Michael S. Salib, Dmitri Nikonov
  • Patent number: 7129534
    Abstract: A method of forming a magneto-resistive memory element includes forming a groove in a layer of insulating material. A liner is formed conformably within the groove and the groove is filled with copper and then planarized. The electrically conductive material is provided an upper surface that is recessed relative to the upper surface of the layer of insulating material. A cap, which can be conductive (e.g., Ta) or resistive (e.g., TiAIN), is disposed over the electrically conductive material and within the groove. A surface of the cap that faces away from the electrically conductive material, is formed with an elevation substantially equal to that of the edge of the liner, or the cap can extend over the liner edge. At least one layer of magneto-resistive material is disposed over a portion of the cap. Advantageously, the cap can protect the copper line from harmful etch processes required for etching a MRAM stack, while keeping the structure planar after CMP.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: October 31, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Mark E. Tuttle